Merge schedutil governor updates for v4.10.

8 files changed, 186 insertions, 232 deletions

diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index f1e07c2344f8..3b67f538f142 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -31,6 +31,8 @@ static void __init arc_set_early_base_baud(unsigned long dt_root)
                 arc_base_baud = 166666666;      /* Fixed 166.6MHz clk (TB10x) */
         else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
                 arc_base_baud = 33333333;       /* Fixed 33MHz clk (AXS10x) */
+        else if (of_flat_dt_is_compatible(dt_root, "ezchip,arc-nps"))
+                arc_base_baud = 800000000;      /* Fixed 800MHz clk (NPS) */
         else
                 arc_base_baud = 50000000;       /* Fixed default 50MHz */
 }
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index 72f9179b1a24..f39142acc89e 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -15,11 +15,12 @@
 #include <asm/mcip.h>
 #include <asm/setup.h>
 
-static char smp_cpuinfo_buf[128];
-static int idu_detected;
-
 static DEFINE_RAW_SPINLOCK(mcip_lock);
 
+#ifdef CONFIG_SMP
+
+static char smp_cpuinfo_buf[128];
+
 static void mcip_setup_per_cpu(int cpu)
 {
         smp_ipi_irq_setup(cpu, IPI_IRQ);
@@ -86,21 +87,7 @@ static void mcip_ipi_clear(int irq)
 
 static void mcip_probe_n_setup(void)
 {
-        struct mcip_bcr {
-#ifdef CONFIG_CPU_BIG_ENDIAN
-                unsigned int pad3:8,
-                             idu:1, llm:1, num_cores:6,
-                             iocoh:1,  gfrc:1, dbg:1, pad2:1,
-                             msg:1, sem:1, ipi:1, pad:1,
-                             ver:8;
-#else
-                unsigned int ver:8,
-                             pad:1, ipi:1, sem:1, msg:1,
-                             pad2:1, dbg:1, gfrc:1, iocoh:1,
-                             num_cores:6, llm:1, idu:1,
-                             pad3:8;
-#endif
-        } mp;
+        struct mcip_bcr mp;
 
         READ_BCR(ARC_REG_MCIP_BCR, mp);
 
@@ -114,7 +101,6 @@ static void mcip_probe_n_setup(void)
                 IS_AVAIL1(mp.gfrc, "GFRC"));
 
         cpuinfo_arc700[0].extn.gfrc = mp.gfrc;
-        idu_detected = mp.idu;
 
         if (mp.dbg) {
                 __mcip_cmd_data(CMD_DEBUG_SET_SELECT, 0, 0xf);
@@ -130,6 +116,8 @@ struct plat_smp_ops plat_smp_ops = {
         .ipi_clear      = mcip_ipi_clear,
 };
 
+#endif
+
 /***************************************************************************
  * ARCv2 Interrupt Distribution Unit (IDU)
  *
@@ -193,6 +181,8 @@ idu_irq_set_affinity(struct irq_data *data, const struct cpumask *cpumask,
 {
         unsigned long flags;
         cpumask_t online;
+        unsigned int destination_bits;
+        unsigned int distribution_mode;
 
         /* errout if no online cpu per @cpumask */
         if (!cpumask_and(&online, cpumask, cpu_online_mask))
@@ -200,8 +190,15 @@ idu_irq_set_affinity(struct irq_data *data, const struct cpumask *cpumask,
 
         raw_spin_lock_irqsave(&mcip_lock, flags);
 
-        idu_set_dest(data->hwirq, cpumask_bits(&online)[0]);
-        idu_set_mode(data->hwirq, IDU_M_TRIG_LEVEL, IDU_M_DISTRI_RR);
+        destination_bits = cpumask_bits(&online)[0];
+        idu_set_dest(data->hwirq, destination_bits);
+
+        if (ffs(destination_bits) == fls(destination_bits))
+                distribution_mode = IDU_M_DISTRI_DEST;
+        else
+                distribution_mode = IDU_M_DISTRI_RR;
+
+        idu_set_mode(data->hwirq, IDU_M_TRIG_LEVEL, distribution_mode);
 
         raw_spin_unlock_irqrestore(&mcip_lock, flags);
 
@@ -219,16 +216,15 @@ static struct irq_chip idu_irq_chip = {
 
 };
 
-static int idu_first_irq;
+static irq_hw_number_t idu_first_hwirq;
 
 static void idu_cascade_isr(struct irq_desc *desc)
 {
-        struct irq_domain *domain = irq_desc_get_handler_data(desc);
-        unsigned int core_irq = irq_desc_get_irq(desc);
-        unsigned int idu_irq;
+        struct irq_domain *idu_domain = irq_desc_get_handler_data(desc);
+        irq_hw_number_t core_hwirq = irqd_to_hwirq(irq_desc_get_irq_data(desc));
+        irq_hw_number_t idu_hwirq = core_hwirq - idu_first_hwirq;
 
-        idu_irq = core_irq - idu_first_irq;
-        generic_handle_irq(irq_find_mapping(domain, idu_irq));
+        generic_handle_irq(irq_find_mapping(idu_domain, idu_hwirq));
 }
 
 static int idu_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq)
@@ -294,9 +290,12 @@ idu_of_init(struct device_node *intc, struct device_node *parent)
         struct irq_domain *domain;
         /* Read IDU BCR to confirm nr_irqs */
         int nr_irqs = of_irq_count(intc);
-        int i, irq;
+        int i, virq;
+        struct mcip_bcr mp;
+
+        READ_BCR(ARC_REG_MCIP_BCR, mp);
 
-        if (!idu_detected)
+        if (!mp.idu)
                 panic("IDU not detected, but DeviceTree using it");
 
         pr_info("MCIP: IDU referenced from Devicetree %d irqs\n", nr_irqs);
@@ -312,11 +311,11 @@ idu_of_init(struct device_node *intc, struct device_node *parent)
                  * however we need it to get the parent virq and set IDU handler
                  * as first level isr
                  */
-                irq = irq_of_parse_and_map(intc, i);
+                virq = irq_of_parse_and_map(intc, i);
                 if (!i)
-                        idu_first_irq = irq;
+                        idu_first_hwirq = irqd_to_hwirq(irq_get_irq_data(virq));
 
-                irq_set_chained_handler_and_data(irq, idu_cascade_isr, domain);
+                irq_set_chained_handler_and_data(virq, idu_cascade_isr, domain);
         }
 
         __mcip_cmd(CMD_IDU_ENABLE, 0);
diff --git a/arch/arc/kernel/module.c b/arch/arc/kernel/module.c
index 9a2849756022..42e964db2967 100644
--- a/arch/arc/kernel/module.c
+++ b/arch/arc/kernel/module.c
@@ -30,17 +30,9 @@ int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
                               char *secstr, struct module *mod)
 {
 #ifdef CONFIG_ARC_DW2_UNWIND
-        int i;
-
         mod->arch.unw_sec_idx = 0;
         mod->arch.unw_info = NULL;
-
-        for (i = 1; i < hdr->e_shnum; i++) {
-                if (strcmp(secstr+sechdrs[i].sh_name, ".eh_frame") == 0) {
-                        mod->arch.unw_sec_idx = i;
-                        break;
-                }
-        }
+        mod->arch.secstr = secstr;
 #endif