aboutsummaryrefslogtreecommitdiffstats
path: root/arch/alpha
diff options
context:
space:
mode:
authorMike Rapoport <rppt@linux.vnet.ibm.com>2018-10-30 18:09:57 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2018-10-31 11:54:16 -0400
commit7e1c4e27928e5f87b9b1eaf06dc31773b2f1e7f1 (patch)
treed1fa2f4ef8d5e2c15c2db4b80f5782ca3d26db83 /arch/alpha
parent530d4c0cfd5b71caf2d17f73a80696c4a4509813 (diff)
memblock: stop using implicit alignment to SMP_CACHE_BYTES
When a memblock allocation APIs are called with align = 0, the alignment is implicitly set to SMP_CACHE_BYTES. Implicit alignment is done deep in the memblock allocator and it can come as a surprise. Not that such an alignment would be wrong even when used incorrectly but it is better to be explicit for the sake of clarity and the prinicple of the least surprise. Replace all such uses of memblock APIs with the 'align' parameter explicitly set to SMP_CACHE_BYTES and stop implicit alignment assignment in the memblock internal allocation functions. For the case when memblock APIs are used via helper functions, e.g. like iommu_arena_new_node() in Alpha, the helper functions were detected with Coccinelle's help and then manually examined and updated where appropriate. The direct memblock APIs users were updated using the semantic patch below: @@ expression size, min_addr, max_addr, nid; @@ ( | - memblock_alloc_try_nid_raw(size, 0, min_addr, max_addr, nid) + memblock_alloc_try_nid_raw(size, SMP_CACHE_BYTES, min_addr, max_addr, nid) | - memblock_alloc_try_nid_nopanic(size, 0, min_addr, max_addr, nid) + memblock_alloc_try_nid_nopanic(size, SMP_CACHE_BYTES, min_addr, max_addr, nid) | - memblock_alloc_try_nid(size, 0, min_addr, max_addr, nid) + memblock_alloc_try_nid(size, SMP_CACHE_BYTES, min_addr, max_addr, nid) | - memblock_alloc(size, 0) + memblock_alloc(size, SMP_CACHE_BYTES) | - memblock_alloc_raw(size, 0) + memblock_alloc_raw(size, SMP_CACHE_BYTES) | - memblock_alloc_from(size, 0, min_addr) + memblock_alloc_from(size, SMP_CACHE_BYTES, min_addr) | - memblock_alloc_nopanic(size, 0) + memblock_alloc_nopanic(size, SMP_CACHE_BYTES) | - memblock_alloc_low(size, 0) + memblock_alloc_low(size, SMP_CACHE_BYTES) | - memblock_alloc_low_nopanic(size, 0) + memblock_alloc_low_nopanic(size, SMP_CACHE_BYTES) | - memblock_alloc_from_nopanic(size, 0, min_addr) + memblock_alloc_from_nopanic(size, SMP_CACHE_BYTES, min_addr) | - memblock_alloc_node(size, 0, nid) + memblock_alloc_node(size, SMP_CACHE_BYTES, nid) ) [mhocko@suse.com: changelog update] [akpm@linux-foundation.org: coding-style fixes] [rppt@linux.ibm.com: fix missed uses of implicit alignment] Link: http://lkml.kernel.org/r/20181016133656.GA10925@rapoport-lnx Link: http://lkml.kernel.org/r/1538687224-17535-1-git-send-email-rppt@linux.vnet.ibm.com Signed-off-by: Mike Rapoport <rppt@linux.vnet.ibm.com> Suggested-by: Michal Hocko <mhocko@suse.com> Acked-by: Paul Burton <paul.burton@mips.com> [MIPS] Acked-by: Michael Ellerman <mpe@ellerman.id.au> [powerpc] Acked-by: Michal Hocko <mhocko@suse.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Zankel <chris@zankel.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: Ingo Molnar <mingo@redhat.com> Cc: Matt Turner <mattst88@gmail.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Richard Weinberger <richard@nod.at> Cc: Russell King <linux@armlinux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/alpha')
-rw-r--r--arch/alpha/kernel/core_apecs.c3
-rw-r--r--arch/alpha/kernel/core_lca.c3
-rw-r--r--arch/alpha/kernel/core_marvel.c4
-rw-r--r--arch/alpha/kernel/core_mcpcia.c6
-rw-r--r--arch/alpha/kernel/core_t2.c2
-rw-r--r--arch/alpha/kernel/core_titan.c6
-rw-r--r--arch/alpha/kernel/core_tsunami.c6
-rw-r--r--arch/alpha/kernel/core_wildfire.c6
-rw-r--r--arch/alpha/kernel/pci-noop.c4
-rw-r--r--arch/alpha/kernel/pci.c4
-rw-r--r--arch/alpha/kernel/pci_iommu.c4
11 files changed, 29 insertions, 19 deletions
diff --git a/arch/alpha/kernel/core_apecs.c b/arch/alpha/kernel/core_apecs.c
index 1bf3eef34c22..6df765ff2b10 100644
--- a/arch/alpha/kernel/core_apecs.c
+++ b/arch/alpha/kernel/core_apecs.c
@@ -346,7 +346,8 @@ apecs_init_arch(void)
346 * Window 1 is direct access 1GB at 1GB 346 * Window 1 is direct access 1GB at 1GB
347 * Window 2 is scatter-gather 8MB at 8MB (for isa) 347 * Window 2 is scatter-gather 8MB at 8MB (for isa)
348 */ 348 */
349 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); 349 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,
350 SMP_CACHE_BYTES);
350 hose->sg_pci = NULL; 351 hose->sg_pci = NULL;
351 __direct_map_base = 0x40000000; 352 __direct_map_base = 0x40000000;
352 __direct_map_size = 0x40000000; 353 __direct_map_size = 0x40000000;
diff --git a/arch/alpha/kernel/core_lca.c b/arch/alpha/kernel/core_lca.c
index 81c0c43635b0..57e0750419f2 100644
--- a/arch/alpha/kernel/core_lca.c
+++ b/arch/alpha/kernel/core_lca.c
@@ -275,7 +275,8 @@ lca_init_arch(void)
275 * Note that we do not try to save any of the DMA window CSRs 275 * Note that we do not try to save any of the DMA window CSRs
276 * before setting them, since we cannot read those CSRs on LCA. 276 * before setting them, since we cannot read those CSRs on LCA.
277 */ 277 */
278 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); 278 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,
279 SMP_CACHE_BYTES);
279 hose->sg_pci = NULL; 280 hose->sg_pci = NULL;
280 __direct_map_base = 0x40000000; 281 __direct_map_base = 0x40000000;
281 __direct_map_size = 0x40000000; 282 __direct_map_size = 0x40000000;
diff --git a/arch/alpha/kernel/core_marvel.c b/arch/alpha/kernel/core_marvel.c
index 8a568c4d8e81..c1d0c18c71ca 100644
--- a/arch/alpha/kernel/core_marvel.c
+++ b/arch/alpha/kernel/core_marvel.c
@@ -82,7 +82,7 @@ mk_resource_name(int pe, int port, char *str)
82 char *name; 82 char *name;
83 83
84 sprintf(tmp, "PCI %s PE %d PORT %d", str, pe, port); 84 sprintf(tmp, "PCI %s PE %d PORT %d", str, pe, port);
85 name = memblock_alloc(strlen(tmp) + 1, 0); 85 name = memblock_alloc(strlen(tmp) + 1, SMP_CACHE_BYTES);
86 strcpy(name, tmp); 86 strcpy(name, tmp);
87 87
88 return name; 88 return name;
@@ -117,7 +117,7 @@ alloc_io7(unsigned int pe)
117 return NULL; 117 return NULL;
118 } 118 }
119 119
120 io7 = memblock_alloc(sizeof(*io7), 0); 120 io7 = memblock_alloc(sizeof(*io7), SMP_CACHE_BYTES);
121 io7->pe = pe; 121 io7->pe = pe;
122 raw_spin_lock_init(&io7->irq_lock); 122 raw_spin_lock_init(&io7->irq_lock);
123 123
diff --git a/arch/alpha/kernel/core_mcpcia.c b/arch/alpha/kernel/core_mcpcia.c
index b1549db54260..74b1d018124c 100644
--- a/arch/alpha/kernel/core_mcpcia.c
+++ b/arch/alpha/kernel/core_mcpcia.c
@@ -364,9 +364,11 @@ mcpcia_startup_hose(struct pci_controller *hose)
364 * Window 1 is scatter-gather (up to) 1GB at 1GB (for pci) 364 * Window 1 is scatter-gather (up to) 1GB at 1GB (for pci)
365 * Window 2 is direct access 2GB at 2GB 365 * Window 2 is direct access 2GB at 2GB
366 */ 366 */
367 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); 367 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,
368 SMP_CACHE_BYTES);
368 hose->sg_pci = iommu_arena_new(hose, 0x40000000, 369 hose->sg_pci = iommu_arena_new(hose, 0x40000000,
369 size_for_memory(0x40000000), 0); 370 size_for_memory(0x40000000),
371 SMP_CACHE_BYTES);
370 372
371 __direct_map_base = 0x80000000; 373 __direct_map_base = 0x80000000;
372 __direct_map_size = 0x80000000; 374 __direct_map_size = 0x80000000;
diff --git a/arch/alpha/kernel/core_t2.c b/arch/alpha/kernel/core_t2.c
index 2c00b61ca379..98d5b6ff8a76 100644
--- a/arch/alpha/kernel/core_t2.c
+++ b/arch/alpha/kernel/core_t2.c
@@ -351,7 +351,7 @@ t2_sg_map_window2(struct pci_controller *hose,
351 351
352 /* Note we can only do 1 SG window, as the other is for direct, so 352 /* Note we can only do 1 SG window, as the other is for direct, so
353 do an ISA SG area, especially for the floppy. */ 353 do an ISA SG area, especially for the floppy. */
354 hose->sg_isa = iommu_arena_new(hose, base, length, 0); 354 hose->sg_isa = iommu_arena_new(hose, base, length, SMP_CACHE_BYTES);
355 hose->sg_pci = NULL; 355 hose->sg_pci = NULL;
356 356
357 temp = (base & 0xfff00000UL) | ((base + length - 1) >> 20); 357 temp = (base & 0xfff00000UL) | ((base + length - 1) >> 20);
diff --git a/arch/alpha/kernel/core_titan.c b/arch/alpha/kernel/core_titan.c
index 97551597581b..2a2820fb1be6 100644
--- a/arch/alpha/kernel/core_titan.c
+++ b/arch/alpha/kernel/core_titan.c
@@ -316,10 +316,12 @@ titan_init_one_pachip_port(titan_pachip_port *port, int index)
316 * Window 1 is direct access 1GB at 2GB 316 * Window 1 is direct access 1GB at 2GB
317 * Window 2 is scatter-gather 1GB at 3GB 317 * Window 2 is scatter-gather 1GB at 3GB
318 */ 318 */
319 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); 319 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,
320 SMP_CACHE_BYTES);
320 hose->sg_isa->align_entry = 8; /* 64KB for ISA */ 321 hose->sg_isa->align_entry = 8; /* 64KB for ISA */
321 322
322 hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x40000000, 0); 323 hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x40000000,
324 SMP_CACHE_BYTES);
323 hose->sg_pci->align_entry = 4; /* Titan caches 4 PTEs at a time */ 325 hose->sg_pci->align_entry = 4; /* Titan caches 4 PTEs at a time */
324 326
325 port->wsba[0].csr = hose->sg_isa->dma_base | 3; 327 port->wsba[0].csr = hose->sg_isa->dma_base | 3;
diff --git a/arch/alpha/kernel/core_tsunami.c b/arch/alpha/kernel/core_tsunami.c
index f334b8928d72..fc1ab73f23de 100644
--- a/arch/alpha/kernel/core_tsunami.c
+++ b/arch/alpha/kernel/core_tsunami.c
@@ -319,12 +319,14 @@ tsunami_init_one_pchip(tsunami_pchip *pchip, int index)
319 * NOTE: we need the align_entry settings for Acer devices on ES40, 319 * NOTE: we need the align_entry settings for Acer devices on ES40,
320 * specifically floppy and IDE when memory is larger than 2GB. 320 * specifically floppy and IDE when memory is larger than 2GB.
321 */ 321 */
322 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); 322 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,
323 SMP_CACHE_BYTES);
323 /* Initially set for 4 PTEs, but will be overridden to 64K for ISA. */ 324 /* Initially set for 4 PTEs, but will be overridden to 64K for ISA. */
324 hose->sg_isa->align_entry = 4; 325 hose->sg_isa->align_entry = 4;
325 326
326 hose->sg_pci = iommu_arena_new(hose, 0x40000000, 327 hose->sg_pci = iommu_arena_new(hose, 0x40000000,
327 size_for_memory(0x40000000), 0); 328 size_for_memory(0x40000000),
329 SMP_CACHE_BYTES);
328 hose->sg_pci->align_entry = 4; /* Tsunami caches 4 PTEs at a time */ 330 hose->sg_pci->align_entry = 4; /* Tsunami caches 4 PTEs at a time */
329 331
330 __direct_map_base = 0x80000000; 332 __direct_map_base = 0x80000000;
diff --git a/arch/alpha/kernel/core_wildfire.c b/arch/alpha/kernel/core_wildfire.c
index cad36fc6ed7d..353c03d15442 100644
--- a/arch/alpha/kernel/core_wildfire.c
+++ b/arch/alpha/kernel/core_wildfire.c
@@ -111,8 +111,10 @@ wildfire_init_hose(int qbbno, int hoseno)
111 * ??? We ought to scale window 3 memory. 111 * ??? We ought to scale window 3 memory.
112 * 112 *
113 */ 113 */
114 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); 114 hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,
115 hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x08000000, 0); 115 SMP_CACHE_BYTES);
116 hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x08000000,
117 SMP_CACHE_BYTES);
116 118
117 pci = WILDFIRE_pci(qbbno, hoseno); 119 pci = WILDFIRE_pci(qbbno, hoseno);
118 120
diff --git a/arch/alpha/kernel/pci-noop.c b/arch/alpha/kernel/pci-noop.c
index a9378ee0c2f1..091cff3c68fd 100644
--- a/arch/alpha/kernel/pci-noop.c
+++ b/arch/alpha/kernel/pci-noop.c
@@ -33,7 +33,7 @@ alloc_pci_controller(void)
33{ 33{
34 struct pci_controller *hose; 34 struct pci_controller *hose;
35 35
36 hose = memblock_alloc(sizeof(*hose), 0); 36 hose = memblock_alloc(sizeof(*hose), SMP_CACHE_BYTES);
37 37
38 *hose_tail = hose; 38 *hose_tail = hose;
39 hose_tail = &hose->next; 39 hose_tail = &hose->next;
@@ -44,7 +44,7 @@ alloc_pci_controller(void)
44struct resource * __init 44struct resource * __init
45alloc_resource(void) 45alloc_resource(void)
46{ 46{
47 return memblock_alloc(sizeof(struct resource), 0); 47 return memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES);
48} 48}
49 49
50SYSCALL_DEFINE3(pciconfig_iobase, long, which, unsigned long, bus, 50SYSCALL_DEFINE3(pciconfig_iobase, long, which, unsigned long, bus,
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c
index 13937e72d875..97098127df83 100644
--- a/arch/alpha/kernel/pci.c
+++ b/arch/alpha/kernel/pci.c
@@ -392,7 +392,7 @@ alloc_pci_controller(void)
392{ 392{
393 struct pci_controller *hose; 393 struct pci_controller *hose;
394 394
395 hose = memblock_alloc(sizeof(*hose), 0); 395 hose = memblock_alloc(sizeof(*hose), SMP_CACHE_BYTES);
396 396
397 *hose_tail = hose; 397 *hose_tail = hose;
398 hose_tail = &hose->next; 398 hose_tail = &hose->next;
@@ -403,7 +403,7 @@ alloc_pci_controller(void)
403struct resource * __init 403struct resource * __init
404alloc_resource(void) 404alloc_resource(void)
405{ 405{
406 return memblock_alloc(sizeof(struct resource), 0); 406 return memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES);
407} 407}
408 408
409 409
diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c
index 82cf950bda2a..46e08e0d9181 100644
--- a/arch/alpha/kernel/pci_iommu.c
+++ b/arch/alpha/kernel/pci_iommu.c
@@ -79,7 +79,7 @@ iommu_arena_new_node(int nid, struct pci_controller *hose, dma_addr_t base,
79 printk("%s: couldn't allocate arena from node %d\n" 79 printk("%s: couldn't allocate arena from node %d\n"
80 " falling back to system-wide allocation\n", 80 " falling back to system-wide allocation\n",
81 __func__, nid); 81 __func__, nid);
82 arena = memblock_alloc(sizeof(*arena), 0); 82 arena = memblock_alloc(sizeof(*arena), SMP_CACHE_BYTES);
83 } 83 }
84 84
85 arena->ptes = memblock_alloc_node(sizeof(*arena), align, nid); 85 arena->ptes = memblock_alloc_node(sizeof(*arena), align, nid);
@@ -92,7 +92,7 @@ iommu_arena_new_node(int nid, struct pci_controller *hose, dma_addr_t base,
92 92
93#else /* CONFIG_DISCONTIGMEM */ 93#else /* CONFIG_DISCONTIGMEM */
94 94
95 arena = memblock_alloc(sizeof(*arena), 0); 95 arena = memblock_alloc(sizeof(*arena), SMP_CACHE_BYTES);
96 arena->ptes = memblock_alloc_from(mem_size, align, 0); 96 arena->ptes = memblock_alloc_from(mem_size, align, 0);
97 97
98#endif /* CONFIG_DISCONTIGMEM */ 98#endif /* CONFIG_DISCONTIGMEM */