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authorAshutosh Dixit <ashutosh.dixit@intel.com>2015-09-29 21:14:30 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-10-04 07:54:54 -0400
commitf4a66c20448257fbb8932827e5f766b74d1acbf0 (patch)
tree71f995817bb204f780c5eba69b893460034ec08b /Documentation/mic/mic_overview.txt
parentd411e79391092925457d89b77d7cd3038ba6d04b (diff)
misc: mic: Update MIC host daemon with COSM changes
This patch updates the MIC host daemon to work with corresponding changes in COSM. Other MIC daemon fixes, cleanups and enhancements as are also rolled into this patch. Changes to MIC sysfs ABI which go into effect with this patch are also documented. Reviewed-by: Sudeep Dutt <sudeep.dutt@intel.com> Signed-off-by: Dasaratharaman Chandramouli <dasaratharaman.chandramouli@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/mic/mic_overview.txt')
-rw-r--r--Documentation/mic/mic_overview.txt31
1 files changed, 18 insertions, 13 deletions
diff --git a/Documentation/mic/mic_overview.txt b/Documentation/mic/mic_overview.txt
index 1a2f2c8ec59e..73f44fc3e715 100644
--- a/Documentation/mic/mic_overview.txt
+++ b/Documentation/mic/mic_overview.txt
@@ -28,6 +28,10 @@ The Symmetric Communication Interface (SCIF (pronounced as skiff)) is a
28low level communications API across PCIe currently implemented for MIC. 28low level communications API across PCIe currently implemented for MIC.
29More details are available at scif_overview.txt. 29More details are available at scif_overview.txt.
30 30
31The Coprocessor State Management (COSM) driver on the host allows for
32boot, shutdown and reset of Intel MIC devices. It communicates with a COSM
33"client" driver on the MIC cards over SCIF to perform these functions.
34
31Here is a block diagram of the various components described above. The 35Here is a block diagram of the various components described above. The
32virtio backends are situated on the host rather than the card given better 36virtio backends are situated on the host rather than the card given better
33single threaded performance for the host compared to MIC, the ability of 37single threaded performance for the host compared to MIC, the ability of
@@ -51,19 +55,20 @@ the fact that the virtio block storage backend can only be on the host.
51 | | | Virtio over PCIe IOCTLs | 55 | | | Virtio over PCIe IOCTLs |
52 | | +--------------------------+ 56 | | +--------------------------+
53+-----------+ | | | +-----------+ 57+-----------+ | | | +-----------+
54| MIC DMA | | +----------+ | +-----------+ | | MIC DMA | 58| MIC DMA | | +------+ | +------+ +------+ | | MIC DMA |
55| Driver | | | SCIF | | | SCIF | | | Driver | 59| Driver | | | SCIF | | | SCIF | | COSM | | | Driver |
56+-----------+ | +----------+ | +-----------+ | +-----------+ 60+-----------+ | +------+ | +------+ +--+---+ | +-----------+
57 | | | | | | | 61 | | | | | | | |
58+---------------+ | +-----+-----+ | +-----+-----+ | +---------------+ 62+---------------+ | +------+ | +--+---+ +--+---+ | +----------------+
59|MIC virtual Bus| | |SCIF HW Bus| | |SCIF HW BUS| | |MIC virtual Bus| 63|MIC virtual Bus| | |SCIF | | |SCIF | | COSM | | |MIC virtual Bus |
60+---------------+ | +-----------+ | +-----+-----+ | +---------------+ 64+---------------+ | |HW Bus| | |HW Bus| | Bus | | +----------------+
61 | | | | | | | 65 | | +------+ | +--+---+ +------+ | |
62 | +--------------+ | | | +---------------+ | 66 | | | | | | | |
63 | |Intel MIC | | | | |Intel MIC | | 67 | +-----------+---+ | | | +---------------+ |
64 +---|Card Driver +----+ | | |Host Driver | | 68 | |Intel MIC | | | | |Intel MIC | |
65 +--------------+ | +----+---------------+-----+ 69 +---|Card Driver | | | | |Host Driver | |
66 | | | 70 +------------+--------+ | +----+---------------+-----+
71 | | |
67 +-------------------------------------------------------------+ 72 +-------------------------------------------------------------+
68 | | 73 | |
69 | PCIe Bus | 74 | PCIe Bus |