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authorKevin Hilman <khilman@linaro.org>2013-12-20 10:25:39 -0500
committerKevin Hilman <khilman@linaro.org>2013-12-20 10:25:46 -0500
commit84dac16a3b7428e21583d631f82270abb274ffcc (patch)
treee0dcacde9faae8bada13dc5a91a3ce4605b7bc60 /Documentation/devicetree
parent939ac3cd0635d426845d51a4262fd054a3fa4907 (diff)
parent732079567da4942b7b4929deff8f236926d0b3eb (diff)
Merge tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt
Keystone DTS updates for 3.14 - ddr3 pll clock node typo fixup. - EVM specific clock setting with board k2hk-evm.dts. - GIC node updates for missing virtualisation info. - Adding USB dwc3 and phy nodes. * tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: keystone: Add usb devicetree bindings ARM: dts: keystone: Add usb phy devicetree bindings ARM: dts: keystone: Add guestos maintenance interrupt ARM: dts: keystone: Add the GICV and GICH address space ARM: keystone: dts: add paclk divider clock node ARM: keystone: dts: fix typo in the ddr3 pllclk node name ARM: keystone: dts: add a k2hk-evm specific dts file Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/usb/keystone-phy.txt20
-rw-r--r--Documentation/devicetree/bindings/usb/keystone-usb.txt42
2 files changed, 62 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/keystone-phy.txt b/Documentation/devicetree/bindings/usb/keystone-phy.txt
new file mode 100644
index 000000000000..f37b3a86341d
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-phy.txt
@@ -0,0 +1,20 @@
1TI Keystone USB PHY
2
3Required properties:
4 - compatible: should be "ti,keystone-usbphy".
5 - #address-cells, #size-cells : should be '1' if the device has sub-nodes
6 with 'reg' property.
7 - reg : Address and length of the usb phy control register set.
8
9The main purpose of this PHY driver is to enable the USB PHY reference clock
10gate on the Keystone SOC for both the USB2 and USB3 PHY. Otherwise it is just
11an NOP PHY driver. Hence this node is referenced as both the usb2 and usb3
12phy node in the USB Glue layer driver node.
13
14usb_phy: usb_phy@2620738 {
15 compatible = "ti,keystone-usbphy";
16 #address-cells = <1>;
17 #size-cells = <1>;
18 reg = <0x2620738 32>;
19 status = "disabled";
20};
diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt b/Documentation/devicetree/bindings/usb/keystone-usb.txt
new file mode 100644
index 000000000000..60527d335b58
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt
@@ -0,0 +1,42 @@
1TI Keystone Soc USB Controller
2
3DWC3 GLUE
4
5Required properties:
6 - compatible: should be "ti,keystone-dwc3".
7 - #address-cells, #size-cells : should be '1' if the device has sub-nodes
8 with 'reg' property.
9 - reg : Address and length of the register set for the USB subsystem on
10 the SOC.
11 - interrupts : The irq number of this device that is used to interrupt the
12 MPU.
13 - ranges: allows valid 1:1 translation between child's address space and
14 parent's address space.
15 - clocks: Clock IDs array as required by the controller.
16 - clock-names: names of clocks correseponding to IDs in the clock property.
17
18Sub-nodes:
19The dwc3 core should be added as subnode to Keystone DWC3 glue.
20- dwc3 :
21 The binding details of dwc3 can be found in:
22 Documentation/devicetree/bindings/usb/dwc3.txt
23
24Example:
25 usb: usb@2680000 {
26 compatible = "ti,keystone-dwc3";
27 #address-cells = <1>;
28 #size-cells = <1>;
29 reg = <0x2680000 0x10000>;
30 clocks = <&clkusb>;
31 clock-names = "usb";
32 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
33 ranges;
34 status = "disabled";
35
36 dwc3@2690000 {
37 compatible = "synopsys,dwc3";
38 reg = <0x2690000 0x70000>;
39 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
40 usb-phy = <&usb_phy>, <&usb_phy>;
41 };
42 };