clocksource: sh_mtu2: Add DT support

Document DT bindings and parse them in the MTU2 driver.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Wolfram Sang <wsa@sang-engineering.com>

1 files changed, 39 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/timer/renesas,mtu2.txt b/Documentation/devicetree/bindings/timer/renesas,mtu2.txt
new file mode 100644
index 000000000000..917453f826bc
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/renesas,mtu2.txt
@@ -0,0 +1,39 @@
+* Renesas R-Car Multi-Function Timer Pulse Unit 2 (MTU2)
+
+The MTU2 is a multi-purpose, multi-channel timer/counter with configurable
+clock inputs and programmable compare match.
+
+Channels share hardware resources but their counter and compare match value
+are independent. The MTU2 hardware supports five channels indexed from 0 to 4.
+
+Required Properties:
+
+  - compatible: must contain "renesas,mtu2"
+
+  - reg: base address and length of the registers block for the timer module.
+
+  - interrupts: interrupt specifiers for the timer, one for each entry in
+    interrupt-names.
+  - interrupt-names: must contain one entry named "tgi?a" for each enabled
+    channel, where "?" is the channel index expressed as one digit from "0" to
+    "4".
+
+  - clocks: a list of phandle + clock-specifier pairs, one for each entry
+    in clock-names.
+  - clock-names: must contain "fck" for the functional clock.
+
+
+Example: R7S72100 (RZ/A1H) MTU2 node
+
+        mtu2: timer@fcff0000 {
+                compatible = "renesas,mtu2";
+                reg = <0xfcff0000 0x400>;
+                interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 146 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 150 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 154 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 159 IRQ_TYPE_LEVEL_HIGH>;
+                interrupt-names = "tgi0a", "tgi1a", "tgi2a", "tgi3a", "tgi4a";
+                clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
+                clock-names = "fck";
+        };