diff options
author | wangyuhang <wangyuhang2014@gmail.com> | 2013-09-01 05:36:21 -0400 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2013-09-01 08:45:14 -0400 |
commit | a110f93d8b4672c4ad18d911f62b9e861010e83b (patch) | |
tree | 18c131e27442012a89f88f5db880d95a60e4dc1f /Documentation/devicetree/bindings/spi/spi-bus.txt | |
parent | a822e99c70f448c4068ea85bb195dac0b2eb3afe (diff) |
spi: quad: fix the name of DT property
spi: quad: fix the name of DT property in patch
The previous property name spi-tx-nbits and spi-rx-nbits looks not
human-readable. To make it consistent with other devices, using property
name spi-tx-bus-width and spi-rx-bus-width instead of the previous one
specify the number of data wires that spi controller will work in.
Add the specification in spi-bus.txt.
Signed-off-by: wangyuhang <wangyuhang2014@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi/spi-bus.txt')
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-bus.txt | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt index 296015e3c632..800dafe5b01b 100644 --- a/Documentation/devicetree/bindings/spi/spi-bus.txt +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt | |||
@@ -55,6 +55,16 @@ contain the following properties. | |||
55 | chip select active high | 55 | chip select active high |
56 | - spi-3wire - (optional) Empty property indicating device requires | 56 | - spi-3wire - (optional) Empty property indicating device requires |
57 | 3-wire mode. | 57 | 3-wire mode. |
58 | - spi-tx-bus-width - (optional) The bus width(number of data wires) that | ||
59 | used for MOSI. Defaults to 1 if not present. | ||
60 | - spi-rx-bus-width - (optional) The bus width(number of data wires) that | ||
61 | used for MISO. Defaults to 1 if not present. | ||
62 | |||
63 | Some SPI controllers and devices support Dual and Quad SPI transfer mode. | ||
64 | It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD). | ||
65 | Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is | ||
66 | only 1(SINGLE), 2(DUAL) and 4(QUAD). | ||
67 | Dual/Quad mode is not allowed when 3-wire mode is used. | ||
58 | 68 | ||
59 | If a gpio chipselect is used for the SPI slave the gpio number will be passed | 69 | If a gpio chipselect is used for the SPI slave the gpio number will be passed |
60 | via the cs_gpio | 70 | via the cs_gpio |