diff options
author | Heiko Stübner <heiko@sntech.de> | 2014-07-02 20:02:12 -0400 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2014-07-13 15:17:09 -0400 |
commit | 5775b82e74d1b307b7dab670993b6b838c92f786 (patch) | |
tree | 4d3a8a3f6d8c335f8a52ae77d4794ceef9a8b941 /Documentation/devicetree/bindings/clock | |
parent | 2c14736c75dba10d9da4c8337e1baee11577691c (diff) |
dt-bindings: add documentation for rk3288 cru
This adds the dt-binding documentation for the clock and reset unit found on
Rockchip rk3288 SoCs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r-- | Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt new file mode 100644 index 000000000000..c9fbb76573e1 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt | |||
@@ -0,0 +1,61 @@ | |||
1 | * Rockchip RK3288 Clock and Reset Unit | ||
2 | |||
3 | The RK3288 clock controller generates and supplies clock to various | ||
4 | controllers within the SoC and also implements a reset controller for SoC | ||
5 | peripherals. | ||
6 | |||
7 | Required Properties: | ||
8 | |||
9 | - compatible: should be "rockchip,rk3288-cru" | ||
10 | - reg: physical base address of the controller and length of memory mapped | ||
11 | region. | ||
12 | - #clock-cells: should be 1. | ||
13 | - #reset-cells: should be 1. | ||
14 | |||
15 | Optional Properties: | ||
16 | |||
17 | - rockchip,grf: phandle to the syscon managing the "general register files" | ||
18 | If missing pll rates are not changable, due to the missing pll lock status. | ||
19 | |||
20 | Each clock is assigned an identifier and client nodes can use this identifier | ||
21 | to specify the clock which they consume. All available clocks are defined as | ||
22 | preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be | ||
23 | used in device tree sources. Similar macros exist for the reset sources in | ||
24 | these files. | ||
25 | |||
26 | External clocks: | ||
27 | |||
28 | There are several clocks that are generated outside the SoC. It is expected | ||
29 | that they are defined using standard clock bindings with following | ||
30 | clock-output-names: | ||
31 | - "xin24m" - crystal input - required, | ||
32 | - "xin32k" - rtc clock - optional, | ||
33 | - "ext_i2s" - external I2S clock - optional, | ||
34 | - "ext_hsadc" - external HSADC clock - optional, | ||
35 | - "ext_edp_24m" - external display port clock - optional, | ||
36 | - "ext_vip" - external VIP clock - optional, | ||
37 | - "ext_isp" - external ISP clock - optional, | ||
38 | - "ext_jtag" - external JTAG clock - optional | ||
39 | |||
40 | Example: Clock controller node: | ||
41 | |||
42 | cru: cru@20000000 { | ||
43 | compatible = "rockchip,rk3188-cru"; | ||
44 | reg = <0x20000000 0x1000>; | ||
45 | rockchip,grf = <&grf>; | ||
46 | |||
47 | #clock-cells = <1>; | ||
48 | #reset-cells = <1>; | ||
49 | }; | ||
50 | |||
51 | Example: UART controller node that consumes the clock generated by the clock | ||
52 | controller: | ||
53 | |||
54 | uart0: serial@10124000 { | ||
55 | compatible = "snps,dw-apb-uart"; | ||
56 | reg = <0x10124000 0x400>; | ||
57 | interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; | ||
58 | reg-shift = <2>; | ||
59 | reg-io-width = <1>; | ||
60 | clocks = <&cru SCLK_UART0>; | ||
61 | }; | ||