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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2018-06-18 15:47:45 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2018-06-19 04:40:29 -0400
commitff7c9917143b3a6cf2fa61212a32d67cf259bf9c (patch)
treeb2dfd6fe3afcc74a880a594ed5f819f27411c1d2
parent5ad7346b4ae2d59cfee106ec8e40ee2561476d47 (diff)
cpufreq: intel_pstate: Fix scaling max/min limits with Turbo 3.0
When scaling max/min settings are changed, internally they are converted to a ratio using the max turbo 1 core turbo frequency. This works fine when 1 core max is same irrespective of the core. But under Turbo 3.0, this will not be the case. For example: Core 0: max turbo pstate: 43 (4.3GHz) Core 1: max turbo pstate: 45 (4.5GHz) In this case 1 core turbo ratio will be maximum of all, so it will be 45 (4.5GHz). Suppose scaling max is set to 4GHz (ratio 40) for all cores ,then on core one it will be = max_state * policy->max / max_freq; = 43 * (4000000/4500000) = 38 (3.8GHz) = 38 which is 200MHz less than the desired. On core2, it will be correctly set to ratio 40 (4GHz). Same holds true for scaling min frequency limit. So this requires usage of correct turbo max frequency for core one, which in this case is 4.3GHz. So we need to adjust per CPU cpu->pstate.turbo_freq using the maximum HWP ratio of that core. This change uses the HWP capability of a core to adjust max turbo frequency. But since Broadwell HWP doesn't use ratios in the HWP capabilities, we have to use legacy max 1 core turbo ratio. This is not a problem as the HWP capabilities don't differ among cores in Broadwell. We need to check for non Broadwell CPU model for applying this change, though. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-rw-r--r--drivers/cpufreq/intel_pstate.c27
1 files changed, 22 insertions, 5 deletions
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 1de5ec8d5ea3..ece120da3353 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -294,6 +294,7 @@ struct pstate_funcs {
294static struct pstate_funcs pstate_funcs __read_mostly; 294static struct pstate_funcs pstate_funcs __read_mostly;
295 295
296static int hwp_active __read_mostly; 296static int hwp_active __read_mostly;
297static int hwp_mode_bdw __read_mostly;
297static bool per_cpu_limits __read_mostly; 298static bool per_cpu_limits __read_mostly;
298static bool hwp_boost __read_mostly; 299static bool hwp_boost __read_mostly;
299 300
@@ -1413,7 +1414,15 @@ static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
1413 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); 1414 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
1414 cpu->pstate.scaling = pstate_funcs.get_scaling(); 1415 cpu->pstate.scaling = pstate_funcs.get_scaling();
1415 cpu->pstate.max_freq = cpu->pstate.max_pstate * cpu->pstate.scaling; 1416 cpu->pstate.max_freq = cpu->pstate.max_pstate * cpu->pstate.scaling;
1416 cpu->pstate.turbo_freq = cpu->pstate.turbo_pstate * cpu->pstate.scaling; 1417
1418 if (hwp_active && !hwp_mode_bdw) {
1419 unsigned int phy_max, current_max;
1420
1421 intel_pstate_get_hwp_max(cpu->cpu, &phy_max, &current_max);
1422 cpu->pstate.turbo_freq = phy_max * cpu->pstate.scaling;
1423 } else {
1424 cpu->pstate.turbo_freq = cpu->pstate.turbo_pstate * cpu->pstate.scaling;
1425 }
1417 1426
1418 if (pstate_funcs.get_aperf_mperf_shift) 1427 if (pstate_funcs.get_aperf_mperf_shift)
1419 cpu->aperf_mperf_shift = pstate_funcs.get_aperf_mperf_shift(); 1428 cpu->aperf_mperf_shift = pstate_funcs.get_aperf_mperf_shift();
@@ -2467,28 +2476,36 @@ static inline bool intel_pstate_has_acpi_ppc(void) { return false; }
2467static inline void intel_pstate_request_control_from_smm(void) {} 2476static inline void intel_pstate_request_control_from_smm(void) {}
2468#endif /* CONFIG_ACPI */ 2477#endif /* CONFIG_ACPI */
2469 2478
2479#define INTEL_PSTATE_HWP_BROADWELL 0x01
2480
2481#define ICPU_HWP(model, hwp_mode) \
2482 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_HWP, hwp_mode }
2483
2470static const struct x86_cpu_id hwp_support_ids[] __initconst = { 2484static const struct x86_cpu_id hwp_support_ids[] __initconst = {
2471 { X86_VENDOR_INTEL, 6, X86_MODEL_ANY, X86_FEATURE_HWP }, 2485 ICPU_HWP(INTEL_FAM6_BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),
2486 ICPU_HWP(INTEL_FAM6_BROADWELL_XEON_D, INTEL_PSTATE_HWP_BROADWELL),
2487 ICPU_HWP(X86_MODEL_ANY, 0),
2472 {} 2488 {}
2473}; 2489};
2474 2490
2475static int __init intel_pstate_init(void) 2491static int __init intel_pstate_init(void)
2476{ 2492{
2493 const struct x86_cpu_id *id;
2477 int rc; 2494 int rc;
2478 2495
2479 if (no_load) 2496 if (no_load)
2480 return -ENODEV; 2497 return -ENODEV;
2481 2498
2482 if (x86_match_cpu(hwp_support_ids)) { 2499 id = x86_match_cpu(hwp_support_ids);
2500 if (id) {
2483 copy_cpu_funcs(&core_funcs); 2501 copy_cpu_funcs(&core_funcs);
2484 if (!no_hwp) { 2502 if (!no_hwp) {
2485 hwp_active++; 2503 hwp_active++;
2504 hwp_mode_bdw = id->driver_data;
2486 intel_pstate.attr = hwp_cpufreq_attrs; 2505 intel_pstate.attr = hwp_cpufreq_attrs;
2487 goto hwp_cpu_matched; 2506 goto hwp_cpu_matched;
2488 } 2507 }
2489 } else { 2508 } else {
2490 const struct x86_cpu_id *id;
2491
2492 id = x86_match_cpu(intel_pstate_cpu_ids); 2509 id = x86_match_cpu(intel_pstate_cpu_ids);
2493 if (!id) 2510 if (!id)
2494 return -ENODEV; 2511 return -ENODEV;