drm/amd/display: add way to determine if link is active

[Why]
Need to understand whether link is active aside from stream state.
This could be used to check what links are enabled by GOP.

[How]
Store link_active state in link status and initialize it by checking
if the DIG is enabled.
Keep it updated on every link enable and disable

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

3 files changed, 10 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 137d3c126632..e2e7bf2ba84b 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -2612,6 +2612,8 @@ void core_link_enable_stream(
                         }
                 }
 
+                stream->link->link_status.link_active = true;
+
                 core_dc->hwss.enable_audio_stream(pipe_ctx);
 
                 /* turn off otg test pattern if enable */
@@ -2646,6 +2648,8 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)
         core_dc->hwss.disable_stream(pipe_ctx, option);
 
         disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal);
+
+        pipe_ctx->stream->link->link_status.link_active = false;
 }
 
 void core_link_set_avmute(struct pipe_ctx *pipe_ctx, bool enable)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h b/drivers/gpu/drm/amd/display/dc/dc_link.h
index d26bbda61ad2..8fc223defed4 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_link.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_link.h
@@ -30,6 +30,7 @@
 #include "grph_object_defs.h"
 
 struct dc_link_status {
+        bool link_active;
         struct dpcd_caps *dpcd_caps;
 };
 
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 7cead0398c15..7117144d48bd 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -1027,6 +1027,11 @@ static void dcn10_init_hw(struct dc *dc)
                                 dc->hwss.edp_power_control(link, true);
 
                         link->link_enc->funcs->hw_init(link->link_enc);
+
+                        /* Check for enabled DIG to identify enabled display */
+                        if (link->link_enc->funcs->is_dig_enabled &&
+                                link->link_enc->funcs->is_dig_enabled(link->link_enc))
+                                link->link_status.link_active = true;
                 }
         }