drm/amdgpu: add macro of umc for each channel

common function for all umc versions, loop for each umc channel is
a frequent used operation in umc block, define it as a macro to
simplify code

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 23 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
index 2604f5076867..9efdd66279e5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
@@ -21,6 +21,29 @@
 #ifndef __AMDGPU_UMC_H__
 #define __AMDGPU_UMC_H__
 
+/*
+ * void (*func)(struct amdgpu_device *adev, struct ras_err_data *err_data,
+ *                              uint32_t umc_reg_offset, uint32_t channel_index)
+ */
+#define amdgpu_umc_for_each_channel(func)       \
+        struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;        \
+        uint32_t umc_inst, channel_inst, umc_reg_offset, channel_index; \
+        for (umc_inst = 0; umc_inst < adev->umc.umc_inst_num; umc_inst++) {     \
+                /* enable the index mode to query eror count per channel */     \
+                adev->umc.funcs->enable_umc_index_mode(adev, umc_inst); \
+                for (channel_inst = 0;  \
+                        channel_inst < adev->umc.channel_inst_num;      \
+                        channel_inst++) {       \
+                        /* calc the register offset according to channel instance */    \
+                        umc_reg_offset = adev->umc.channel_offs * channel_inst; \
+                        /* get channel index of interleaved memory */   \
+                        channel_index = adev->umc.channel_idx_tbl[      \
+                                umc_inst * adev->umc.channel_inst_num + channel_inst];  \
+                        (func)(adev, err_data, umc_reg_offset, channel_index);  \
+                }       \
+        }       \
+        adev->umc.funcs->disable_umc_index_mode(adev);
+
 struct amdgpu_umc_funcs {
         void (*ras_init)(struct amdgpu_device *adev);
         void (*query_ras_error_count)(struct amdgpu_device *adev,