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author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-03-15 07:23:58 -0400 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-03-20 04:49:43 -0400 |
commit | fe686babf4cf62b9b214b99847c735baa35a9fa2 (patch) | |
tree | cb88929437418f3478e11f4c9a5f29434137e349 | |
parent | 9ad0bb39fce319d7b92c17d306ed0a9f70a02e7d (diff) |
clk: sunxi-ng: Fix div/mult settings for osc12M on A64
The mult/div for osc12M was previously backwards (giving a 48M rate
for osc12M). Fix it.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c index e3c084cc6da5..f54114c607df 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c | |||
@@ -566,7 +566,7 @@ static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu", | |||
566 | 0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT); | 566 | 0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT); |
567 | 567 | ||
568 | /* Fixed Factor clocks */ | 568 | /* Fixed Factor clocks */ |
569 | static CLK_FIXED_FACTOR(osc12M_clk, "osc12M", "osc24M", 1, 2, 0); | 569 | static CLK_FIXED_FACTOR(osc12M_clk, "osc12M", "osc24M", 2, 1, 0); |
570 | 570 | ||
571 | /* We hardcode the divider to 4 for now */ | 571 | /* We hardcode the divider to 4 for now */ |
572 | static CLK_FIXED_FACTOR(pll_audio_clk, "pll-audio", | 572 | static CLK_FIXED_FACTOR(pll_audio_clk, "pll-audio", |