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authorMaxime Ripard <maxime.ripard@free-electrons.com>2017-08-25 14:36:48 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-08-28 05:11:24 -0400
commitfe45174b72aead678da581bab9e9a37c9b26a070 (patch)
tree0a2e81c636c8b2ccf42418be421ab44f90a5af7c
parent87e1f5e8bb4bd584de0a8f3b1e42196dca221d02 (diff)
arm: dts: sunxi: Revert EMAC changes
Since the discussion is not settled yet for the EMAC, and that the release in getting really close, let's revert the changes for now, and we'll reintroduce them later. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts9
-rw-r--r--arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts19
-rw-r--r--arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts7
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-2.dts8
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-one.dts8
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts5
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts8
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts22
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts16
-rw-r--r--arch/arm/boot/dts/sunxi-h3-h5.dtsi26
10 files changed, 0 insertions, 128 deletions
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index 6713d0f2b3f4..b1502df7b509 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,8 +56,6 @@
56 56
57 aliases { 57 aliases {
58 serial0 = &uart0; 58 serial0 = &uart0;
59 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
60 ethernet0 = &emac;
61 ethernet1 = &xr819; 59 ethernet1 = &xr819;
62 }; 60 };
63 61
@@ -104,13 +102,6 @@
104 status = "okay"; 102 status = "okay";
105}; 103};
106 104
107&emac {
108 phy-handle = <&int_mii_phy>;
109 phy-mode = "mii";
110 allwinner,leds-active-low;
111 status = "okay";
112};
113
114&mmc0 { 105&mmc0 {
115 pinctrl-names = "default"; 106 pinctrl-names = "default";
116 pinctrl-0 = <&mmc0_pins_a>; 107 pinctrl-0 = <&mmc0_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index d756ff825116..a337af1de322 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,7 +52,6 @@
52 compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; 52 compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
53 53
54 aliases { 54 aliases {
55 ethernet0 = &emac;
56 serial0 = &uart0; 55 serial0 = &uart0;
57 serial1 = &uart1; 56 serial1 = &uart1;
58 }; 57 };
@@ -115,30 +114,12 @@
115 status = "okay"; 114 status = "okay";
116}; 115};
117 116
118&emac {
119 pinctrl-names = "default";
120 pinctrl-0 = <&emac_rgmii_pins>;
121 phy-supply = <&reg_gmac_3v3>;
122 phy-handle = <&ext_rgmii_phy>;
123 phy-mode = "rgmii";
124
125 allwinner,leds-active-low;
126 status = "okay";
127};
128
129&ir { 117&ir {
130 pinctrl-names = "default"; 118 pinctrl-names = "default";
131 pinctrl-0 = <&ir_pins_a>; 119 pinctrl-0 = <&ir_pins_a>;
132 status = "okay"; 120 status = "okay";
133}; 121};
134 122
135&mdio {
136 ext_rgmii_phy: ethernet-phy@1 {
137 compatible = "ethernet-phy-ieee802.3-c22";
138 reg = <0>;
139 };
140};
141
142&mmc0 { 123&mmc0 {
143 pinctrl-names = "default"; 124 pinctrl-names = "default";
144 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 125 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 78f6c24952dd..8d2cc6e9a03f 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,10 +46,3 @@
46 model = "FriendlyARM NanoPi NEO"; 46 model = "FriendlyARM NanoPi NEO";
47 compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; 47 compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
48}; 48};
49
50&emac {
51 phy-handle = <&int_mii_phy>;
52 phy-mode = "mii";
53 allwinner,leds-active-low;
54 status = "okay";
55};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 17cdeae19c6f..8ff71b1bb45b 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,7 +54,6 @@
54 aliases { 54 aliases {
55 serial0 = &uart0; 55 serial0 = &uart0;
56 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ 56 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
57 ethernet0 = &emac;
58 ethernet1 = &rtl8189; 57 ethernet1 = &rtl8189;
59 }; 58 };
60 59
@@ -118,13 +117,6 @@
118 status = "okay"; 117 status = "okay";
119}; 118};
120 119
121&emac {
122 phy-handle = <&int_mii_phy>;
123 phy-mode = "mii";
124 allwinner,leds-active-low;
125 status = "okay";
126};
127
128&ir { 120&ir {
129 pinctrl-names = "default"; 121 pinctrl-names = "default";
130 pinctrl-0 = <&ir_pins_a>; 122 pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 6880268e8b87..5fea430e0eb1 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -52,7 +52,6 @@
52 compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3"; 52 compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
53 53
54 aliases { 54 aliases {
55 ethernet0 = &emac;
56 serial0 = &uart0; 55 serial0 = &uart0;
57 }; 56 };
58 57
@@ -98,13 +97,6 @@
98 status = "okay"; 97 status = "okay";
99}; 98};
100 99
101&emac {
102 phy-handle = <&int_mii_phy>;
103 phy-mode = "mii";
104 allwinner,leds-active-low;
105 status = "okay";
106};
107
108&mmc0 { 100&mmc0 {
109 pinctrl-names = "default"; 101 pinctrl-names = "default";
110 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 102 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
index a10281b455f5..8b93f5c781a7 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -53,11 +53,6 @@
53 }; 53 };
54}; 54};
55 55
56&emac {
57 /* LEDs changed to active high on the plus */
58 /delete-property/ allwinner,leds-active-low;
59};
60
61&mmc1 { 56&mmc1 {
62 pinctrl-names = "default"; 57 pinctrl-names = "default";
63 pinctrl-0 = <&mmc1_pins_a>; 58 pinctrl-0 = <&mmc1_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index 998b60f8d295..1a044b17d6c6 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -52,7 +52,6 @@
52 compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3"; 52 compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
53 53
54 aliases { 54 aliases {
55 ethernet0 = &emac;
56 serial0 = &uart0; 55 serial0 = &uart0;
57 }; 56 };
58 57
@@ -114,13 +113,6 @@
114 status = "okay"; 113 status = "okay";
115}; 114};
116 115
117&emac {
118 phy-handle = <&int_mii_phy>;
119 phy-mode = "mii";
120 allwinner,leds-active-low;
121 status = "okay";
122};
123
124&ir { 116&ir {
125 pinctrl-names = "default"; 117 pinctrl-names = "default";
126 pinctrl-0 = <&ir_pins_a>; 118 pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 331ed683ac62..828ae7a526d9 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -47,10 +47,6 @@
47 model = "Xunlong Orange Pi Plus / Plus 2"; 47 model = "Xunlong Orange Pi Plus / Plus 2";
48 compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; 48 compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
49 49
50 aliases {
51 ethernet0 = &emac;
52 };
53
54 reg_gmac_3v3: gmac-3v3 { 50 reg_gmac_3v3: gmac-3v3 {
55 compatible = "regulator-fixed"; 51 compatible = "regulator-fixed";
56 regulator-name = "gmac-3v3"; 52 regulator-name = "gmac-3v3";
@@ -78,24 +74,6 @@
78 status = "okay"; 74 status = "okay";
79}; 75};
80 76
81&emac {
82 pinctrl-names = "default";
83 pinctrl-0 = <&emac_rgmii_pins>;
84 phy-supply = <&reg_gmac_3v3>;
85 phy-handle = <&ext_rgmii_phy>;
86 phy-mode = "rgmii";
87
88 allwinner,leds-active-low;
89 status = "okay";
90};
91
92&mdio {
93 ext_rgmii_phy: ethernet-phy@1 {
94 compatible = "ethernet-phy-ieee802.3-c22";
95 reg = <0>;
96 };
97};
98
99&mmc2 { 77&mmc2 {
100 pinctrl-names = "default"; 78 pinctrl-names = "default";
101 pinctrl-0 = <&mmc2_8bit_pins>; 79 pinctrl-0 = <&mmc2_8bit_pins>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
index 80026f3caafc..97920b12a944 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
@@ -61,19 +61,3 @@
61 gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ 61 gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
62 }; 62 };
63}; 63};
64
65&emac {
66 pinctrl-names = "default";
67 pinctrl-0 = <&emac_rgmii_pins>;
68 phy-supply = <&reg_gmac_3v3>;
69 phy-handle = <&ext_rgmii_phy>;
70 phy-mode = "rgmii";
71 status = "okay";
72};
73
74&mdio {
75 ext_rgmii_phy: ethernet-phy@1 {
76 compatible = "ethernet-phy-ieee802.3-c22";
77 reg = <1>;
78 };
79};
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d38282b9e5d4..11240a8313c2 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -391,32 +391,6 @@
391 clocks = <&osc24M>; 391 clocks = <&osc24M>;
392 }; 392 };
393 393
394 emac: ethernet@1c30000 {
395 compatible = "allwinner,sun8i-h3-emac";
396 syscon = <&syscon>;
397 reg = <0x01c30000 0x10000>;
398 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
399 interrupt-names = "macirq";
400 resets = <&ccu RST_BUS_EMAC>;
401 reset-names = "stmmaceth";
402 clocks = <&ccu CLK_BUS_EMAC>;
403 clock-names = "stmmaceth";
404 #address-cells = <1>;
405 #size-cells = <0>;
406 status = "disabled";
407
408 mdio: mdio {
409 #address-cells = <1>;
410 #size-cells = <0>;
411 int_mii_phy: ethernet-phy@1 {
412 compatible = "ethernet-phy-ieee802.3-c22";
413 reg = <1>;
414 clocks = <&ccu CLK_BUS_EPHY>;
415 resets = <&ccu RST_BUS_EPHY>;
416 };
417 };
418 };
419
420 spi0: spi@01c68000 { 394 spi0: spi@01c68000 {
421 compatible = "allwinner,sun8i-h3-spi"; 395 compatible = "allwinner,sun8i-h3-spi";
422 reg = <0x01c68000 0x1000>; 396 reg = <0x01c68000 0x1000>;