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authorArnd Bergmann <arnd@arndb.de>2014-07-26 05:35:41 -0400
committerArnd Bergmann <arnd@arndb.de>2014-07-26 05:36:28 -0400
commitfd9f5edf6e7e8a666f3672fd809f3289c2da388a (patch)
tree4e3c8476cdf4d738d016e6da3d2c9bd6832051ac
parentf53b2bffc4e09a1c4bf3aff99ea27ef2bc274bfb (diff)
parent00e4e5b5b0339bde4b0ecb23d7d7969a3bebd44d (diff)
Merge tag 'omap-for-v3.17/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Merge non-urgent omap fixes from Tony Lindgren: Fixes for omaps that were not considered urgent enough for the rc series. Mostly a fix for GPMC allocation and omap5 ABB (Adaptive Body Bias). * tag 'omap-for-v3.17/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: omap2+: gpmc-nand: Use dynamic platform_device_alloc() omap16xx: Removes fixme no longer needed in ocpi_enable() ARM: dts: OMAP5: Add device nodes for ABB ARM: omap2+: usb-tusb6010.c: Cleaning up variable is set more than once Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm/boot/dts/omap5.dtsi60
-rw-r--r--arch/arm/mach-omap1/ocpi.c1
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c79
-rw-r--r--arch/arm/mach-omap2/usb-tusb6010.c1
4 files changed, 97 insertions, 44 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index a4ed54988866..8eee6fbef7ad 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -985,6 +985,66 @@
985 dma-names = "audio_tx"; 985 dma-names = "audio_tx";
986 }; 986 };
987 }; 987 };
988
989 abb_mpu: regulator-abb-mpu {
990 compatible = "ti,abb-v2";
991 regulator-name = "abb_mpu";
992 #address-cells = <0>;
993 #size-cells = <0>;
994 clocks = <&sys_clkin>;
995 ti,settling-time = <50>;
996 ti,clock-cycles = <16>;
997
998 reg = <0x4ae07cdc 0x8>, <0x4ae06014 0x4>,
999 <0x4a0021c4 0x8>, <0x4ae0c318 0x4>;
1000 reg-names = "base-address", "int-address",
1001 "efuse-address", "ldo-address";
1002 ti,tranxdone-status-mask = <0x80>;
1003 /* LDOVBBMPU_MUX_CTRL */
1004 ti,ldovbb-override-mask = <0x400>;
1005 /* LDOVBBMPU_VSET_OUT */
1006 ti,ldovbb-vset-mask = <0x1F>;
1007
1008 /*
1009 * NOTE: only FBB mode used but actual vset will
1010 * determine final biasing
1011 */
1012 ti,abb_info = <
1013 /*uV ABB efuse rbb_m fbb_m vset_m*/
1014 1060000 0 0x0 0 0x02000000 0x01F00000
1015 1250000 0 0x4 0 0x02000000 0x01F00000
1016 >;
1017 };
1018
1019 abb_mm: regulator-abb-mm {
1020 compatible = "ti,abb-v2";
1021 regulator-name = "abb_mm";
1022 #address-cells = <0>;
1023 #size-cells = <0>;
1024 clocks = <&sys_clkin>;
1025 ti,settling-time = <50>;
1026 ti,clock-cycles = <16>;
1027
1028 reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>,
1029 <0x4a0021a4 0x8>, <0x4ae0c314 0x4>;
1030 reg-names = "base-address", "int-address",
1031 "efuse-address", "ldo-address";
1032 ti,tranxdone-status-mask = <0x80000000>;
1033 /* LDOVBBMM_MUX_CTRL */
1034 ti,ldovbb-override-mask = <0x400>;
1035 /* LDOVBBMM_VSET_OUT */
1036 ti,ldovbb-vset-mask = <0x1F>;
1037
1038 /*
1039 * NOTE: only FBB mode used but actual vset will
1040 * determine final biasing
1041 */
1042 ti,abb_info = <
1043 /*uV ABB efuse rbb_m fbb_m vset_m*/
1044 1025000 0 0x0 0 0x02000000 0x01F00000
1045 1120000 0 0x4 0 0x02000000 0x01F00000
1046 >;
1047 };
988 }; 1048 };
989}; 1049};
990 1050
diff --git a/arch/arm/mach-omap1/ocpi.c b/arch/arm/mach-omap1/ocpi.c
index 238170cab5b7..44a3d19eb481 100644
--- a/arch/arm/mach-omap1/ocpi.c
+++ b/arch/arm/mach-omap1/ocpi.c
@@ -55,7 +55,6 @@ static struct clk *ocpi_ck;
55 55
56/* 56/*
57 * Enables device access to OMAP buses via the OCPI bridge 57 * Enables device access to OMAP buses via the OCPI bridge
58 * FIXME: Add locking
59 */ 58 */
60int ocpi_enable(void) 59int ocpi_enable(void)
61{ 60{
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 17cd39360afe..7ab486eeb769 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -24,25 +24,6 @@
24/* minimum size for IO mapping */ 24/* minimum size for IO mapping */
25#define NAND_IO_SIZE 4 25#define NAND_IO_SIZE 4
26 26
27static struct resource gpmc_nand_resource[] = {
28 {
29 .flags = IORESOURCE_MEM,
30 },
31 {
32 .flags = IORESOURCE_IRQ,
33 },
34 {
35 .flags = IORESOURCE_IRQ,
36 },
37};
38
39static struct platform_device gpmc_nand_device = {
40 .name = "omap2-nand",
41 .id = 0,
42 .num_resources = ARRAY_SIZE(gpmc_nand_resource),
43 .resource = gpmc_nand_resource,
44};
45
46static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) 27static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
47{ 28{
48 /* platforms which support all ECC schemes */ 29 /* platforms which support all ECC schemes */
@@ -93,43 +74,41 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
93{ 74{
94 int err = 0; 75 int err = 0;
95 struct gpmc_settings s; 76 struct gpmc_settings s;
96 struct device *dev = &gpmc_nand_device.dev; 77 struct platform_device *pdev;
97 78 struct resource gpmc_nand_res[] = {
98 memset(&s, 0, sizeof(struct gpmc_settings)); 79 { .flags = IORESOURCE_MEM, },
80 { .flags = IORESOURCE_IRQ, },
81 { .flags = IORESOURCE_IRQ, },
82 };
99 83
100 gpmc_nand_device.dev.platform_data = gpmc_nand_data; 84 BUG_ON(gpmc_nand_data->cs >= GPMC_CS_NUM);
101 85
102 err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, 86 err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
103 (unsigned long *)&gpmc_nand_resource[0].start); 87 (unsigned long *)&gpmc_nand_res[0].start);
104 if (err < 0) { 88 if (err < 0) {
105 dev_err(dev, "Cannot request GPMC CS %d, error %d\n", 89 pr_err("omap2-gpmc: Cannot request GPMC CS %d, error %d\n",
106 gpmc_nand_data->cs, err); 90 gpmc_nand_data->cs, err);
107 return err; 91 return err;
108 } 92 }
109 93 gpmc_nand_res[0].end = gpmc_nand_res[0].start + NAND_IO_SIZE - 1;
110 gpmc_nand_resource[0].end = gpmc_nand_resource[0].start + 94 gpmc_nand_res[1].start = gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
111 NAND_IO_SIZE - 1; 95 gpmc_nand_res[2].start = gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
112
113 gpmc_nand_resource[1].start =
114 gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
115 gpmc_nand_resource[2].start =
116 gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
117 96
118 if (gpmc_t) { 97 if (gpmc_t) {
119 err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t); 98 err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t);
120 if (err < 0) { 99 if (err < 0) {
121 dev_err(dev, "Unable to set gpmc timings: %d\n", err); 100 pr_err("omap2-gpmc: Unable to set gpmc timings: %d\n", err);
122 return err; 101 return err;
123 } 102 }
124 } 103 }
125 104
105 memset(&s, 0, sizeof(struct gpmc_settings));
126 if (gpmc_nand_data->of_node) 106 if (gpmc_nand_data->of_node)
127 gpmc_read_settings_dt(gpmc_nand_data->of_node, &s); 107 gpmc_read_settings_dt(gpmc_nand_data->of_node, &s);
128 else 108 else
129 gpmc_set_legacy(gpmc_nand_data, &s); 109 gpmc_set_legacy(gpmc_nand_data, &s);
130 110
131 s.device_nand = true; 111 s.device_nand = true;
132
133 err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s); 112 err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s);
134 if (err < 0) 113 if (err < 0)
135 goto out_free_cs; 114 goto out_free_cs;
@@ -141,18 +120,34 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
141 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); 120 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
142 121
143 if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) { 122 if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) {
144 dev_err(dev, "Unsupported NAND ECC scheme selected\n"); 123 pr_err("omap2-nand: Unsupported NAND ECC scheme selected\n");
145 return -EINVAL; 124 err = -EINVAL;
125 goto out_free_cs;
146 } 126 }
147 127
148 err = platform_device_register(&gpmc_nand_device); 128
149 if (err < 0) { 129 pdev = platform_device_alloc("omap2-nand", gpmc_nand_data->cs);
150 dev_err(dev, "Unable to register NAND device\n"); 130 if (pdev) {
151 goto out_free_cs; 131 err = platform_device_add_resources(pdev, gpmc_nand_res,
132 ARRAY_SIZE(gpmc_nand_res));
133 if (!err)
134 pdev->dev.platform_data = gpmc_nand_data;
135 } else {
136 err = -ENOMEM;
137 }
138 if (err)
139 goto out_free_pdev;
140
141 err = platform_device_add(pdev);
142 if (err) {
143 dev_err(&pdev->dev, "Unable to register NAND device\n");
144 goto out_free_pdev;
152 } 145 }
153 146
154 return 0; 147 return 0;
155 148
149out_free_pdev:
150 platform_device_put(pdev);
156out_free_cs: 151out_free_cs:
157 gpmc_cs_free(gpmc_nand_data->cs); 152 gpmc_cs_free(gpmc_nand_data->cs);
158 153
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index e832bc7b8e2d..8333400898fb 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -95,7 +95,6 @@ static int tusb_set_sync_mode(unsigned sysclk_ps)
95 dev_t.t_avdp_w = t_scsnh_advnh; 95 dev_t.t_avdp_w = t_scsnh_advnh;
96 dev_t.cyc_aavdh_we = 3; 96 dev_t.cyc_aavdh_we = 3;
97 dev_t.cyc_wpl = 6; 97 dev_t.cyc_wpl = 6;
98 dev_t.t_ce_rdyz = 7000;
99 98
100 gpmc_calc_timings(&t, &tusb_sync, &dev_t); 99 gpmc_calc_timings(&t, &tusb_sync, &dev_t);
101 100