diff options
author | Dave Airlie <airlied@redhat.com> | 2016-05-06 00:17:43 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2016-05-06 00:17:43 -0400 |
commit | fd50c3a0326152d97ef02f0d55ee48d7ae66d73f (patch) | |
tree | 987595a87209eac1e1e9b35ab270b930b1dd63fc | |
parent | a64424d722504926f3375bc4887976e3bfe3a01d (diff) | |
parent | 2c80661d2ea9bac9bc7ba519097745829add1871 (diff) |
Merge branch 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu into drm-next
fsl-dcu pixel clock polarity support
* 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu:
drm/fsl-dcu: use bus_flags for pixel clock polarity
drm: introduce bus_flags in drm_display_info
-rw-r--r-- | drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/panel/panel-simple.c | 5 | ||||
-rw-r--r-- | include/drm/drm_crtc.h | 9 |
4 files changed, 20 insertions, 3 deletions
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index 365809edf29a..89c0084c2814 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | |||
@@ -66,6 +66,7 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) | |||
66 | { | 66 | { |
67 | struct drm_device *dev = crtc->dev; | 67 | struct drm_device *dev = crtc->dev; |
68 | struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; | 68 | struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; |
69 | struct drm_connector *con = &fsl_dev->connector.base; | ||
69 | struct drm_display_mode *mode = &crtc->state->mode; | 70 | struct drm_display_mode *mode = &crtc->state->mode; |
70 | unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0; | 71 | unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0; |
71 | 72 | ||
@@ -80,6 +81,10 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) | |||
80 | vfp = mode->vsync_start - mode->vdisplay; | 81 | vfp = mode->vsync_start - mode->vdisplay; |
81 | vsw = mode->vsync_end - mode->vsync_start; | 82 | vsw = mode->vsync_end - mode->vsync_start; |
82 | 83 | ||
84 | /* INV_PXCK as default (most display sample data on rising edge) */ | ||
85 | if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)) | ||
86 | pol |= DCU_SYN_POL_INV_PXCK; | ||
87 | |||
83 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) | 88 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) |
84 | pol |= DCU_SYN_POL_INV_HS_LOW; | 89 | pol |= DCU_SYN_POL_INV_HS_LOW; |
85 | 90 | ||
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h index 5bb7c261fe95..c275f900ff23 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h | |||
@@ -47,8 +47,8 @@ | |||
47 | #define DCU_VSYN_PARA_FP(x) (x) | 47 | #define DCU_VSYN_PARA_FP(x) (x) |
48 | 48 | ||
49 | #define DCU_SYN_POL 0x0024 | 49 | #define DCU_SYN_POL 0x0024 |
50 | #define DCU_SYN_POL_INV_PXCK_FALL (0 << 6) | 50 | #define DCU_SYN_POL_INV_PXCK BIT(6) |
51 | #define DCU_SYN_POL_NEG_REMAIN (0 << 5) | 51 | #define DCU_SYN_POL_NEG BIT(5) |
52 | #define DCU_SYN_POL_INV_VS_LOW BIT(1) | 52 | #define DCU_SYN_POL_INV_VS_LOW BIT(1) |
53 | #define DCU_SYN_POL_INV_HS_LOW BIT(0) | 53 | #define DCU_SYN_POL_INV_HS_LOW BIT(0) |
54 | 54 | ||
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index ceb20486dacf..b19c88f188b0 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c | |||
@@ -72,6 +72,7 @@ struct panel_desc { | |||
72 | } delay; | 72 | } delay; |
73 | 73 | ||
74 | u32 bus_format; | 74 | u32 bus_format; |
75 | u32 bus_flags; | ||
75 | }; | 76 | }; |
76 | 77 | ||
77 | struct panel_simple { | 78 | struct panel_simple { |
@@ -144,6 +145,7 @@ static int panel_simple_get_fixed_modes(struct panel_simple *panel) | |||
144 | if (panel->desc->bus_format) | 145 | if (panel->desc->bus_format) |
145 | drm_display_info_set_bus_formats(&connector->display_info, | 146 | drm_display_info_set_bus_formats(&connector->display_info, |
146 | &panel->desc->bus_format, 1); | 147 | &panel->desc->bus_format, 1); |
148 | connector->display_info.bus_flags = panel->desc->bus_flags; | ||
147 | 149 | ||
148 | return num; | 150 | return num; |
149 | } | 151 | } |
@@ -1051,7 +1053,8 @@ static const struct panel_desc nec_nl4827hc19_05b = { | |||
1051 | .width = 95, | 1053 | .width = 95, |
1052 | .height = 54, | 1054 | .height = 54, |
1053 | }, | 1055 | }, |
1054 | .bus_format = MEDIA_BUS_FMT_RGB888_1X24 | 1056 | .bus_format = MEDIA_BUS_FMT_RGB888_1X24, |
1057 | .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE, | ||
1055 | }; | 1058 | }; |
1056 | 1059 | ||
1057 | static const struct display_timing okaya_rs800480t_7x0gp_timing = { | 1060 | static const struct display_timing okaya_rs800480t_7x0gp_timing = { |
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 4acdaf5e283d..d1559cd04e3d 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h | |||
@@ -118,6 +118,14 @@ enum subpixel_order { | |||
118 | #define DRM_COLOR_FORMAT_RGB444 (1<<0) | 118 | #define DRM_COLOR_FORMAT_RGB444 (1<<0) |
119 | #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) | 119 | #define DRM_COLOR_FORMAT_YCRCB444 (1<<1) |
120 | #define DRM_COLOR_FORMAT_YCRCB422 (1<<2) | 120 | #define DRM_COLOR_FORMAT_YCRCB422 (1<<2) |
121 | |||
122 | #define DRM_BUS_FLAG_DE_LOW (1<<0) | ||
123 | #define DRM_BUS_FLAG_DE_HIGH (1<<1) | ||
124 | /* drive data on pos. edge */ | ||
125 | #define DRM_BUS_FLAG_PIXDATA_POSEDGE (1<<2) | ||
126 | /* drive data on neg. edge */ | ||
127 | #define DRM_BUS_FLAG_PIXDATA_NEGEDGE (1<<3) | ||
128 | |||
121 | /* | 129 | /* |
122 | * Describes a given display (e.g. CRT or flat panel) and its limitations. | 130 | * Describes a given display (e.g. CRT or flat panel) and its limitations. |
123 | */ | 131 | */ |
@@ -139,6 +147,7 @@ struct drm_display_info { | |||
139 | 147 | ||
140 | const u32 *bus_formats; | 148 | const u32 *bus_formats; |
141 | unsigned int num_bus_formats; | 149 | unsigned int num_bus_formats; |
150 | u32 bus_flags; | ||
142 | 151 | ||
143 | /* Mask of supported hdmi deep color modes */ | 152 | /* Mask of supported hdmi deep color modes */ |
144 | u8 edid_hdmi_dc_modes; | 153 | u8 edid_hdmi_dc_modes; |