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authorShobhit Kumar <shobhit.kumar@intel.com>2015-06-26 05:02:09 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-07-21 03:22:43 -0400
commitfc45e821990781c13dba10e3aef1c9f11af8af08 (patch)
tree0ac367920766d82b70e57fe28aa541e3a59dca53
parenta3f37a104bc42f19ceb74e3e06752b6e3a269745 (diff)
drm/i915: Use the CRC gpio for panel enable/disable
The CRC (Crystal Cove) PMIC, controls the panel enable and disable signals for BYT for dsi panels. This is indicated in the VBT fields. Use that to initialize and use GPIO based control for these signals. v2: Use the newer gpiod interface(Alexandre) v3: Remove the redundant checks and unused code (Ville) v4: Moved PWM vs SoC backlight #defines to intel_bios.h (Jani) CC: Samuel Ortiz <sameo@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_bios.h7
-rw-r--r--drivers/gpu/drm/i915/intel_dsi.c32
-rw-r--r--drivers/gpu/drm/i915/intel_dsi.h3
3 files changed, 40 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index af0b47652752..f7ad6a585129 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -778,6 +778,13 @@ int intel_parse_bios(struct drm_device *dev);
778#define MIPI_DSI_UNDEFINED_PANEL_ID 0 778#define MIPI_DSI_UNDEFINED_PANEL_ID 0
779#define MIPI_DSI_GENERIC_PANEL_ID 1 779#define MIPI_DSI_GENERIC_PANEL_ID 1
780 780
781/*
782 * PMIC vs SoC Backlight support specified in pwm_blc
783 * field in mipi_config block below.
784*/
785#define PPS_BLC_PMIC 0
786#define PPS_BLC_SOC 1
787
781struct mipi_config { 788struct mipi_config {
782 u16 panel_id; 789 u16 panel_id;
783 790
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index b5a5558ecd63..c4db74a5e4e7 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -31,6 +31,7 @@
31#include <drm/drm_panel.h> 31#include <drm/drm_panel.h>
32#include <drm/drm_mipi_dsi.h> 32#include <drm/drm_mipi_dsi.h>
33#include <linux/slab.h> 33#include <linux/slab.h>
34#include <linux/gpio/consumer.h>
34#include "i915_drv.h" 35#include "i915_drv.h"
35#include "intel_drv.h" 36#include "intel_drv.h"
36#include "intel_dsi.h" 37#include "intel_dsi.h"
@@ -415,6 +416,12 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
415 416
416 DRM_DEBUG_KMS("\n"); 417 DRM_DEBUG_KMS("\n");
417 418
419 /* Panel Enable over CRC PMIC */
420 if (intel_dsi->gpio_panel)
421 gpiod_set_value_cansleep(intel_dsi->gpio_panel, 1);
422
423 msleep(intel_dsi->panel_on_delay);
424
418 /* Disable DPOunit clock gating, can stall pipe 425 /* Disable DPOunit clock gating, can stall pipe
419 * and we need DPLL REFA always enabled */ 426 * and we need DPLL REFA always enabled */
420 tmp = I915_READ(DPLL(pipe)); 427 tmp = I915_READ(DPLL(pipe));
@@ -432,8 +439,6 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder)
432 /* put device in ready state */ 439 /* put device in ready state */
433 intel_dsi_device_ready(encoder); 440 intel_dsi_device_ready(encoder);
434 441
435 msleep(intel_dsi->panel_on_delay);
436
437 drm_panel_prepare(intel_dsi->panel); 442 drm_panel_prepare(intel_dsi->panel);
438 443
439 for_each_dsi_port(port, intel_dsi->ports) 444 for_each_dsi_port(port, intel_dsi->ports)
@@ -576,6 +581,10 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder)
576 581
577 msleep(intel_dsi->panel_off_delay); 582 msleep(intel_dsi->panel_off_delay);
578 msleep(intel_dsi->panel_pwr_cycle_delay); 583 msleep(intel_dsi->panel_pwr_cycle_delay);
584
585 /* Panel Disable over CRC PMIC */
586 if (intel_dsi->gpio_panel)
587 gpiod_set_value_cansleep(intel_dsi->gpio_panel, 0);
579} 588}
580 589
581static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, 590static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
@@ -955,6 +964,11 @@ static void intel_dsi_encoder_destroy(struct drm_encoder *encoder)
955 /* XXX: Logically this call belongs in the panel driver. */ 964 /* XXX: Logically this call belongs in the panel driver. */
956 drm_panel_remove(intel_dsi->panel); 965 drm_panel_remove(intel_dsi->panel);
957 } 966 }
967
968 /* dispose of the gpios */
969 if (intel_dsi->gpio_panel)
970 gpiod_put(intel_dsi->gpio_panel);
971
958 intel_encoder_destroy(encoder); 972 intel_encoder_destroy(encoder);
959} 973}
960 974
@@ -1071,6 +1085,20 @@ void intel_dsi_init(struct drm_device *dev)
1071 goto err; 1085 goto err;
1072 } 1086 }
1073 1087
1088 /*
1089 * In case of BYT with CRC PMIC, we need to use GPIO for
1090 * Panel control.
1091 */
1092 if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) {
1093 intel_dsi->gpio_panel =
1094 gpiod_get(dev->dev, "panel", GPIOD_OUT_HIGH);
1095
1096 if (IS_ERR(intel_dsi->gpio_panel)) {
1097 DRM_ERROR("Failed to own gpio for panel control\n");
1098 intel_dsi->gpio_panel = NULL;
1099 }
1100 }
1101
1074 intel_encoder->type = INTEL_OUTPUT_DSI; 1102 intel_encoder->type = INTEL_OUTPUT_DSI;
1075 intel_encoder->cloneable = 0; 1103 intel_encoder->cloneable = 0;
1076 drm_connector_init(dev, connector, &intel_dsi_connector_funcs, 1104 drm_connector_init(dev, connector, &intel_dsi_connector_funcs,
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 2784ac442368..42a68593e32a 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -42,6 +42,9 @@ struct intel_dsi {
42 struct drm_panel *panel; 42 struct drm_panel *panel;
43 struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; 43 struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
44 44
45 /* GPIO Desc for CRC based Panel control */
46 struct gpio_desc *gpio_panel;
47
45 struct intel_connector *attached_connector; 48 struct intel_connector *attached_connector;
46 49
47 /* bit mask of ports being driven */ 50 /* bit mask of ports being driven */