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authorAndrey Smirnov <andrew.smirnov@gmail.com>2016-08-03 15:29:38 -0400
committerRussell King <rmk+kernel@armlinux.org.uk>2016-08-12 11:47:03 -0400
commitfc1473103cfa0b785dd3ff8de2430fec42cfc8ad (patch)
treeb92445c289abed453b0ac235e691e20bceaea1a9
parent7d281b620d229486429d851b10a05da871d22e79 (diff)
ARM: 8592/1: cache-l2x0.c: Replace magic numbers
Replace magic numbers used for L310 Prefetch Control Register Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mm/cache-l2x0.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index cc12905ae6f8..7e624872bd6f 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -710,8 +710,10 @@ static void __init l2c310_fixup(void __iomem *base, u32 cache_id,
710 revision < L310_CACHE_ID_RTL_R3P2) { 710 revision < L310_CACHE_ID_RTL_R3P2) {
711 u32 val = l2x0_saved_regs.prefetch_ctrl; 711 u32 val = l2x0_saved_regs.prefetch_ctrl;
712 /* I don't think bit23 is required here... but iMX6 does so */ 712 /* I don't think bit23 is required here... but iMX6 does so */
713 if (val & (BIT(30) | BIT(23))) { 713 if (val & (L310_PREFETCH_CTRL_DBL_LINEFILL |
714 val &= ~(BIT(30) | BIT(23)); 714 L310_PREFETCH_CTRL_DBL_LINEFILL_INCR)) {
715 val &= ~(L310_PREFETCH_CTRL_DBL_LINEFILL |
716 L310_PREFETCH_CTRL_DBL_LINEFILL_INCR);
715 l2x0_saved_regs.prefetch_ctrl = val; 717 l2x0_saved_regs.prefetch_ctrl = val;
716 errata[n++] = "752271"; 718 errata[n++] = "752271";
717 } 719 }