diff options
| author | Markos Chandras <markos.chandras@imgtec.com> | 2015-03-23 08:32:01 -0400 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2015-03-29 16:08:23 -0400 |
| commit | fa6ed4cb6fd44ef4c6fad4d9572119d22381f32c (patch) | |
| tree | a6d26f5e387e3dd13c6a7f61bdba4071ea53406c | |
| parent | 00e6743b5b7333a589c7607aa0ed20416831034d (diff) | |
irqchip: mips-gic: Add new functions to start/stop the GIC counter
We add new functions to start and stop the GIC counter since there are no
guarantees the counter will be running after a CPU reset. The GIC counter
is stopped by setting the 29th bit on the GIC Config register and it is
started by clearing that bit.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: <linux-kernel@vger.kernel.org>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Link: https://lkml.kernel.org/r/1427113923-9840-2-git-send-email-markos.chandras@imgtec.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| -rw-r--r-- | drivers/irqchip/irq-mips-gic.c | 21 | ||||
| -rw-r--r-- | include/linux/irqchip/mips-gic.h | 2 |
2 files changed, 23 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index 9acdc080e7ec..f2d269bca789 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c | |||
| @@ -166,6 +166,27 @@ cycle_t gic_read_compare(void) | |||
| 166 | 166 | ||
| 167 | return (((cycle_t) hi) << 32) + lo; | 167 | return (((cycle_t) hi) << 32) + lo; |
| 168 | } | 168 | } |
| 169 | |||
| 170 | void gic_start_count(void) | ||
| 171 | { | ||
| 172 | u32 gicconfig; | ||
| 173 | |||
| 174 | /* Start the counter */ | ||
| 175 | gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG)); | ||
| 176 | gicconfig &= ~(1 << GIC_SH_CONFIG_COUNTSTOP_SHF); | ||
| 177 | gic_write(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig); | ||
| 178 | } | ||
| 179 | |||
| 180 | void gic_stop_count(void) | ||
| 181 | { | ||
| 182 | u32 gicconfig; | ||
| 183 | |||
| 184 | /* Stop the counter */ | ||
| 185 | gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG)); | ||
| 186 | gicconfig |= 1 << GIC_SH_CONFIG_COUNTSTOP_SHF; | ||
| 187 | gic_write(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig); | ||
| 188 | } | ||
| 189 | |||
| 169 | #endif | 190 | #endif |
| 170 | 191 | ||
| 171 | static bool gic_local_irq_is_routable(int intr) | 192 | static bool gic_local_irq_is_routable(int intr) |
diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h index e6a6aac451db..3ea2e4754c40 100644 --- a/include/linux/irqchip/mips-gic.h +++ b/include/linux/irqchip/mips-gic.h | |||
| @@ -240,6 +240,8 @@ extern unsigned int gic_get_count_width(void); | |||
| 240 | extern cycle_t gic_read_compare(void); | 240 | extern cycle_t gic_read_compare(void); |
| 241 | extern void gic_write_compare(cycle_t cnt); | 241 | extern void gic_write_compare(cycle_t cnt); |
| 242 | extern void gic_write_cpu_compare(cycle_t cnt, int cpu); | 242 | extern void gic_write_cpu_compare(cycle_t cnt, int cpu); |
| 243 | extern void gic_start_count(void); | ||
| 244 | extern void gic_stop_count(void); | ||
| 243 | extern void gic_send_ipi(unsigned int intr); | 245 | extern void gic_send_ipi(unsigned int intr); |
| 244 | extern unsigned int plat_ipi_call_int_xlate(unsigned int); | 246 | extern unsigned int plat_ipi_call_int_xlate(unsigned int); |
| 245 | extern unsigned int plat_ipi_resched_int_xlate(unsigned int); | 247 | extern unsigned int plat_ipi_resched_int_xlate(unsigned int); |
