diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-12-08 08:46:41 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-12-18 09:59:17 -0500 |
commit | f8d3bc10041914cceef4585a38cfdc071724b2a7 (patch) | |
tree | 3146eb5bdf0ac3681852d1719d07f0826eb8c6b7 | |
parent | eb90826babfb13cf5cf240187d56cdfed9df5064 (diff) |
eeprom: at25: Add DT support for EEPROMs with odd address bits
Certain EEPROMS have a size that is larger than the number of address
bytes would allow, and store the MSB of the address in bit 3 of the
instruction byte.
This can be described in platform data using EE_INSTR_BIT3_IS_ADDR, or
in DT using the obsolete legacy "at25,addr-mode" property.
But currently there exists no non-deprecated way to describe this in DT.
Hence extend the existing "address-width" DT property to allow
specifying 9 address bits, and enable support for that in the driver.
This has been tested with a Microchip 25LC040A.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | Documentation/devicetree/bindings/eeprom/at25.txt | 4 | ||||
-rw-r--r-- | drivers/misc/eeprom/at25.c | 3 |
2 files changed, 6 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/eeprom/at25.txt b/Documentation/devicetree/bindings/eeprom/at25.txt index e823d90b802f..b3bde97dc199 100644 --- a/Documentation/devicetree/bindings/eeprom/at25.txt +++ b/Documentation/devicetree/bindings/eeprom/at25.txt | |||
@@ -11,7 +11,9 @@ Required properties: | |||
11 | - spi-max-frequency : max spi frequency to use | 11 | - spi-max-frequency : max spi frequency to use |
12 | - pagesize : size of the eeprom page | 12 | - pagesize : size of the eeprom page |
13 | - size : total eeprom size in bytes | 13 | - size : total eeprom size in bytes |
14 | - address-width : number of address bits (one of 8, 16, or 24) | 14 | - address-width : number of address bits (one of 8, 9, 16, or 24). |
15 | For 9 bits, the MSB of the address is sent as bit 3 of the instruction | ||
16 | byte, before the address byte. | ||
15 | 17 | ||
16 | Optional properties: | 18 | Optional properties: |
17 | - spi-cpha : SPI shifted clock phase, as per spi-bus bindings. | 19 | - spi-cpha : SPI shifted clock phase, as per spi-bus bindings. |
diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c index 5afe4cd16569..9282ffd607ff 100644 --- a/drivers/misc/eeprom/at25.c +++ b/drivers/misc/eeprom/at25.c | |||
@@ -276,6 +276,9 @@ static int at25_fw_to_chip(struct device *dev, struct spi_eeprom *chip) | |||
276 | return -ENODEV; | 276 | return -ENODEV; |
277 | } | 277 | } |
278 | switch (val) { | 278 | switch (val) { |
279 | case 9: | ||
280 | chip->flags |= EE_INSTR_BIT3_IS_ADDR; | ||
281 | /* fall through */ | ||
279 | case 8: | 282 | case 8: |
280 | chip->flags |= EE_ADDR1; | 283 | chip->flags |= EE_ADDR1; |
281 | break; | 284 | break; |