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authorAyan Kumar Halder <ayan.halder@arm.com>2018-05-15 12:04:18 -0400
committerLiviu Dudau <Liviu.Dudau@arm.com>2018-07-05 10:19:08 -0400
commitf877006d5db49f3615fcee4bd5eb1a56c053d419 (patch)
treea9334e928e3964bc28aaf697db171912d4254d81
parentfbcc454e8a350b929cb04fbcfdfa72fab37acf38 (diff)
drm/arm/malidp: Set the output_depth register in modeset
One needs to store the value of the OUTPUT_DEPTH that one has parsed from device tree, so that it can be restored on system resume. This value is set in the modeset function as this gets reset when the system suspends. Signed-off-by: Ayan Kumar Halder <ayan.halder@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
-rw-r--r--drivers/gpu/drm/arm/malidp_drv.c1
-rw-r--r--drivers/gpu/drm/arm/malidp_hw.c4
-rw-r--r--drivers/gpu/drm/arm/malidp_hw.h1
3 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c
index 125be226bf6c..7237b98be5eb 100644
--- a/drivers/gpu/drm/arm/malidp_drv.c
+++ b/drivers/gpu/drm/arm/malidp_drv.c
@@ -715,6 +715,7 @@ static int malidp_bind(struct device *dev)
715 for (i = 0; i < MAX_OUTPUT_CHANNELS; i++) 715 for (i = 0; i < MAX_OUTPUT_CHANNELS; i++)
716 out_depth = (out_depth << 8) | (output_width[i] & 0xf); 716 out_depth = (out_depth << 8) | (output_width[i] & 0xf);
717 malidp_hw_write(hwdev, out_depth, hwdev->hw->map.out_depth_base); 717 malidp_hw_write(hwdev, out_depth, hwdev->hw->map.out_depth_base);
718 hwdev->output_color_depth = out_depth;
718 719
719 atomic_set(&malidp->config_valid, MALIDP_CONFIG_VALID_INIT); 720 atomic_set(&malidp->config_valid, MALIDP_CONFIG_VALID_INIT);
720 init_waitqueue_head(&malidp->wq); 721 init_waitqueue_head(&malidp->wq);
diff --git a/drivers/gpu/drm/arm/malidp_hw.c b/drivers/gpu/drm/arm/malidp_hw.c
index 47fc112ee32e..c94a4422e0e9 100644
--- a/drivers/gpu/drm/arm/malidp_hw.c
+++ b/drivers/gpu/drm/arm/malidp_hw.c
@@ -244,6 +244,8 @@ static void malidp500_modeset(struct malidp_hw_device *hwdev, struct videomode *
244{ 244{
245 u32 val = 0; 245 u32 val = 0;
246 246
247 malidp_hw_write(hwdev, hwdev->output_color_depth,
248 hwdev->hw->map.out_depth_base);
247 malidp_hw_clearbits(hwdev, MALIDP500_DC_CLEAR_MASK, MALIDP500_DC_CONTROL); 249 malidp_hw_clearbits(hwdev, MALIDP500_DC_CLEAR_MASK, MALIDP500_DC_CONTROL);
248 if (mode->flags & DISPLAY_FLAGS_HSYNC_HIGH) 250 if (mode->flags & DISPLAY_FLAGS_HSYNC_HIGH)
249 val |= MALIDP500_HSYNCPOL; 251 val |= MALIDP500_HSYNCPOL;
@@ -520,6 +522,8 @@ static void malidp550_modeset(struct malidp_hw_device *hwdev, struct videomode *
520{ 522{
521 u32 val = MALIDP_DE_DEFAULT_PREFETCH_START; 523 u32 val = MALIDP_DE_DEFAULT_PREFETCH_START;
522 524
525 malidp_hw_write(hwdev, hwdev->output_color_depth,
526 hwdev->hw->map.out_depth_base);
523 malidp_hw_write(hwdev, val, MALIDP550_DE_CONTROL); 527 malidp_hw_write(hwdev, val, MALIDP550_DE_CONTROL);
524 /* 528 /*
525 * Mali-DP550 and Mali-DP650 encode the background color like this: 529 * Mali-DP550 and Mali-DP650 encode the background color like this:
diff --git a/drivers/gpu/drm/arm/malidp_hw.h b/drivers/gpu/drm/arm/malidp_hw.h
index f5b3eab8398b..ad2e96915d44 100644
--- a/drivers/gpu/drm/arm/malidp_hw.h
+++ b/drivers/gpu/drm/arm/malidp_hw.h
@@ -230,6 +230,7 @@ struct malidp_hw_device {
230 230
231 u8 min_line_size; 231 u8 min_line_size;
232 u16 max_line_size; 232 u16 max_line_size;
233 u32 output_color_depth;
233 234
234 /* track the device PM state */ 235 /* track the device PM state */
235 bool pm_suspended; 236 bool pm_suspended;