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authorEugeniy Paltsev <Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>2017-06-26 07:47:25 -0400
committerVineet Gupta <vgupta@synopsys.com>2017-08-04 04:19:23 -0400
commitf862b31514bad66e48d9d4ff6036ee051cf36a6f (patch)
tree2efaa1d5d30c9c1b6bb199e8a0e65f7bcc6ad89e
parent29178c1473fd4ad9c523b41bb18a047749c66d11 (diff)
ARC: [plat-axs10x]: prepare dts files for enabling PAE40 on axs103
Enable 64bit adressing, where it needed, to make possible enabling PAE40 on axs103. This patch doesn't affect on any functionality. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat
-rw-r--r--arch/arc/boot/dts/axc001.dtsi20
-rw-r--r--arch/arc/boot/dts/axc003.dtsi21
-rw-r--r--arch/arc/boot/dts/axc003_idu.dtsi21
-rw-r--r--arch/arc/boot/dts/axs10x_mb.dtsi2
4 files changed, 30 insertions, 34 deletions
diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index 53ce226f77a5..a380ffa1a458 100644
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -15,15 +15,15 @@
15 15
16/ { 16/ {
17 compatible = "snps,arc"; 17 compatible = "snps,arc";
18 #address-cells = <1>; 18 #address-cells = <2>;
19 #size-cells = <1>; 19 #size-cells = <2>;
20 20
21 cpu_card { 21 cpu_card {
22 compatible = "simple-bus"; 22 compatible = "simple-bus";
23 #address-cells = <1>; 23 #address-cells = <1>;
24 #size-cells = <1>; 24 #size-cells = <1>;
25 25
26 ranges = <0x00000000 0xf0000000 0x10000000>; 26 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
27 27
28 core_clk: core_clk { 28 core_clk: core_clk {
29 #clock-cells = <0>; 29 #clock-cells = <0>;
@@ -91,23 +91,21 @@
91 mb_intc: dw-apb-ictl@0xe0012000 { 91 mb_intc: dw-apb-ictl@0xe0012000 {
92 #interrupt-cells = <1>; 92 #interrupt-cells = <1>;
93 compatible = "snps,dw-apb-ictl"; 93 compatible = "snps,dw-apb-ictl";
94 reg = < 0xe0012000 0x200 >; 94 reg = < 0x0 0xe0012000 0x0 0x200 >;
95 interrupt-controller; 95 interrupt-controller;
96 interrupt-parent = <&core_intc>; 96 interrupt-parent = <&core_intc>;
97 interrupts = < 7 >; 97 interrupts = < 7 >;
98 }; 98 };
99 99
100 memory { 100 memory {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 ranges = <0x00000000 0x80000000 0x20000000>;
104 device_type = "memory"; 101 device_type = "memory";
105 reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */ 102 /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
103 reg = <0x0 0x80000000 0x0 0x1b000000>; /* (512 - 32) MiB */
106 }; 104 };
107 105
108 reserved-memory { 106 reserved-memory {
109 #address-cells = <1>; 107 #address-cells = <2>;
110 #size-cells = <1>; 108 #size-cells = <2>;
111 ranges; 109 ranges;
112 /* 110 /*
113 * We just move frame buffer area to the very end of 111 * We just move frame buffer area to the very end of
@@ -118,7 +116,7 @@
118 */ 116 */
119 frame_buffer: frame_buffer@9e000000 { 117 frame_buffer: frame_buffer@9e000000 {
120 compatible = "shared-dma-pool"; 118 compatible = "shared-dma-pool";
121 reg = <0x9e000000 0x2000000>; 119 reg = <0x0 0x9e000000 0x0 0x2000000>;
122 no-map; 120 no-map;
123 }; 121 };
124 }; 122 };
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index 14df46f141bf..cc9239ef8d08 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -14,15 +14,15 @@
14 14
15/ { 15/ {
16 compatible = "snps,arc"; 16 compatible = "snps,arc";
17 #address-cells = <1>; 17 #address-cells = <2>;
18 #size-cells = <1>; 18 #size-cells = <2>;
19 19
20 cpu_card { 20 cpu_card {
21 compatible = "simple-bus"; 21 compatible = "simple-bus";
22 #address-cells = <1>; 22 #address-cells = <1>;
23 #size-cells = <1>; 23 #size-cells = <1>;
24 24
25 ranges = <0x00000000 0xf0000000 0x10000000>; 25 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
26 26
27 core_clk: core_clk { 27 core_clk: core_clk {
28 #clock-cells = <0>; 28 #clock-cells = <0>;
@@ -94,30 +94,29 @@
94 mb_intc: dw-apb-ictl@0xe0012000 { 94 mb_intc: dw-apb-ictl@0xe0012000 {
95 #interrupt-cells = <1>; 95 #interrupt-cells = <1>;
96 compatible = "snps,dw-apb-ictl"; 96 compatible = "snps,dw-apb-ictl";
97 reg = < 0xe0012000 0x200 >; 97 reg = < 0x0 0xe0012000 0x0 0x200 >;
98 interrupt-controller; 98 interrupt-controller;
99 interrupt-parent = <&core_intc>; 99 interrupt-parent = <&core_intc>;
100 interrupts = < 24 >; 100 interrupts = < 24 >;
101 }; 101 };
102 102
103 memory { 103 memory {
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges = <0x00000000 0x80000000 0x40000000>;
107 device_type = "memory"; 104 device_type = "memory";
108 reg = <0x80000000 0x20000000>; /* 512MiB */ 105 /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
106 reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */
107 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */
109 }; 108 };
110 109
111 reserved-memory { 110 reserved-memory {
112 #address-cells = <1>; 111 #address-cells = <2>;
113 #size-cells = <1>; 112 #size-cells = <2>;
114 ranges; 113 ranges;
115 /* 114 /*
116 * Move frame buffer out of IOC aperture (0x8z-0xAz). 115 * Move frame buffer out of IOC aperture (0x8z-0xAz).
117 */ 116 */
118 frame_buffer: frame_buffer@be000000 { 117 frame_buffer: frame_buffer@be000000 {
119 compatible = "shared-dma-pool"; 118 compatible = "shared-dma-pool";
120 reg = <0xbe000000 0x2000000>; 119 reg = <0x0 0xbe000000 0x0 0x2000000>;
121 no-map; 120 no-map;
122 }; 121 };
123 }; 122 };
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index 695f9fa1996b..4ebb2170abec 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -14,15 +14,15 @@
14 14
15/ { 15/ {
16 compatible = "snps,arc"; 16 compatible = "snps,arc";
17 #address-cells = <1>; 17 #address-cells = <2>;
18 #size-cells = <1>; 18 #size-cells = <2>;
19 19
20 cpu_card { 20 cpu_card {
21 compatible = "simple-bus"; 21 compatible = "simple-bus";
22 #address-cells = <1>; 22 #address-cells = <1>;
23 #size-cells = <1>; 23 #size-cells = <1>;
24 24
25 ranges = <0x00000000 0xf0000000 0x10000000>; 25 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
26 26
27 core_clk: core_clk { 27 core_clk: core_clk {
28 #clock-cells = <0>; 28 #clock-cells = <0>;
@@ -100,30 +100,29 @@
100 mb_intc: dw-apb-ictl@0xe0012000 { 100 mb_intc: dw-apb-ictl@0xe0012000 {
101 #interrupt-cells = <1>; 101 #interrupt-cells = <1>;
102 compatible = "snps,dw-apb-ictl"; 102 compatible = "snps,dw-apb-ictl";
103 reg = < 0xe0012000 0x200 >; 103 reg = < 0x0 0xe0012000 0x0 0x200 >;
104 interrupt-controller; 104 interrupt-controller;
105 interrupt-parent = <&idu_intc>; 105 interrupt-parent = <&idu_intc>;
106 interrupts = <0>; 106 interrupts = <0>;
107 }; 107 };
108 108
109 memory { 109 memory {
110 #address-cells = <1>;
111 #size-cells = <1>;
112 ranges = <0x00000000 0x80000000 0x40000000>;
113 device_type = "memory"; 110 device_type = "memory";
114 reg = <0x80000000 0x20000000>; /* 512MiB */ 111 /* CONFIG_KERNEL_RAM_BASE_ADDRESS needs to match low mem start */
112 reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MiB low mem */
113 0x1 0xc0000000 0x0 0x40000000>; /* 1 GiB highmem */
115 }; 114 };
116 115
117 reserved-memory { 116 reserved-memory {
118 #address-cells = <1>; 117 #address-cells = <2>;
119 #size-cells = <1>; 118 #size-cells = <2>;
120 ranges; 119 ranges;
121 /* 120 /*
122 * Move frame buffer out of IOC aperture (0x8z-0xAz). 121 * Move frame buffer out of IOC aperture (0x8z-0xAz).
123 */ 122 */
124 frame_buffer: frame_buffer@be000000 { 123 frame_buffer: frame_buffer@be000000 {
125 compatible = "shared-dma-pool"; 124 compatible = "shared-dma-pool";
126 reg = <0xbe000000 0x2000000>; 125 reg = <0x0 0xbe000000 0x0 0x2000000>;
127 no-map; 126 no-map;
128 }; 127 };
129 }; 128 };
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index 41cfb29b62c1..0ff7e07edcd4 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -13,7 +13,7 @@
13 compatible = "simple-bus"; 13 compatible = "simple-bus";
14 #address-cells = <1>; 14 #address-cells = <1>;
15 #size-cells = <1>; 15 #size-cells = <1>;
16 ranges = <0x00000000 0xe0000000 0x10000000>; 16 ranges = <0x00000000 0x0 0xe0000000 0x10000000>;
17 interrupt-parent = <&mb_intc>; 17 interrupt-parent = <&mb_intc>;
18 18
19 i2sclk: i2sclk@100a0 { 19 i2sclk: i2sclk@100a0 {
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-27 18:11:20 -0400