drm/i915/selftests: scrub 64K

We write all 4K page entries, even when using 64K pages. In order to
verify that the HW isn't cheating by using the 4K PTE instead of the 64K
PTE, we want to remove all the surplus entries. If the HW skipped the
64K PTE, it will read/write into the scratch page instead - which we
detect as missing results during selftests.

v2: much improved commentary (Chris)

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Changbin Du <changbin.du@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180511095140.25590-1-matthew.auld@intel.com

3 files changed, 25 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index c01d6dbe269a..996ab2ad6c45 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1162,6 +1162,27 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
                         vaddr[idx.pde] |= GEN8_PDE_IPS_64K;
                         kunmap_atomic(vaddr);
                         page_size = I915_GTT_PAGE_SIZE_64K;
+
+                        /*
+                         * We write all 4K page entries, even when using 64K
+                         * pages. In order to verify that the HW isn't cheating
+                         * by using the 4K PTE instead of the 64K PTE, we want
+                         * to remove all the surplus entries. If the HW skipped
+                         * the 64K PTE, it will read/write into the scratch page
+                         * instead - which we detect as missing results during
+                         * selftests.
+                         */
+                        if (I915_SELFTEST_ONLY(vma->vm->scrub_64K)) {
+                                u16 i;
+
+                                encode = pte_encode | vma->vm->scratch_page.daddr;
+                                vaddr = kmap_atomic_px(pd->page_table[idx.pde]);
+
+                                for (i = 1; i < index; i += 16)
+                                        memset64(vaddr + i, encode, 15);
+
+                                kunmap_atomic(vaddr);
+                        }
                 }
 
                 vma->page_sizes.gtt |= page_size;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 1db0dedb4059..aec4f73574f4 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -342,6 +342,7 @@ struct i915_address_space {
         void (*clear_pages)(struct i915_vma *vma);
 
         I915_SELFTEST_DECLARE(struct fault_attr fault_attr);
+        I915_SELFTEST_DECLARE(bool scrub_64K);
 };
 
 #define i915_is_ggtt(V) (!(V)->file)
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
index d7c8ef8e6764..91c72911be3c 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -1757,6 +1757,9 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *dev_priv)
                 goto out_unlock;
         }
 
+        if (ctx->ppgtt)
+                ctx->ppgtt->base.scrub_64K = true;
+
         err = i915_subtests(tests, ctx);
 
 out_unlock: