diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-10-02 18:23:00 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-10-02 18:23:00 -0400 |
commit | f76d9c61d91343806e59335493806e87daf78947 (patch) | |
tree | e3c98a687783c5fbe9862646f455435fb6bfe3f8 | |
parent | be67d60ba944bdd38571b79bdcd506e34c0f16c1 (diff) | |
parent | 117e5e9c4cfcb7628f08de074fbfefec1bb678b7 (diff) |
Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
"Three relatively small fixes for ARM:
- Roger noticed that dma_max_pfn() was calculating the upper limit
wrongly, by adding the PFN offset of memory twice.
- A fix from Robin to correct parsing of MPIDR values when the
address size is larger than one BE32 unit.
- A fix from Srinivas to ensure that we do not rely on the boot
loader (or previous Linux kernel) setting the translation table
base register a certain way in the decompressor, which can lead to
crashes"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8618/1: decompressor: reset ttbcr fields to use TTBR0 on ARMv7
ARM: 8617/1: dma: fix dma_max_pfn()
ARM: 8616/1: dt: Respect property size when parsing CPUs
-rw-r--r-- | arch/arm/boot/compressed/head.S | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/dma-mapping.h | 2 | ||||
-rw-r--r-- | arch/arm/kernel/devtree.c | 14 |
3 files changed, 13 insertions, 5 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index af11c2f8f3b7..fc6d541549a2 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
@@ -779,7 +779,7 @@ __armv7_mmu_cache_on: | |||
779 | orrne r0, r0, #1 @ MMU enabled | 779 | orrne r0, r0, #1 @ MMU enabled |
780 | movne r1, #0xfffffffd @ domain 0 = client | 780 | movne r1, #0xfffffffd @ domain 0 = client |
781 | bic r6, r6, #1 << 31 @ 32-bit translation system | 781 | bic r6, r6, #1 << 31 @ 32-bit translation system |
782 | bic r6, r6, #3 << 0 @ use only ttbr0 | 782 | bic r6, r6, #(7 << 0) | (1 << 4) @ use only ttbr0 |
783 | mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer | 783 | mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer |
784 | mcrne p15, 0, r1, c3, c0, 0 @ load domain access control | 784 | mcrne p15, 0, r1, c3, c0, 0 @ load domain access control |
785 | mcrne p15, 0, r6, c2, c0, 2 @ load ttb control | 785 | mcrne p15, 0, r6, c2, c0, 2 @ load ttb control |
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index d009f7911ffc..bf02dbd9ccda 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h | |||
@@ -111,7 +111,7 @@ static inline dma_addr_t virt_to_dma(struct device *dev, void *addr) | |||
111 | /* The ARM override for dma_max_pfn() */ | 111 | /* The ARM override for dma_max_pfn() */ |
112 | static inline unsigned long dma_max_pfn(struct device *dev) | 112 | static inline unsigned long dma_max_pfn(struct device *dev) |
113 | { | 113 | { |
114 | return PHYS_PFN_OFFSET + dma_to_pfn(dev, *dev->dma_mask); | 114 | return dma_to_pfn(dev, *dev->dma_mask); |
115 | } | 115 | } |
116 | #define dma_max_pfn(dev) dma_max_pfn(dev) | 116 | #define dma_max_pfn(dev) dma_max_pfn(dev) |
117 | 117 | ||
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c index 40ecd5f514a2..f676febbb270 100644 --- a/arch/arm/kernel/devtree.c +++ b/arch/arm/kernel/devtree.c | |||
@@ -88,6 +88,8 @@ void __init arm_dt_init_cpu_maps(void) | |||
88 | return; | 88 | return; |
89 | 89 | ||
90 | for_each_child_of_node(cpus, cpu) { | 90 | for_each_child_of_node(cpus, cpu) { |
91 | const __be32 *cell; | ||
92 | int prop_bytes; | ||
91 | u32 hwid; | 93 | u32 hwid; |
92 | 94 | ||
93 | if (of_node_cmp(cpu->type, "cpu")) | 95 | if (of_node_cmp(cpu->type, "cpu")) |
@@ -99,7 +101,8 @@ void __init arm_dt_init_cpu_maps(void) | |||
99 | * properties is considered invalid to build the | 101 | * properties is considered invalid to build the |
100 | * cpu_logical_map. | 102 | * cpu_logical_map. |
101 | */ | 103 | */ |
102 | if (of_property_read_u32(cpu, "reg", &hwid)) { | 104 | cell = of_get_property(cpu, "reg", &prop_bytes); |
105 | if (!cell || prop_bytes < sizeof(*cell)) { | ||
103 | pr_debug(" * %s missing reg property\n", | 106 | pr_debug(" * %s missing reg property\n", |
104 | cpu->full_name); | 107 | cpu->full_name); |
105 | of_node_put(cpu); | 108 | of_node_put(cpu); |
@@ -107,10 +110,15 @@ void __init arm_dt_init_cpu_maps(void) | |||
107 | } | 110 | } |
108 | 111 | ||
109 | /* | 112 | /* |
110 | * 8 MSBs must be set to 0 in the DT since the reg property | 113 | * Bits n:24 must be set to 0 in the DT since the reg property |
111 | * defines the MPIDR[23:0]. | 114 | * defines the MPIDR[23:0]. |
112 | */ | 115 | */ |
113 | if (hwid & ~MPIDR_HWID_BITMASK) { | 116 | do { |
117 | hwid = be32_to_cpu(*cell++); | ||
118 | prop_bytes -= sizeof(*cell); | ||
119 | } while (!hwid && prop_bytes > 0); | ||
120 | |||
121 | if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) { | ||
114 | of_node_put(cpu); | 122 | of_node_put(cpu); |
115 | return; | 123 | return; |
116 | } | 124 | } |