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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2014-03-25 06:27:25 -0400
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2015-09-10 04:02:38 -0400
commitf719a0d6a8541b383c506aaa4b4fa6b4109669f4 (patch)
tree59dd2160bdd1ad86d3380cc15bcda2eb8057d1b6
parente848f754257d7dec2b9a395a15dce22758492d84 (diff)
ARM: efm32: switch to vendor,device compatible strings
The mainline drivers were fixed in commits - 4ea8dafd2475 (serial: efm32: use $vendor,$device scheme for compatible string) - 12f6dd860cf8 (spi: efm32: use $vendor,$device scheme for compatible string) - 63cc122381bd (clocksource: efm32: use $vendor,$device scheme for compatible string) which are all in 3.16-rc1 to also support these compatible strings. For the other affected peripherals (adc and gpio) there are no drivers in mainline yet. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
-rw-r--r--arch/arm/boot/dts/efm32gg.dtsi32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/efm32gg.dtsi b/arch/arm/boot/dts/efm32gg.dtsi
index 106d505c5d3d..c747983771c7 100644
--- a/arch/arm/boot/dts/efm32gg.dtsi
+++ b/arch/arm/boot/dts/efm32gg.dtsi
@@ -23,7 +23,7 @@
23 23
24 soc { 24 soc {
25 adc: adc@40002000 { 25 adc: adc@40002000 {
26 compatible = "efm32,adc"; 26 compatible = "energymicro,efm32-adc";
27 reg = <0x40002000 0x400>; 27 reg = <0x40002000 0x400>;
28 interrupts = <7>; 28 interrupts = <7>;
29 clocks = <&cmu clk_HFPERCLKADC0>; 29 clocks = <&cmu clk_HFPERCLKADC0>;
@@ -31,7 +31,7 @@
31 }; 31 };
32 32
33 gpio: gpio@40006000 { 33 gpio: gpio@40006000 {
34 compatible = "efm32,gpio"; 34 compatible = "energymicro,efm32-gpio";
35 reg = <0x40006000 0x1000>; 35 reg = <0x40006000 0x1000>;
36 interrupts = <1 11>; 36 interrupts = <1 11>;
37 gpio-controller; 37 gpio-controller;
@@ -45,7 +45,7 @@
45 i2c0: i2c@4000a000 { 45 i2c0: i2c@4000a000 {
46 #address-cells = <1>; 46 #address-cells = <1>;
47 #size-cells = <0>; 47 #size-cells = <0>;
48 compatible = "efm32,i2c"; 48 compatible = "energymicro,efm32-i2c";
49 reg = <0x4000a000 0x400>; 49 reg = <0x4000a000 0x400>;
50 interrupts = <9>; 50 interrupts = <9>;
51 clocks = <&cmu clk_HFPERCLKI2C0>; 51 clocks = <&cmu clk_HFPERCLKI2C0>;
@@ -56,7 +56,7 @@
56 i2c1: i2c@4000a400 { 56 i2c1: i2c@4000a400 {
57 #address-cells = <1>; 57 #address-cells = <1>;
58 #size-cells = <0>; 58 #size-cells = <0>;
59 compatible = "efm32,i2c"; 59 compatible = "energymicro,efm32-i2c";
60 reg = <0x4000a400 0x400>; 60 reg = <0x4000a400 0x400>;
61 interrupts = <10>; 61 interrupts = <10>;
62 clocks = <&cmu clk_HFPERCLKI2C1>; 62 clocks = <&cmu clk_HFPERCLKI2C1>;
@@ -67,7 +67,7 @@
67 spi0: spi@4000c000 { /* USART0 */ 67 spi0: spi@4000c000 { /* USART0 */
68 #address-cells = <1>; 68 #address-cells = <1>;
69 #size-cells = <0>; 69 #size-cells = <0>;
70 compatible = "efm32,spi"; 70 compatible = "energymicro,efm32-spi";
71 reg = <0x4000c000 0x400>; 71 reg = <0x4000c000 0x400>;
72 interrupts = <3 4>; 72 interrupts = <3 4>;
73 clocks = <&cmu clk_HFPERCLKUSART0>; 73 clocks = <&cmu clk_HFPERCLKUSART0>;
@@ -77,7 +77,7 @@
77 spi1: spi@4000c400 { /* USART1 */ 77 spi1: spi@4000c400 { /* USART1 */
78 #address-cells = <1>; 78 #address-cells = <1>;
79 #size-cells = <0>; 79 #size-cells = <0>;
80 compatible = "efm32,spi"; 80 compatible = "energymicro,efm32-spi";
81 reg = <0x4000c400 0x400>; 81 reg = <0x4000c400 0x400>;
82 interrupts = <15 16>; 82 interrupts = <15 16>;
83 clocks = <&cmu clk_HFPERCLKUSART1>; 83 clocks = <&cmu clk_HFPERCLKUSART1>;
@@ -87,7 +87,7 @@
87 spi2: spi@4000c800 { /* USART2 */ 87 spi2: spi@4000c800 { /* USART2 */
88 #address-cells = <1>; 88 #address-cells = <1>;
89 #size-cells = <0>; 89 #size-cells = <0>;
90 compatible = "efm32,spi"; 90 compatible = "energymicro,efm32-spi";
91 reg = <0x4000c800 0x400>; 91 reg = <0x4000c800 0x400>;
92 interrupts = <18 19>; 92 interrupts = <18 19>;
93 clocks = <&cmu clk_HFPERCLKUSART2>; 93 clocks = <&cmu clk_HFPERCLKUSART2>;
@@ -95,7 +95,7 @@
95 }; 95 };
96 96
97 uart0: uart@4000c000 { /* USART0 */ 97 uart0: uart@4000c000 { /* USART0 */
98 compatible = "efm32,uart"; 98 compatible = "energymicro,efm32-uart";
99 reg = <0x4000c000 0x400>; 99 reg = <0x4000c000 0x400>;
100 interrupts = <3 4>; 100 interrupts = <3 4>;
101 clocks = <&cmu clk_HFPERCLKUSART0>; 101 clocks = <&cmu clk_HFPERCLKUSART0>;
@@ -103,7 +103,7 @@
103 }; 103 };
104 104
105 uart1: uart@4000c400 { /* USART1 */ 105 uart1: uart@4000c400 { /* USART1 */
106 compatible = "efm32,uart"; 106 compatible = "energymicro,efm32-uart";
107 reg = <0x4000c400 0x400>; 107 reg = <0x4000c400 0x400>;
108 interrupts = <15 16>; 108 interrupts = <15 16>;
109 clocks = <&cmu clk_HFPERCLKUSART1>; 109 clocks = <&cmu clk_HFPERCLKUSART1>;
@@ -111,7 +111,7 @@
111 }; 111 };
112 112
113 uart2: uart@4000c800 { /* USART2 */ 113 uart2: uart@4000c800 { /* USART2 */
114 compatible = "efm32,uart"; 114 compatible = "energymicro,efm32-uart";
115 reg = <0x4000c800 0x400>; 115 reg = <0x4000c800 0x400>;
116 interrupts = <18 19>; 116 interrupts = <18 19>;
117 clocks = <&cmu clk_HFPERCLKUSART2>; 117 clocks = <&cmu clk_HFPERCLKUSART2>;
@@ -119,7 +119,7 @@
119 }; 119 };
120 120
121 uart3: uart@4000e000 { /* UART0 */ 121 uart3: uart@4000e000 { /* UART0 */
122 compatible = "efm32,uart"; 122 compatible = "energymicro,efm32-uart";
123 reg = <0x4000e000 0x400>; 123 reg = <0x4000e000 0x400>;
124 interrupts = <20 21>; 124 interrupts = <20 21>;
125 clocks = <&cmu clk_HFPERCLKUART0>; 125 clocks = <&cmu clk_HFPERCLKUART0>;
@@ -127,7 +127,7 @@
127 }; 127 };
128 128
129 uart4: uart@4000e400 { /* UART1 */ 129 uart4: uart@4000e400 { /* UART1 */
130 compatible = "efm32,uart"; 130 compatible = "energymicro,efm32-uart";
131 reg = <0x4000e400 0x400>; 131 reg = <0x4000e400 0x400>;
132 interrupts = <22 23>; 132 interrupts = <22 23>;
133 clocks = <&cmu clk_HFPERCLKUART1>; 133 clocks = <&cmu clk_HFPERCLKUART1>;
@@ -135,28 +135,28 @@
135 }; 135 };
136 136
137 timer0: timer@40010000 { 137 timer0: timer@40010000 {
138 compatible = "efm32,timer"; 138 compatible = "energymicro,efm32-timer";
139 reg = <0x40010000 0x400>; 139 reg = <0x40010000 0x400>;
140 interrupts = <2>; 140 interrupts = <2>;
141 clocks = <&cmu clk_HFPERCLKTIMER0>; 141 clocks = <&cmu clk_HFPERCLKTIMER0>;
142 }; 142 };
143 143
144 timer1: timer@40010400 { 144 timer1: timer@40010400 {
145 compatible = "efm32,timer"; 145 compatible = "energymicro,efm32-timer";
146 reg = <0x40010400 0x400>; 146 reg = <0x40010400 0x400>;
147 interrupts = <12>; 147 interrupts = <12>;
148 clocks = <&cmu clk_HFPERCLKTIMER1>; 148 clocks = <&cmu clk_HFPERCLKTIMER1>;
149 }; 149 };
150 150
151 timer2: timer@40010800 { 151 timer2: timer@40010800 {
152 compatible = "efm32,timer"; 152 compatible = "energymicro,efm32-timer";
153 reg = <0x40010800 0x400>; 153 reg = <0x40010800 0x400>;
154 interrupts = <13>; 154 interrupts = <13>;
155 clocks = <&cmu clk_HFPERCLKTIMER2>; 155 clocks = <&cmu clk_HFPERCLKTIMER2>;
156 }; 156 };
157 157
158 timer3: timer@40010c00 { 158 timer3: timer@40010c00 {
159 compatible = "efm32,timer"; 159 compatible = "energymicro,efm32-timer";
160 reg = <0x40010c00 0x400>; 160 reg = <0x40010c00 0x400>;
161 interrupts = <14>; 161 interrupts = <14>;
162 clocks = <&cmu clk_HFPERCLKTIMER3>; 162 clocks = <&cmu clk_HFPERCLKTIMER3>;