diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-11-19 14:21:59 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-11-19 14:21:59 -0500 |
| commit | f6918382c7d8a13eb1c71d375bdd88f3ae6a5833 (patch) | |
| tree | 1fe3581a8b20a48cc85909f8f207237687613640 | |
| parent | 384b0dc4c84eb0ffe04589694a31a06226d61f7a (diff) | |
| parent | cac4a185405d4415eca269cae976438b44a37ae0 (diff) | |
Merge tag 'powerpc-4.9-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman:
"Fixes marked for stable:
- fix system reset interrupt winkle wakeups
- fix setting of AIL in hypervisor mode
Fixes for code merged this cycle:
- fix exception vector build with 2.23 era binutils
- fix missing update of HID register on secondary CPUs
Other:
- fix missing pr_cont()s
- invalidate ERAT on tlbiel for POWER9 DD1"
* tag 'powerpc-4.9-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/mm: Fix missing update of HID register on secondary CPUs
powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1
powerpc/64: Fix setting of AIL in hypervisor mode
powerpc/oops: Fix missing pr_cont()s in instruction dump
powerpc/oops: Fix missing pr_cont()s in show_regs()
powerpc/oops: Fix missing pr_cont()s in print_msr_bits() et. al.
powerpc/oops: Fix missing pr_cont()s in show_stack()
powerpc: Fix exception vector build with 2.23 era binutils
powerpc/64s: Fix system reset interrupt winkle wakeups
| -rw-r--r-- | arch/powerpc/include/asm/exception-64s.h | 15 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/ppc-opcode.h | 1 | ||||
| -rw-r--r-- | arch/powerpc/kernel/exceptions-64s.S | 11 | ||||
| -rw-r--r-- | arch/powerpc/kernel/process.c | 42 | ||||
| -rw-r--r-- | arch/powerpc/kernel/setup_64.c | 20 | ||||
| -rw-r--r-- | arch/powerpc/mm/hash_utils_64.c | 4 | ||||
| -rw-r--r-- | arch/powerpc/mm/pgtable-radix.c | 4 | ||||
| -rw-r--r-- | arch/powerpc/mm/tlb-radix.c | 4 |
8 files changed, 68 insertions, 33 deletions
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h index 84d49b197c32..9a3eee661297 100644 --- a/arch/powerpc/include/asm/exception-64s.h +++ b/arch/powerpc/include/asm/exception-64s.h | |||
| @@ -91,7 +91,7 @@ | |||
| 91 | */ | 91 | */ |
| 92 | #define LOAD_HANDLER(reg, label) \ | 92 | #define LOAD_HANDLER(reg, label) \ |
| 93 | ld reg,PACAKBASE(r13); /* get high part of &label */ \ | 93 | ld reg,PACAKBASE(r13); /* get high part of &label */ \ |
| 94 | ori reg,reg,(FIXED_SYMBOL_ABS_ADDR(label))@l; | 94 | ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label); |
| 95 | 95 | ||
| 96 | #define __LOAD_HANDLER(reg, label) \ | 96 | #define __LOAD_HANDLER(reg, label) \ |
| 97 | ld reg,PACAKBASE(r13); \ | 97 | ld reg,PACAKBASE(r13); \ |
| @@ -158,14 +158,17 @@ BEGIN_FTR_SECTION_NESTED(943) \ | |||
| 158 | std ra,offset(r13); \ | 158 | std ra,offset(r13); \ |
| 159 | END_FTR_SECTION_NESTED(ftr,ftr,943) | 159 | END_FTR_SECTION_NESTED(ftr,ftr,943) |
| 160 | 160 | ||
| 161 | #define EXCEPTION_PROLOG_0(area) \ | 161 | #define EXCEPTION_PROLOG_0_PACA(area) \ |
| 162 | GET_PACA(r13); \ | ||
| 163 | std r9,area+EX_R9(r13); /* save r9 */ \ | 162 | std r9,area+EX_R9(r13); /* save r9 */ \ |
| 164 | OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ | 163 | OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ |
| 165 | HMT_MEDIUM; \ | 164 | HMT_MEDIUM; \ |
| 166 | std r10,area+EX_R10(r13); /* save r10 - r12 */ \ | 165 | std r10,area+EX_R10(r13); /* save r10 - r12 */ \ |
| 167 | OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) | 166 | OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) |
| 168 | 167 | ||
| 168 | #define EXCEPTION_PROLOG_0(area) \ | ||
| 169 | GET_PACA(r13); \ | ||
| 170 | EXCEPTION_PROLOG_0_PACA(area) | ||
| 171 | |||
| 169 | #define __EXCEPTION_PROLOG_1(area, extra, vec) \ | 172 | #define __EXCEPTION_PROLOG_1(area, extra, vec) \ |
| 170 | OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ | 173 | OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ |
| 171 | OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ | 174 | OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ |
| @@ -196,6 +199,12 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) | |||
| 196 | EXCEPTION_PROLOG_1(area, extra, vec); \ | 199 | EXCEPTION_PROLOG_1(area, extra, vec); \ |
| 197 | EXCEPTION_PROLOG_PSERIES_1(label, h); | 200 | EXCEPTION_PROLOG_PSERIES_1(label, h); |
| 198 | 201 | ||
| 202 | /* Have the PACA in r13 already */ | ||
| 203 | #define EXCEPTION_PROLOG_PSERIES_PACA(area, label, h, extra, vec) \ | ||
| 204 | EXCEPTION_PROLOG_0_PACA(area); \ | ||
| 205 | EXCEPTION_PROLOG_1(area, extra, vec); \ | ||
| 206 | EXCEPTION_PROLOG_PSERIES_1(label, h); | ||
| 207 | |||
| 199 | #define __KVMTEST(h, n) \ | 208 | #define __KVMTEST(h, n) \ |
| 200 | lbz r10,HSTATE_IN_GUEST(r13); \ | 209 | lbz r10,HSTATE_IN_GUEST(r13); \ |
| 201 | cmpwi r10,0; \ | 210 | cmpwi r10,0; \ |
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index 0132831b3081..c56ea8c84abb 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h | |||
| @@ -460,5 +460,6 @@ | |||
| 460 | 460 | ||
| 461 | #define PPC_SLBIA(IH) stringify_in_c(.long PPC_INST_SLBIA | \ | 461 | #define PPC_SLBIA(IH) stringify_in_c(.long PPC_INST_SLBIA | \ |
| 462 | ((IH & 0x7) << 21)) | 462 | ((IH & 0x7) << 21)) |
| 463 | #define PPC_INVALIDATE_ERAT PPC_SLBIA(7) | ||
| 463 | 464 | ||
| 464 | #endif /* _ASM_POWERPC_PPC_OPCODE_H */ | 465 | #endif /* _ASM_POWERPC_PPC_OPCODE_H */ |
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 08ba447a4b3d..1ba82ea90230 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S | |||
| @@ -116,7 +116,9 @@ EXC_VIRT_NONE(0x4000, 0x4100) | |||
| 116 | 116 | ||
| 117 | EXC_REAL_BEGIN(system_reset, 0x100, 0x200) | 117 | EXC_REAL_BEGIN(system_reset, 0x100, 0x200) |
| 118 | SET_SCRATCH0(r13) | 118 | SET_SCRATCH0(r13) |
| 119 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, | 119 | GET_PACA(r13) |
| 120 | clrrdi r13,r13,1 /* Last bit of HSPRG0 is set if waking from winkle */ | ||
| 121 | EXCEPTION_PROLOG_PSERIES_PACA(PACA_EXGEN, system_reset_common, EXC_STD, | ||
| 120 | IDLETEST, 0x100) | 122 | IDLETEST, 0x100) |
| 121 | 123 | ||
| 122 | EXC_REAL_END(system_reset, 0x100, 0x200) | 124 | EXC_REAL_END(system_reset, 0x100, 0x200) |
| @@ -124,6 +126,9 @@ EXC_VIRT_NONE(0x4100, 0x4200) | |||
| 124 | 126 | ||
| 125 | #ifdef CONFIG_PPC_P7_NAP | 127 | #ifdef CONFIG_PPC_P7_NAP |
| 126 | EXC_COMMON_BEGIN(system_reset_idle_common) | 128 | EXC_COMMON_BEGIN(system_reset_idle_common) |
| 129 | BEGIN_FTR_SECTION | ||
| 130 | GET_PACA(r13) /* Restore HSPRG0 to get the winkle bit in r13 */ | ||
| 131 | END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300) | ||
| 127 | bl pnv_restore_hyp_resource | 132 | bl pnv_restore_hyp_resource |
| 128 | 133 | ||
| 129 | li r0,PNV_THREAD_RUNNING | 134 | li r0,PNV_THREAD_RUNNING |
| @@ -169,7 +174,7 @@ EXC_REAL_BEGIN(machine_check, 0x200, 0x300) | |||
| 169 | SET_SCRATCH0(r13) /* save r13 */ | 174 | SET_SCRATCH0(r13) /* save r13 */ |
| 170 | /* | 175 | /* |
| 171 | * Running native on arch 2.06 or later, we may wakeup from winkle | 176 | * Running native on arch 2.06 or later, we may wakeup from winkle |
| 172 | * inside machine check. If yes, then last bit of HSPGR0 would be set | 177 | * inside machine check. If yes, then last bit of HSPRG0 would be set |
| 173 | * to 1. Hence clear it unconditionally. | 178 | * to 1. Hence clear it unconditionally. |
| 174 | */ | 179 | */ |
| 175 | GET_PACA(r13) | 180 | GET_PACA(r13) |
| @@ -388,7 +393,7 @@ EXC_COMMON_BEGIN(machine_check_handle_early) | |||
| 388 | /* | 393 | /* |
| 389 | * Go back to winkle. Please note that this thread was woken up in | 394 | * Go back to winkle. Please note that this thread was woken up in |
| 390 | * machine check from winkle and have not restored the per-subcore | 395 | * machine check from winkle and have not restored the per-subcore |
| 391 | * state. Hence before going back to winkle, set last bit of HSPGR0 | 396 | * state. Hence before going back to winkle, set last bit of HSPRG0 |
| 392 | * to 1. This will make sure that if this thread gets woken up | 397 | * to 1. This will make sure that if this thread gets woken up |
| 393 | * again at reset vector 0x100 then it will get chance to restore | 398 | * again at reset vector 0x100 then it will get chance to restore |
| 394 | * the subcore state. | 399 | * the subcore state. |
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index ce6dc61b15b2..49a680d5ae37 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
| @@ -1215,7 +1215,7 @@ static void show_instructions(struct pt_regs *regs) | |||
| 1215 | int instr; | 1215 | int instr; |
| 1216 | 1216 | ||
| 1217 | if (!(i % 8)) | 1217 | if (!(i % 8)) |
| 1218 | printk("\n"); | 1218 | pr_cont("\n"); |
| 1219 | 1219 | ||
| 1220 | #if !defined(CONFIG_BOOKE) | 1220 | #if !defined(CONFIG_BOOKE) |
| 1221 | /* If executing with the IMMU off, adjust pc rather | 1221 | /* If executing with the IMMU off, adjust pc rather |
| @@ -1227,18 +1227,18 @@ static void show_instructions(struct pt_regs *regs) | |||
| 1227 | 1227 | ||
| 1228 | if (!__kernel_text_address(pc) || | 1228 | if (!__kernel_text_address(pc) || |
| 1229 | probe_kernel_address((unsigned int __user *)pc, instr)) { | 1229 | probe_kernel_address((unsigned int __user *)pc, instr)) { |
| 1230 | printk(KERN_CONT "XXXXXXXX "); | 1230 | pr_cont("XXXXXXXX "); |
| 1231 | } else { | 1231 | } else { |
| 1232 | if (regs->nip == pc) | 1232 | if (regs->nip == pc) |
| 1233 | printk(KERN_CONT "<%08x> ", instr); | 1233 | pr_cont("<%08x> ", instr); |
| 1234 | else | 1234 | else |
| 1235 | printk(KERN_CONT "%08x ", instr); | 1235 | pr_cont("%08x ", instr); |
| 1236 | } | 1236 | } |
| 1237 | 1237 | ||
| 1238 | pc += sizeof(int); | 1238 | pc += sizeof(int); |
| 1239 | } | 1239 | } |
| 1240 | 1240 | ||
| 1241 | printk("\n"); | 1241 | pr_cont("\n"); |
| 1242 | } | 1242 | } |
| 1243 | 1243 | ||
| 1244 | struct regbit { | 1244 | struct regbit { |
| @@ -1282,7 +1282,7 @@ static void print_bits(unsigned long val, struct regbit *bits, const char *sep) | |||
| 1282 | 1282 | ||
| 1283 | for (; bits->bit; ++bits) | 1283 | for (; bits->bit; ++bits) |
| 1284 | if (val & bits->bit) { | 1284 | if (val & bits->bit) { |
| 1285 | printk("%s%s", s, bits->name); | 1285 | pr_cont("%s%s", s, bits->name); |
| 1286 | s = sep; | 1286 | s = sep; |
| 1287 | } | 1287 | } |
| 1288 | } | 1288 | } |
| @@ -1305,9 +1305,9 @@ static void print_tm_bits(unsigned long val) | |||
| 1305 | * T: Transactional (bit 34) | 1305 | * T: Transactional (bit 34) |
| 1306 | */ | 1306 | */ |
| 1307 | if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) { | 1307 | if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) { |
| 1308 | printk(",TM["); | 1308 | pr_cont(",TM["); |
| 1309 | print_bits(val, msr_tm_bits, ""); | 1309 | print_bits(val, msr_tm_bits, ""); |
| 1310 | printk("]"); | 1310 | pr_cont("]"); |
| 1311 | } | 1311 | } |
| 1312 | } | 1312 | } |
| 1313 | #else | 1313 | #else |
| @@ -1316,10 +1316,10 @@ static void print_tm_bits(unsigned long val) {} | |||
| 1316 | 1316 | ||
| 1317 | static void print_msr_bits(unsigned long val) | 1317 | static void print_msr_bits(unsigned long val) |
| 1318 | { | 1318 | { |
| 1319 | printk("<"); | 1319 | pr_cont("<"); |
| 1320 | print_bits(val, msr_bits, ","); | 1320 | print_bits(val, msr_bits, ","); |
| 1321 | print_tm_bits(val); | 1321 | print_tm_bits(val); |
| 1322 | printk(">"); | 1322 | pr_cont(">"); |
| 1323 | } | 1323 | } |
| 1324 | 1324 | ||
| 1325 | #ifdef CONFIG_PPC64 | 1325 | #ifdef CONFIG_PPC64 |
| @@ -1347,29 +1347,29 @@ void show_regs(struct pt_regs * regs) | |||
| 1347 | printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); | 1347 | printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); |
| 1348 | trap = TRAP(regs); | 1348 | trap = TRAP(regs); |
| 1349 | if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) | 1349 | if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR)) |
| 1350 | printk("CFAR: "REG" ", regs->orig_gpr3); | 1350 | pr_cont("CFAR: "REG" ", regs->orig_gpr3); |
| 1351 | if (trap == 0x200 || trap == 0x300 || trap == 0x600) | 1351 | if (trap == 0x200 || trap == 0x300 || trap == 0x600) |
| 1352 | #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) | 1352 | #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) |
| 1353 | printk("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr); | 1353 | pr_cont("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr); |
| 1354 | #else | 1354 | #else |
| 1355 | printk("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); | 1355 | pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); |
| 1356 | #endif | 1356 | #endif |
| 1357 | #ifdef CONFIG_PPC64 | 1357 | #ifdef CONFIG_PPC64 |
| 1358 | printk("SOFTE: %ld ", regs->softe); | 1358 | pr_cont("SOFTE: %ld ", regs->softe); |
| 1359 | #endif | 1359 | #endif |
| 1360 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | 1360 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1361 | if (MSR_TM_ACTIVE(regs->msr)) | 1361 | if (MSR_TM_ACTIVE(regs->msr)) |
| 1362 | printk("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); | 1362 | pr_cont("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch); |
| 1363 | #endif | 1363 | #endif |
| 1364 | 1364 | ||
| 1365 | for (i = 0; i < 32; i++) { | 1365 | for (i = 0; i < 32; i++) { |
| 1366 | if ((i % REGS_PER_LINE) == 0) | 1366 | if ((i % REGS_PER_LINE) == 0) |
| 1367 | printk("\nGPR%02d: ", i); | 1367 | pr_cont("\nGPR%02d: ", i); |
| 1368 | printk(REG " ", regs->gpr[i]); | 1368 | pr_cont(REG " ", regs->gpr[i]); |
| 1369 | if (i == LAST_VOLATILE && !FULL_REGS(regs)) | 1369 | if (i == LAST_VOLATILE && !FULL_REGS(regs)) |
| 1370 | break; | 1370 | break; |
| 1371 | } | 1371 | } |
| 1372 | printk("\n"); | 1372 | pr_cont("\n"); |
| 1373 | #ifdef CONFIG_KALLSYMS | 1373 | #ifdef CONFIG_KALLSYMS |
| 1374 | /* | 1374 | /* |
| 1375 | * Lookup NIP late so we have the best change of getting the | 1375 | * Lookup NIP late so we have the best change of getting the |
| @@ -1900,14 +1900,14 @@ void show_stack(struct task_struct *tsk, unsigned long *stack) | |||
| 1900 | printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); | 1900 | printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); |
| 1901 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | 1901 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
| 1902 | if ((ip == rth) && curr_frame >= 0) { | 1902 | if ((ip == rth) && curr_frame >= 0) { |
| 1903 | printk(" (%pS)", | 1903 | pr_cont(" (%pS)", |
| 1904 | (void *)current->ret_stack[curr_frame].ret); | 1904 | (void *)current->ret_stack[curr_frame].ret); |
| 1905 | curr_frame--; | 1905 | curr_frame--; |
| 1906 | } | 1906 | } |
| 1907 | #endif | 1907 | #endif |
| 1908 | if (firstframe) | 1908 | if (firstframe) |
| 1909 | printk(" (unreliable)"); | 1909 | pr_cont(" (unreliable)"); |
| 1910 | printk("\n"); | 1910 | pr_cont("\n"); |
| 1911 | } | 1911 | } |
| 1912 | firstframe = 0; | 1912 | firstframe = 0; |
| 1913 | 1913 | ||
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 7ac8e6eaab5b..8d586cff8a41 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c | |||
| @@ -226,17 +226,25 @@ static void __init configure_exceptions(void) | |||
| 226 | if (firmware_has_feature(FW_FEATURE_OPAL)) | 226 | if (firmware_has_feature(FW_FEATURE_OPAL)) |
| 227 | opal_configure_cores(); | 227 | opal_configure_cores(); |
| 228 | 228 | ||
| 229 | /* Enable AIL if supported, and we are in hypervisor mode */ | 229 | /* AIL on native is done in cpu_ready_for_interrupts() */ |
| 230 | if (early_cpu_has_feature(CPU_FTR_HVMODE) && | ||
| 231 | early_cpu_has_feature(CPU_FTR_ARCH_207S)) { | ||
| 232 | unsigned long lpcr = mfspr(SPRN_LPCR); | ||
| 233 | mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3); | ||
| 234 | } | ||
| 235 | } | 230 | } |
| 236 | } | 231 | } |
| 237 | 232 | ||
| 238 | static void cpu_ready_for_interrupts(void) | 233 | static void cpu_ready_for_interrupts(void) |
| 239 | { | 234 | { |
| 235 | /* | ||
| 236 | * Enable AIL if supported, and we are in hypervisor mode. This | ||
| 237 | * is called once for every processor. | ||
| 238 | * | ||
| 239 | * If we are not in hypervisor mode the job is done once for | ||
| 240 | * the whole partition in configure_exceptions(). | ||
| 241 | */ | ||
| 242 | if (early_cpu_has_feature(CPU_FTR_HVMODE) && | ||
| 243 | early_cpu_has_feature(CPU_FTR_ARCH_207S)) { | ||
| 244 | unsigned long lpcr = mfspr(SPRN_LPCR); | ||
| 245 | mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3); | ||
| 246 | } | ||
| 247 | |||
| 240 | /* Set IR and DR in PACA MSR */ | 248 | /* Set IR and DR in PACA MSR */ |
| 241 | get_paca()->kernel_msr = MSR_KERNEL; | 249 | get_paca()->kernel_msr = MSR_KERNEL; |
| 242 | } | 250 | } |
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 44d3c3a38e3e..5503078090cd 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c | |||
| @@ -1029,6 +1029,10 @@ void hash__early_init_mmu_secondary(void) | |||
| 1029 | { | 1029 | { |
| 1030 | /* Initialize hash table for that CPU */ | 1030 | /* Initialize hash table for that CPU */ |
| 1031 | if (!firmware_has_feature(FW_FEATURE_LPAR)) { | 1031 | if (!firmware_has_feature(FW_FEATURE_LPAR)) { |
| 1032 | |||
| 1033 | if (cpu_has_feature(CPU_FTR_POWER9_DD1)) | ||
| 1034 | update_hid_for_hash(); | ||
| 1035 | |||
| 1032 | if (!cpu_has_feature(CPU_FTR_ARCH_300)) | 1036 | if (!cpu_has_feature(CPU_FTR_ARCH_300)) |
| 1033 | mtspr(SPRN_SDR1, _SDR1); | 1037 | mtspr(SPRN_SDR1, _SDR1); |
| 1034 | else | 1038 | else |
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c index ed7bddc456b7..688b54517655 100644 --- a/arch/powerpc/mm/pgtable-radix.c +++ b/arch/powerpc/mm/pgtable-radix.c | |||
| @@ -388,6 +388,10 @@ void radix__early_init_mmu_secondary(void) | |||
| 388 | * update partition table control register and UPRT | 388 | * update partition table control register and UPRT |
| 389 | */ | 389 | */ |
| 390 | if (!firmware_has_feature(FW_FEATURE_LPAR)) { | 390 | if (!firmware_has_feature(FW_FEATURE_LPAR)) { |
| 391 | |||
| 392 | if (cpu_has_feature(CPU_FTR_POWER9_DD1)) | ||
| 393 | update_hid_for_radix(); | ||
| 394 | |||
| 391 | lpcr = mfspr(SPRN_LPCR); | 395 | lpcr = mfspr(SPRN_LPCR); |
| 392 | mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR); | 396 | mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR); |
| 393 | 397 | ||
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c index bda8c43be78a..3493cf4e0452 100644 --- a/arch/powerpc/mm/tlb-radix.c +++ b/arch/powerpc/mm/tlb-radix.c | |||
| @@ -50,6 +50,8 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric) | |||
| 50 | for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) { | 50 | for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) { |
| 51 | __tlbiel_pid(pid, set, ric); | 51 | __tlbiel_pid(pid, set, ric); |
| 52 | } | 52 | } |
| 53 | if (cpu_has_feature(CPU_FTR_POWER9_DD1)) | ||
| 54 | asm volatile(PPC_INVALIDATE_ERAT : : :"memory"); | ||
| 53 | return; | 55 | return; |
| 54 | } | 56 | } |
| 55 | 57 | ||
| @@ -83,6 +85,8 @@ static inline void _tlbiel_va(unsigned long va, unsigned long pid, | |||
| 83 | asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1) | 85 | asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1) |
| 84 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); | 86 | : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); |
| 85 | asm volatile("ptesync": : :"memory"); | 87 | asm volatile("ptesync": : :"memory"); |
| 88 | if (cpu_has_feature(CPU_FTR_POWER9_DD1)) | ||
| 89 | asm volatile(PPC_INVALIDATE_ERAT : : :"memory"); | ||
| 86 | } | 90 | } |
| 87 | 91 | ||
| 88 | static inline void _tlbie_va(unsigned long va, unsigned long pid, | 92 | static inline void _tlbie_va(unsigned long va, unsigned long pid, |
