diff options
author | Xiaolin Zhang <xiaolin.zhang@intel.com> | 2017-12-05 01:45:32 -0500 |
---|---|---|
committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-12-11 04:23:11 -0500 |
commit | f5f00e7dcc4161f07b76ff1a854e8b1ea7a1ed41 (patch) | |
tree | 23b9198b1ba88d266562a854242ff20241a5f3e8 | |
parent | 11474e9091cf2002e948647fd9f63a7f027e488a (diff) |
drm/i915/gvt: Fix pipe A enable as default for vgpu
observed igt drv_module_reload test case failure on 4.15.0
rc2 kernel with panic due to no active pipe available.
the gpu will reset during unload/load and make pipe config reg
lost which can cause kernel panic issue happen.
this patch is to move pipe enabling to emulate_mointor_status_chagne
to handle vgpu reset case as well.
Fixes: 7e6059020894 ("drm/i915/gvt: enabled pipe A default on creating vgpu")
Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/gvt/display.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c index 355120865efd..309f3fa6794a 100644 --- a/drivers/gpu/drm/i915/gvt/display.c +++ b/drivers/gpu/drm/i915/gvt/display.c | |||
@@ -266,6 +266,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) | |||
266 | /* Clear host CRT status, so guest couldn't detect this host CRT. */ | 266 | /* Clear host CRT status, so guest couldn't detect this host CRT. */ |
267 | if (IS_BROADWELL(dev_priv)) | 267 | if (IS_BROADWELL(dev_priv)) |
268 | vgpu_vreg(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK; | 268 | vgpu_vreg(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK; |
269 | |||
270 | vgpu_vreg(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE; | ||
269 | } | 271 | } |
270 | 272 | ||
271 | static void clean_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num) | 273 | static void clean_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num) |
@@ -282,7 +284,6 @@ static void clean_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num) | |||
282 | static int setup_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num, | 284 | static int setup_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num, |
283 | int type, unsigned int resolution) | 285 | int type, unsigned int resolution) |
284 | { | 286 | { |
285 | struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; | ||
286 | struct intel_vgpu_port *port = intel_vgpu_port(vgpu, port_num); | 287 | struct intel_vgpu_port *port = intel_vgpu_port(vgpu, port_num); |
287 | 288 | ||
288 | if (WARN_ON(resolution >= GVT_EDID_NUM)) | 289 | if (WARN_ON(resolution >= GVT_EDID_NUM)) |
@@ -308,7 +309,7 @@ static int setup_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num, | |||
308 | port->type = type; | 309 | port->type = type; |
309 | 310 | ||
310 | emulate_monitor_status_change(vgpu); | 311 | emulate_monitor_status_change(vgpu); |
311 | vgpu_vreg(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE; | 312 | |
312 | return 0; | 313 | return 0; |
313 | } | 314 | } |
314 | 315 | ||