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authorYingjoe Chen <yingjoe.chen@mediatek.com>2014-11-25 03:04:22 -0500
committerJason Cooper <jason@lakedaemon.net>2014-11-26 10:55:18 -0500
commitf4e27e30b3663a8652746d1c7d1649a5fa8c0e6c (patch)
tree63defe8568b981deb46fc7b7c39c296cc21a66ca
parent5fe3bba3088c4efab32a18649643b5075755b4b3 (diff)
irqchip: mtk-sysirq: dt-bindings: Add bindings for mediatek sysirq
Add binding documentation for Mediatek SoC SYSIRQ. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Link: https://lkml.kernel.org/r/1416902662-19281-5-git-send-email-yingjoe.chen@mediatek.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r--Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt28
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt
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1Mediatek 65xx/81xx sysirq
2
3Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI
4interrupt.
5
6Required properties:
7- compatible: should be one of:
8 "mediatek,mt8135-sysirq"
9 "mediatek,mt8127-sysirq"
10 "mediatek,mt6589-sysirq"
11 "mediatek,mt6582-sysirq"
12 "mediatek,mt6577-sysirq"
13- interrupt-controller : Identifies the node as an interrupt controller
14- #interrupt-cells : Use the same format as specified by GIC in
15 Documentation/devicetree/bindings/arm/gic.txt
16- interrupt-parent: phandle of irq parent for sysirq. The parent must
17 use the same interrupt-cells format as GIC.
18- reg: Physical base address of the intpol registers and length of memory
19 mapped region.
20
21Example:
22 sysirq: interrupt-controller@10200100 {
23 compatible = "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq";
24 interrupt-controller;
25 #interrupt-cells = <3>;
26 interrupt-parent = <&gic>;
27 reg = <0 0x10200100 0 0x1c>;
28 };