diff options
author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2017-05-04 14:19:19 -0400 |
---|---|---|
committer | Jerome Brunet <jbrunet@baylibre.com> | 2017-05-29 08:33:19 -0400 |
commit | f40a8ce96ae141f5ec83204471df4902e86a572c (patch) | |
tree | 6dd478b3e33d9abea6f9d8ef185d25d5ba9d30f8 | |
parent | 9dc6bd7678f6ee518c92808886ee087e31f749cf (diff) |
clk: meson-gxbb: un-export the CPU clock
The CPU clock defined in the Meson GX clock driver is actually a
left-over from the Meson8b clock controller. Un-export the clock so we
can remove it from the driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-rw-r--r-- | drivers/clk/meson/gxbb.h | 2 | ||||
-rw-r--r-- | include/dt-bindings/clock/gxbb-clkc.h | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index 16ab5b2707c1..4d04f4a3cd59 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h | |||
@@ -171,7 +171,7 @@ | |||
171 | * to be exposed to client nodes in DT: include/dt-bindings/clock/gxbb-clkc.h | 171 | * to be exposed to client nodes in DT: include/dt-bindings/clock/gxbb-clkc.h |
172 | */ | 172 | */ |
173 | #define CLKID_SYS_PLL 0 | 173 | #define CLKID_SYS_PLL 0 |
174 | /* CLKID_CPUCLK */ | 174 | #define CLKID_CPUCLK 1 |
175 | /* CLKID_HDMI_PLL */ | 175 | /* CLKID_HDMI_PLL */ |
176 | #define CLKID_FIXED_PLL 3 | 176 | #define CLKID_FIXED_PLL 3 |
177 | /* CLKID_FCLK_DIV2 */ | 177 | /* CLKID_FCLK_DIV2 */ |
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index 98b39c2e79af..e3e9f7919c31 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h | |||
@@ -5,7 +5,6 @@ | |||
5 | #ifndef __GXBB_CLKC_H | 5 | #ifndef __GXBB_CLKC_H |
6 | #define __GXBB_CLKC_H | 6 | #define __GXBB_CLKC_H |
7 | 7 | ||
8 | #define CLKID_CPUCLK 1 | ||
9 | #define CLKID_HDMI_PLL 2 | 8 | #define CLKID_HDMI_PLL 2 |
10 | #define CLKID_FCLK_DIV2 4 | 9 | #define CLKID_FCLK_DIV2 4 |
11 | #define CLKID_FCLK_DIV3 5 | 10 | #define CLKID_FCLK_DIV3 5 |