diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2018-04-24 11:05:12 -0400 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2018-06-04 01:48:22 -0400 |
| commit | f3b23e5ab43c3bc7fcf6c8f0e9293ee510bf3095 (patch) | |
| tree | 35141ceef20be440eb13f376220bd0dbc94dd770 | |
| parent | c04da893e5943685bcd6927b881afc9e640fc794 (diff) | |
mfd: intel-lpss: Correct names of RESETS register bits
According to documentation the function has 2 bits for reset
while iDMA 64-bit has only one.
Rename it accordingly. Note, there is no functional change since
we always handle them together.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
| -rw-r--r-- | drivers/mfd/intel-lpss.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c index 4bcf117a7ba8..50bffc3382d7 100644 --- a/drivers/mfd/intel-lpss.c +++ b/drivers/mfd/intel-lpss.c | |||
| @@ -40,8 +40,8 @@ | |||
| 40 | 40 | ||
| 41 | /* Offsets from lpss->priv */ | 41 | /* Offsets from lpss->priv */ |
| 42 | #define LPSS_PRIV_RESETS 0x04 | 42 | #define LPSS_PRIV_RESETS 0x04 |
| 43 | #define LPSS_PRIV_RESETS_FUNC BIT(2) | 43 | #define LPSS_PRIV_RESETS_IDMA BIT(2) |
| 44 | #define LPSS_PRIV_RESETS_IDMA 0x3 | 44 | #define LPSS_PRIV_RESETS_FUNC 0x3 |
| 45 | 45 | ||
| 46 | #define LPSS_PRIV_ACTIVELTR 0x10 | 46 | #define LPSS_PRIV_ACTIVELTR 0x10 |
| 47 | #define LPSS_PRIV_IDLELTR 0x14 | 47 | #define LPSS_PRIV_IDLELTR 0x14 |