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authorArnd Bergmann <arnd@arndb.de>2016-11-30 16:59:48 -0500
committerArnd Bergmann <arnd@arndb.de>2016-11-30 16:59:48 -0500
commitf39266cb18da53fe2c0148847a27cd78a82bc5c8 (patch)
tree1ec59635f57d8a0a50f457b9ba6ac350fbfc2407
parent9782979e5a61538f1abd45cfc79c1059a2b7402b (diff)
parenta91b2e690d409476d711523be8a83062b9083fb2 (diff)
Merge tag 'qcom-dts-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Pull "Qualcomm Device Tree Changes for v4.10 - Part 2" from Andy Gross: * Add SDHC xo clk * tag 'qcom-dts-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: ARM: dts: Add xo to sdhc clock node on qcom platforms
-rw-r--r--arch/arm/boot/dts/qcom-apq8084.dtsi16
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi16
2 files changed, 20 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 39eb7a4ed16a..80d48867107f 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -182,13 +182,13 @@
182 }; 182 };
183 183
184 clocks { 184 clocks {
185 xo_board { 185 xo_board: xo_board {
186 compatible = "fixed-clock"; 186 compatible = "fixed-clock";
187 #clock-cells = <0>; 187 #clock-cells = <0>;
188 clock-frequency = <19200000>; 188 clock-frequency = <19200000>;
189 }; 189 };
190 190
191 sleep_clk { 191 sleep_clk: sleep_clk {
192 compatible = "fixed-clock"; 192 compatible = "fixed-clock";
193 #clock-cells = <0>; 193 #clock-cells = <0>;
194 clock-frequency = <32768>; 194 clock-frequency = <32768>;
@@ -416,8 +416,10 @@
416 reg-names = "hc_mem", "core_mem"; 416 reg-names = "hc_mem", "core_mem";
417 interrupts = <0 123 0>, <0 138 0>; 417 interrupts = <0 123 0>, <0 138 0>;
418 interrupt-names = "hc_irq", "pwr_irq"; 418 interrupt-names = "hc_irq", "pwr_irq";
419 clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; 419 clocks = <&gcc GCC_SDCC1_APPS_CLK>,
420 clock-names = "core", "iface"; 420 <&gcc GCC_SDCC1_AHB_CLK>,
421 <&xo_board>;
422 clock-names = "core", "iface", "xo";
421 status = "disabled"; 423 status = "disabled";
422 }; 424 };
423 425
@@ -427,8 +429,10 @@
427 reg-names = "hc_mem", "core_mem"; 429 reg-names = "hc_mem", "core_mem";
428 interrupts = <0 125 0>, <0 221 0>; 430 interrupts = <0 125 0>, <0 221 0>;
429 interrupt-names = "hc_irq", "pwr_irq"; 431 interrupt-names = "hc_irq", "pwr_irq";
430 clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; 432 clocks = <&gcc GCC_SDCC2_APPS_CLK>,
431 clock-names = "core", "iface"; 433 <&gcc GCC_SDCC2_AHB_CLK>,
434 <&xo_board>;
435 clock-names = "core", "iface", "xo";
432 status = "disabled"; 436 status = "disabled";
433 }; 437 };
434 438
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d2109475bdfd..49d579f28865 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -220,13 +220,13 @@
220 }; 220 };
221 221
222 clocks { 222 clocks {
223 xo_board { 223 xo_board: xo_board {
224 compatible = "fixed-clock"; 224 compatible = "fixed-clock";
225 #clock-cells = <0>; 225 #clock-cells = <0>;
226 clock-frequency = <19200000>; 226 clock-frequency = <19200000>;
227 }; 227 };
228 228
229 sleep_clk { 229 sleep_clk: sleep_clk {
230 compatible = "fixed-clock"; 230 compatible = "fixed-clock";
231 #clock-cells = <0>; 231 #clock-cells = <0>;
232 clock-frequency = <32768>; 232 clock-frequency = <32768>;
@@ -558,8 +558,10 @@
558 reg-names = "hc_mem", "core_mem"; 558 reg-names = "hc_mem", "core_mem";
559 interrupts = <0 123 0>, <0 138 0>; 559 interrupts = <0 123 0>, <0 138 0>;
560 interrupt-names = "hc_irq", "pwr_irq"; 560 interrupt-names = "hc_irq", "pwr_irq";
561 clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; 561 clocks = <&gcc GCC_SDCC1_APPS_CLK>,
562 clock-names = "core", "iface"; 562 <&gcc GCC_SDCC1_AHB_CLK>,
563 <&xo_board>;
564 clock-names = "core", "iface", "xo";
563 status = "disabled"; 565 status = "disabled";
564 }; 566 };
565 567
@@ -569,8 +571,10 @@
569 reg-names = "hc_mem", "core_mem"; 571 reg-names = "hc_mem", "core_mem";
570 interrupts = <0 125 0>, <0 221 0>; 572 interrupts = <0 125 0>, <0 221 0>;
571 interrupt-names = "hc_irq", "pwr_irq"; 573 interrupt-names = "hc_irq", "pwr_irq";
572 clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; 574 clocks = <&gcc GCC_SDCC2_APPS_CLK>,
573 clock-names = "core", "iface"; 575 <&gcc GCC_SDCC2_AHB_CLK>,
576 <&xo_board>;
577 clock-names = "core", "iface", "xo";
574 status = "disabled"; 578 status = "disabled";
575 }; 579 };
576 580