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authorEnric Balletbo i Serra <enric.balletbo@collabora.com>2017-01-16 11:57:33 -0500
committerTony Lindgren <tony@atomide.com>2017-01-20 13:34:21 -0500
commitf37f911b805e8d8b020aae4bc394be4f41609db0 (patch)
treef6c1aaa62152048b45ce92bf6f08de616fa76426
parente9c7bebed367e3af7c4226a7471f1cd7b87c17d3 (diff)
ARM: dts: am335x-sl50: Enable SPI0 interface and Flash Memory.
Add support for the 32Mb Serial Flash Memory connected to SPI0 and using CS1. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/boot/dts/am335x-sl50.dts24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am335x-sl50.dts b/arch/arm/boot/dts/am335x-sl50.dts
index 89ddf26b94d3..6f320780d0cc 100644
--- a/arch/arm/boot/dts/am335x-sl50.dts
+++ b/arch/arm/boot/dts/am335x-sl50.dts
@@ -262,6 +262,16 @@
262 >; 262 >;
263 }; 263 };
264 264
265 spi0_pins: pinmux_spi0_pins {
266 pinctrl-single,pins = <
267 AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_MOSI - spi0_d0.spi0_d0 */
268 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_MISO - spi0_d1.spi0_d1 */
269 AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CLK - spi0_clk.spi0_clk */
270 AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CS0 (NBATTSS) - spi0_cs0.spi0_cs0 */
271 AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CS1 (FPGA_FLASH_NCS) - spi0_cs1.spi0_cs1 */
272 >;
273 };
274
265 lwb_pins: pinmux_lwb_pins { 275 lwb_pins: pinmux_lwb_pins {
266 pinctrl-single,pins = < 276 pinctrl-single,pins = <
267 AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7) /* SoundPA_en - mcasp0_fsr.gpio3_19 */ 277 AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7) /* SoundPA_en - mcasp0_fsr.gpio3_19 */
@@ -400,6 +410,20 @@
400 pinctrl-0 = <&uart4_pins>; 410 pinctrl-0 = <&uart4_pins>;
401}; 411};
402 412
413&spi0 {
414 status = "okay";
415 pinctrl-names = "default";
416 pinctrl-0 = <&spi0_pins>;
417
418 flash: n25q032@1 {
419 #address-cells = <1>;
420 #size-cells = <1>;
421 compatible = "micron,n25q032";
422 reg = <1>;
423 spi-max-frequency = <5000000>;
424 };
425};
426
403#include "tps65217.dtsi" 427#include "tps65217.dtsi"
404 428
405&tps { 429&tps {