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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-08 21:42:44 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-08 21:42:44 -0500
commitf2fb38049c724558c590c31e57627f6ba8d48a5b (patch)
tree51ff06495a51de92c24d1b9ec7759d61e8560928
parentb2776bf7149bddd1f4161f14f79520f17fc1d71d (diff)
parent33d73935e4abb2c75f263dd31a314db09ccf41be (diff)
Merge tag 'mmc-v3.19-1' of git://git.linaro.org/people/ulf.hansson/mmc
Pull MMC updates from Ulf Hansson: "MMC core: - Consolidation and cleanups. - Some improvements regarding error handling. - Increase maximum amount of block devices. - Use correct OCR mask for SDIO when restoring power. - Fix prepared requests while doing BKOPS. - Convert to modern PM ops. - Add mmc_send_tuning() API and convert some hosts to use it. MMC host: - toshsd: New Toshiba PCI SD controller driver. - sdhci: 64-bit ADMA support. - sdhci: Some regulator fixes. - sdhci: HS400 support. - sdhci: Various fixes cleanups. - atmel-mci: Modernization and cleanups. - atmel-mci: Runtime PM support. - omap_hsmmc: Modernization and cleanups. - omap_hsmmc: Fix UHS card with DDR50 support. - dw_mmc: Support for ARM64 and Exynos 7 variant. - dw_mmc: Add support for IMG Pistachio variant. - dw_mmc: Various fixes and cleanups. - mvsdio: DMA fixes. - mxs-mmc: Modernization and cleanups. - mxcmmc: Various fixes" * tag 'mmc-v3.19-1' of git://git.linaro.org/people/ulf.hansson/mmc: (126 commits) mmc: sdhci-msm: Convert to mmc_send_tuning() mmc: sdhci-esdhc-imx: Convert to mmc_send_tuning() mmc: core: Let mmc_send_tuning() to take struct mmc_host* as parameter mmc: queue: Improve error handling during allocation of bounce buffers mmc: sdhci-acpi: Add two host capabilities for Intel mmc: sdhci-pci: Add two host capabilities for BYT mmc: sdhci-acpi: Add SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC mmc: sdhci-pci: Add SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC to BYT mmc: atmel-mci: use probe deferring if dma controller is not ready yet mmc: atmel-mci: stop using specific initcall mmc: atmel-mci: remove __init/__exit attributes mmc: atmel-mci: remove useless DMA stuff for non-dt devices mmc: omap_hsmmc: Fix UHS card with DDR50 support mmc: core: add core-level function for sending tuning commands mmc: core: hold SD Clock before CMD11 during Signal mmc: mxs-mmc: Check for clk_prepare_enable() error mmc: mxs-mmc: Propagate the real error mmc: mxs-mmc: No need to do NULL check on 'iores' mmc: dw_mmc: Add support for IMG Pistachio mmc: mxs-mmc: Simplify PM hooks ...
-rw-r--r--Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt4
-rw-r--r--Documentation/devicetree/bindings/mmc/img-dw-mshc.txt29
-rw-r--r--Documentation/devicetree/bindings/mmc/sdhci-pxa.txt7
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c2
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c2
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c4
-rw-r--r--arch/arm/mach-omap2/hsmmc.c158
-rw-r--r--arch/arm/mach-omap2/hsmmc.h9
-rw-r--r--arch/arm/mach-omap2/mmc.h10
-rw-r--r--arch/arm/mach-omap2/omap4-common.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c8
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c8
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_54xx_data.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c4
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c2
-rw-r--r--arch/avr32/mach-at32ap/include/mach/atmel-mci.h17
-rw-r--r--drivers/mmc/card/block.c83
-rw-r--r--drivers/mmc/card/mmc_test.c28
-rw-r--r--drivers/mmc/card/queue.c16
-rw-r--r--drivers/mmc/core/bus.c55
-rw-r--r--drivers/mmc/core/core.c111
-rw-r--r--drivers/mmc/core/core.h1
-rw-r--r--drivers/mmc/core/debugfs.c9
-rw-r--r--drivers/mmc/core/mmc.c184
-rw-r--r--drivers/mmc/core/mmc_ops.c130
-rw-r--r--drivers/mmc/core/mmc_ops.h2
-rw-r--r--drivers/mmc/core/sdio.c10
-rw-r--r--drivers/mmc/core/sdio_bus.c16
-rw-r--r--drivers/mmc/host/Kconfig7
-rw-r--r--drivers/mmc/host/Makefile1
-rw-r--r--drivers/mmc/host/atmel-mci.c207
-rw-r--r--drivers/mmc/host/dw_mmc-exynos.c91
-rw-r--r--drivers/mmc/host/dw_mmc-pltfm.c6
-rw-r--r--drivers/mmc/host/dw_mmc-rockchip.c13
-rw-r--r--drivers/mmc/host/dw_mmc.c346
-rw-r--r--drivers/mmc/host/dw_mmc.h15
-rw-r--r--drivers/mmc/host/mmci.c7
-rw-r--r--drivers/mmc/host/msm_sdcc.c6
-rw-r--r--drivers/mmc/host/mvsdio.c7
-rw-r--r--drivers/mmc/host/mxcmmc.c25
-rw-r--r--drivers/mmc/host/mxs-mmc.c26
-rw-r--r--drivers/mmc/host/omap_hsmmc.c286
-rw-r--r--drivers/mmc/host/sdhci-acpi.c52
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c78
-rw-r--r--drivers/mmc/host/sdhci-msm.c50
-rw-r--r--drivers/mmc/host/sdhci-of-arasan.c5
-rw-r--r--drivers/mmc/host/sdhci-pci-o2micro.c2
-rw-r--r--drivers/mmc/host/sdhci-pci.c56
-rw-r--r--drivers/mmc/host/sdhci-pxav2.c15
-rw-r--r--drivers/mmc/host/sdhci-pxav3.c60
-rw-r--r--drivers/mmc/host/sdhci-s3c.c8
-rw-r--r--drivers/mmc/host/sdhci.c273
-rw-r--r--drivers/mmc/host/sdhci.h45
-rw-r--r--drivers/mmc/host/sunxi-mmc.c1
-rw-r--r--drivers/mmc/host/toshsd.c717
-rw-r--r--drivers/mmc/host/toshsd.h176
-rw-r--r--include/linux/atmel-mci.h2
-rw-r--r--include/linux/mmc/card.h23
-rw-r--r--include/linux/mmc/core.h3
-rw-r--r--include/linux/mmc/dw_mmc.h7
-rw-r--r--include/linux/mmc/host.h1
-rw-r--r--include/linux/mmc/mmc.h3
-rw-r--r--include/linux/mmc/sdhci.h18
-rw-r--r--include/linux/mmc/sdio_func.h2
-rw-r--r--include/linux/platform_data/hsmmc-omap.h90
-rw-r--r--include/linux/platform_data/mmc-atmel-mci.h (renamed from arch/arm/mach-at91/include/mach/atmel-mci.h)13
-rw-r--r--include/linux/platform_data/mmc-omap.h27
-rw-r--r--include/linux/platform_data/pxa_sdhci.h5
71 files changed, 2459 insertions, 1239 deletions
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 6cd3525d0e09..ee4fc0576c7d 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -18,6 +18,10 @@ Required Properties:
18 specific extensions. 18 specific extensions.
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420 19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
20 specific extensions. 20 specific extensions.
21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
22 specific extensions.
23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
24 specific extensions having an SMU.
21 25
22* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface 26* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
23 unit (ciu) clock. This property is applicable only for Exynos5 SoC's and 27 unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
diff --git a/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
new file mode 100644
index 000000000000..85de99fcaa2f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
@@ -0,0 +1,29 @@
1* Imagination specific extensions to the Synopsys Designware Mobile Storage
2 Host Controller
3
4The Synopsys designware mobile storage host controller is used to interface
5a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
6differences between the core Synopsys dw mshc controller properties described
7by synopsys-dw-mshc.txt and the properties used by the Imagination specific
8extensions to the Synopsys Designware Mobile Storage Host Controller.
9
10Required Properties:
11
12* compatible: should be
13 - "img,pistachio-dw-mshc": for Pistachio SoCs
14
15Example:
16
17 mmc@18142000 {
18 compatible = "img,pistachio-dw-mshc";
19 reg = <0x18142000 0x400>;
20 interrupts = <GIC_SHARED 39 IRQ_TYPE_LEVEL_HIGH>;
21
22 clocks = <&system_clk>, <&sdhost_clk>;
23 clock-names = "biu", "ciu";
24
25 fifo-depth = <0x20>;
26 bus-width = <4>;
27 num-slots = <1>;
28 disable-wp;
29 };
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt
index 86223c3eda90..4dd6deb90719 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt
@@ -12,6 +12,10 @@ Required properties:
12 * for "marvell,armada-380-sdhci", two register areas. The first one 12 * for "marvell,armada-380-sdhci", two register areas. The first one
13 for the SDHCI registers themselves, and the second one for the 13 for the SDHCI registers themselves, and the second one for the
14 AXI/Mbus bridge registers of the SDHCI unit. 14 AXI/Mbus bridge registers of the SDHCI unit.
15- clocks: Array of clocks required for SDHCI; requires at least one for
16 I/O clock.
17- clock-names: Array of names corresponding to clocks property; shall be
18 "io" for I/O clock and "core" for optional core clock.
15 19
16Optional properties: 20Optional properties:
17- mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning. 21- mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning.
@@ -23,6 +27,8 @@ sdhci@d4280800 {
23 reg = <0xd4280800 0x800>; 27 reg = <0xd4280800 0x800>;
24 bus-width = <8>; 28 bus-width = <8>;
25 interrupts = <27>; 29 interrupts = <27>;
30 clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;
31 clock-names = "io", "core";
26 non-removable; 32 non-removable;
27 mrvl,clk-delay-cycles = <31>; 33 mrvl,clk-delay-cycles = <31>;
28}; 34};
@@ -32,5 +38,6 @@ sdhci@d8000 {
32 reg = <0xd8000 0x1000>, <0xdc000 0x100>; 38 reg = <0xd8000 0x1000>, <0xdc000 0x100>;
33 interrupts = <0 25 0x4>; 39 interrupts = <0 25 0x4>;
34 clocks = <&gateclk 17>; 40 clocks = <&gateclk 17>;
41 clock-names = "io";
35 mrvl,clk-delay-cycles = <0x1F>; 42 mrvl,clk-delay-cycles = <0x1F>;
36}; 43};
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 21ab782cc8e9..06ecbafd01ee 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -19,6 +19,7 @@
19#include <linux/i2c-gpio.h> 19#include <linux/i2c-gpio.h>
20#include <linux/atmel-mci.h> 20#include <linux/atmel-mci.h>
21#include <linux/platform_data/crypto-atmel.h> 21#include <linux/platform_data/crypto-atmel.h>
22#include <linux/platform_data/mmc-atmel-mci.h>
22 23
23#include <linux/platform_data/at91_adc.h> 24#include <linux/platform_data/at91_adc.h>
24 25
@@ -30,7 +31,6 @@
30#include <mach/at91_matrix.h> 31#include <mach/at91_matrix.h>
31#include <mach/at91sam9_smc.h> 32#include <mach/at91sam9_smc.h>
32#include <linux/platform_data/dma-atmel.h> 33#include <linux/platform_data/dma-atmel.h>
33#include <mach/atmel-mci.h>
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35 35
36#include <media/atmel-isi.h> 36#include <media/atmel-isi.h>
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 97767a27ca9d..e0ad64fde20e 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -21,8 +21,10 @@
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <linux/spi/spi.h> 22#include <linux/spi/spi.h>
23#include <linux/usb/musb.h> 23#include <linux/usb/musb.h>
24#include <linux/mmc/host.h>
24#include <linux/platform_data/spi-omap2-mcspi.h> 25#include <linux/platform_data/spi-omap2-mcspi.h>
25#include <linux/platform_data/mtd-onenand-omap2.h> 26#include <linux/platform_data/mtd-onenand-omap2.h>
27#include <linux/platform_data/mmc-omap.h>
26#include <linux/mfd/menelaus.h> 28#include <linux/mfd/menelaus.h>
27#include <sound/tlv320aic3x.h> 29#include <sound/tlv320aic3x.h>
28 30
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index ddfc8df83c6a..3d5040f82e90 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -484,7 +484,7 @@ static struct omap_mux_partition *partition;
484 * Current flows to eMMC when eMMC is off and the data lines are pulled up, 484 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
485 * so pull them down. N.B. we pull 8 lines because we are using 8 lines. 485 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
486 */ 486 */
487static void rx51_mmc2_remux(struct device *dev, int slot, int power_on) 487static void rx51_mmc2_remux(struct device *dev, int power_on)
488{ 488{
489 if (power_on) 489 if (power_on)
490 omap_mux_write_array(partition, rx51_mmc2_on_mux); 490 omap_mux_write_array(partition, rx51_mmc2_on_mux);
@@ -500,7 +500,6 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
500 .cover_only = true, 500 .cover_only = true,
501 .gpio_cd = 160, 501 .gpio_cd = 160,
502 .gpio_wp = -EINVAL, 502 .gpio_wp = -EINVAL,
503 .power_saving = true,
504 }, 503 },
505 { 504 {
506 .name = "internal", 505 .name = "internal",
@@ -510,7 +509,6 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
510 .gpio_cd = -EINVAL, 509 .gpio_cd = -EINVAL,
511 .gpio_wp = -EINVAL, 510 .gpio_wp = -EINVAL,
512 .nonremovable = true, 511 .nonremovable = true,
513 .power_saving = true,
514 .remux = rx51_mmc2_remux, 512 .remux = rx51_mmc2_remux,
515 }, 513 },
516 {} /* Terminator */ 514 {} /* Terminator */
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 07d4c7b35754..dc6e79c4484a 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -14,14 +14,15 @@
14#include <linux/string.h> 14#include <linux/string.h>
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/mmc/host.h>
17#include <linux/platform_data/gpio-omap.h> 18#include <linux/platform_data/gpio-omap.h>
19#include <linux/platform_data/hsmmc-omap.h>
18 20
19#include "soc.h" 21#include "soc.h"
20#include "omap_device.h" 22#include "omap_device.h"
21#include "omap-pm.h" 23#include "omap-pm.h"
22 24
23#include "mux.h" 25#include "mux.h"
24#include "mmc.h"
25#include "hsmmc.h" 26#include "hsmmc.h"
26#include "control.h" 27#include "control.h"
27 28
@@ -32,25 +33,14 @@ static u16 control_devconf1_offset;
32 33
33#define HSMMC_NAME_LEN 9 34#define HSMMC_NAME_LEN 9
34 35
35#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) 36static void omap_hsmmc1_before_set_reg(struct device *dev,
36 37 int power_on, int vdd)
37static int hsmmc_get_context_loss(struct device *dev)
38{
39 return omap_pm_get_dev_context_loss_count(dev);
40}
41
42#else
43#define hsmmc_get_context_loss NULL
44#endif
45
46static void omap_hsmmc1_before_set_reg(struct device *dev, int slot,
47 int power_on, int vdd)
48{ 38{
49 u32 reg, prog_io; 39 u32 reg, prog_io;
50 struct omap_mmc_platform_data *mmc = dev->platform_data; 40 struct omap_hsmmc_platform_data *mmc = dev->platform_data;
51 41
52 if (mmc->slots[0].remux) 42 if (mmc->remux)
53 mmc->slots[0].remux(dev, slot, power_on); 43 mmc->remux(dev, power_on);
54 44
55 /* 45 /*
56 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the 46 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
@@ -72,7 +62,7 @@ static void omap_hsmmc1_before_set_reg(struct device *dev, int slot,
72 omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1); 62 omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1);
73 } 63 }
74 64
75 if (mmc->slots[0].internal_clock) { 65 if (mmc->internal_clock) {
76 reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); 66 reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
77 reg |= OMAP2_MMCSDIO1ADPCLKISEL; 67 reg |= OMAP2_MMCSDIO1ADPCLKISEL;
78 omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0); 68 omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0);
@@ -96,8 +86,7 @@ static void omap_hsmmc1_before_set_reg(struct device *dev, int slot,
96 } 86 }
97} 87}
98 88
99static void omap_hsmmc1_after_set_reg(struct device *dev, int slot, 89static void omap_hsmmc1_after_set_reg(struct device *dev, int power_on, int vdd)
100 int power_on, int vdd)
101{ 90{
102 u32 reg; 91 u32 reg;
103 92
@@ -120,34 +109,32 @@ static void omap_hsmmc1_after_set_reg(struct device *dev, int slot,
120 } 109 }
121} 110}
122 111
123static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data *mmc) 112static void hsmmc2_select_input_clk_src(struct omap_hsmmc_platform_data *mmc)
124{ 113{
125 u32 reg; 114 u32 reg;
126 115
127 reg = omap_ctrl_readl(control_devconf1_offset); 116 reg = omap_ctrl_readl(control_devconf1_offset);
128 if (mmc->slots[0].internal_clock) 117 if (mmc->internal_clock)
129 reg |= OMAP2_MMCSDIO2ADPCLKISEL; 118 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
130 else 119 else
131 reg &= ~OMAP2_MMCSDIO2ADPCLKISEL; 120 reg &= ~OMAP2_MMCSDIO2ADPCLKISEL;
132 omap_ctrl_writel(reg, control_devconf1_offset); 121 omap_ctrl_writel(reg, control_devconf1_offset);
133} 122}
134 123
135static void hsmmc2_before_set_reg(struct device *dev, int slot, 124static void hsmmc2_before_set_reg(struct device *dev, int power_on, int vdd)
136 int power_on, int vdd)
137{ 125{
138 struct omap_mmc_platform_data *mmc = dev->platform_data; 126 struct omap_hsmmc_platform_data *mmc = dev->platform_data;
139 127
140 if (mmc->slots[0].remux) 128 if (mmc->remux)
141 mmc->slots[0].remux(dev, slot, power_on); 129 mmc->remux(dev, power_on);
142 130
143 if (power_on) 131 if (power_on)
144 hsmmc2_select_input_clk_src(mmc); 132 hsmmc2_select_input_clk_src(mmc);
145} 133}
146 134
147static int am35x_hsmmc2_set_power(struct device *dev, int slot, 135static int am35x_hsmmc2_set_power(struct device *dev, int power_on, int vdd)
148 int power_on, int vdd)
149{ 136{
150 struct omap_mmc_platform_data *mmc = dev->platform_data; 137 struct omap_hsmmc_platform_data *mmc = dev->platform_data;
151 138
152 if (power_on) 139 if (power_on)
153 hsmmc2_select_input_clk_src(mmc); 140 hsmmc2_select_input_clk_src(mmc);
@@ -155,23 +142,22 @@ static int am35x_hsmmc2_set_power(struct device *dev, int slot,
155 return 0; 142 return 0;
156} 143}
157 144
158static int nop_mmc_set_power(struct device *dev, int slot, int power_on, 145static int nop_mmc_set_power(struct device *dev, int power_on, int vdd)
159 int vdd)
160{ 146{
161 return 0; 147 return 0;
162} 148}
163 149
164static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller, 150static inline void omap_hsmmc_mux(struct omap_hsmmc_platform_data
165 int controller_nr) 151 *mmc_controller, int controller_nr)
166{ 152{
167 if (gpio_is_valid(mmc_controller->slots[0].switch_pin) && 153 if (gpio_is_valid(mmc_controller->switch_pin) &&
168 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES)) 154 (mmc_controller->switch_pin < OMAP_MAX_GPIO_LINES))
169 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin, 155 omap_mux_init_gpio(mmc_controller->switch_pin,
170 OMAP_PIN_INPUT_PULLUP); 156 OMAP_PIN_INPUT_PULLUP);
171 if (gpio_is_valid(mmc_controller->slots[0].gpio_wp) && 157 if (gpio_is_valid(mmc_controller->gpio_wp) &&
172 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES)) 158 (mmc_controller->gpio_wp < OMAP_MAX_GPIO_LINES))
173 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp, 159 omap_mux_init_gpio(mmc_controller->gpio_wp,
174 OMAP_PIN_INPUT_PULLUP); 160 OMAP_PIN_INPUT_PULLUP);
175 if (cpu_is_omap34xx()) { 161 if (cpu_is_omap34xx()) {
176 if (controller_nr == 0) { 162 if (controller_nr == 0) {
177 omap_mux_init_signal("sdmmc1_clk", 163 omap_mux_init_signal("sdmmc1_clk",
@@ -180,7 +166,7 @@ static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
180 OMAP_PIN_INPUT_PULLUP); 166 OMAP_PIN_INPUT_PULLUP);
181 omap_mux_init_signal("sdmmc1_dat0", 167 omap_mux_init_signal("sdmmc1_dat0",
182 OMAP_PIN_INPUT_PULLUP); 168 OMAP_PIN_INPUT_PULLUP);
183 if (mmc_controller->slots[0].caps & 169 if (mmc_controller->caps &
184 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) { 170 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
185 omap_mux_init_signal("sdmmc1_dat1", 171 omap_mux_init_signal("sdmmc1_dat1",
186 OMAP_PIN_INPUT_PULLUP); 172 OMAP_PIN_INPUT_PULLUP);
@@ -189,7 +175,7 @@ static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
189 omap_mux_init_signal("sdmmc1_dat3", 175 omap_mux_init_signal("sdmmc1_dat3",
190 OMAP_PIN_INPUT_PULLUP); 176 OMAP_PIN_INPUT_PULLUP);
191 } 177 }
192 if (mmc_controller->slots[0].caps & 178 if (mmc_controller->caps &
193 MMC_CAP_8_BIT_DATA) { 179 MMC_CAP_8_BIT_DATA) {
194 omap_mux_init_signal("sdmmc1_dat4", 180 omap_mux_init_signal("sdmmc1_dat4",
195 OMAP_PIN_INPUT_PULLUP); 181 OMAP_PIN_INPUT_PULLUP);
@@ -214,7 +200,7 @@ static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
214 * For 8 wire configurations, Lines DAT4, 5, 6 and 7 200 * For 8 wire configurations, Lines DAT4, 5, 6 and 7
215 * need to be muxed in the board-*.c files 201 * need to be muxed in the board-*.c files
216 */ 202 */
217 if (mmc_controller->slots[0].caps & 203 if (mmc_controller->caps &
218 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) { 204 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
219 omap_mux_init_signal("sdmmc2_dat1", 205 omap_mux_init_signal("sdmmc2_dat1",
220 OMAP_PIN_INPUT_PULLUP); 206 OMAP_PIN_INPUT_PULLUP);
@@ -223,7 +209,7 @@ static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
223 omap_mux_init_signal("sdmmc2_dat3", 209 omap_mux_init_signal("sdmmc2_dat3",
224 OMAP_PIN_INPUT_PULLUP); 210 OMAP_PIN_INPUT_PULLUP);
225 } 211 }
226 if (mmc_controller->slots[0].caps & 212 if (mmc_controller->caps &
227 MMC_CAP_8_BIT_DATA) { 213 MMC_CAP_8_BIT_DATA) {
228 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4", 214 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
229 OMAP_PIN_INPUT_PULLUP); 215 OMAP_PIN_INPUT_PULLUP);
@@ -243,7 +229,7 @@ static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
243} 229}
244 230
245static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, 231static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
246 struct omap_mmc_platform_data *mmc) 232 struct omap_hsmmc_platform_data *mmc)
247{ 233{
248 char *hc_name; 234 char *hc_name;
249 235
@@ -259,38 +245,22 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
259 else 245 else
260 snprintf(hc_name, (HSMMC_NAME_LEN + 1), "mmc%islot%i", 246 snprintf(hc_name, (HSMMC_NAME_LEN + 1), "mmc%islot%i",
261 c->mmc, 1); 247 c->mmc, 1);
262 mmc->slots[0].name = hc_name; 248 mmc->name = hc_name;
263 mmc->nr_slots = 1; 249 mmc->caps = c->caps;
264 mmc->slots[0].caps = c->caps; 250 mmc->internal_clock = !c->ext_clock;
265 mmc->slots[0].pm_caps = c->pm_caps;
266 mmc->slots[0].internal_clock = !c->ext_clock;
267 mmc->max_freq = c->max_freq;
268 mmc->reg_offset = 0; 251 mmc->reg_offset = 0;
269 mmc->get_context_loss_count = hsmmc_get_context_loss;
270 252
271 mmc->slots[0].switch_pin = c->gpio_cd; 253 mmc->switch_pin = c->gpio_cd;
272 mmc->slots[0].gpio_wp = c->gpio_wp; 254 mmc->gpio_wp = c->gpio_wp;
273 255
274 mmc->slots[0].remux = c->remux; 256 mmc->remux = c->remux;
275 mmc->slots[0].init_card = c->init_card; 257 mmc->init_card = c->init_card;
276 258
277 if (c->cover_only) 259 if (c->cover_only)
278 mmc->slots[0].cover = 1; 260 mmc->cover = 1;
279 261
280 if (c->nonremovable) 262 if (c->nonremovable)
281 mmc->slots[0].nonremovable = 1; 263 mmc->nonremovable = 1;
282
283 if (c->power_saving)
284 mmc->slots[0].power_saving = 1;
285
286 if (c->no_off)
287 mmc->slots[0].no_off = 1;
288
289 if (c->no_off_init)
290 mmc->slots[0].no_regulator_off_init = c->no_off_init;
291
292 if (c->vcc_aux_disable_is_sleep)
293 mmc->slots[0].vcc_aux_disable_is_sleep = 1;
294 264
295 /* 265 /*
296 * NOTE: MMC slots should have a Vcc regulator set up. 266 * NOTE: MMC slots should have a Vcc regulator set up.
@@ -300,42 +270,42 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
300 * temporary HACK: ocr_mask instead of fixed supply 270 * temporary HACK: ocr_mask instead of fixed supply
301 */ 271 */
302 if (soc_is_am35xx()) 272 if (soc_is_am35xx())
303 mmc->slots[0].ocr_mask = MMC_VDD_165_195 | 273 mmc->ocr_mask = MMC_VDD_165_195 |
304 MMC_VDD_26_27 | 274 MMC_VDD_26_27 |
305 MMC_VDD_27_28 | 275 MMC_VDD_27_28 |
306 MMC_VDD_29_30 | 276 MMC_VDD_29_30 |
307 MMC_VDD_30_31 | 277 MMC_VDD_30_31 |
308 MMC_VDD_31_32; 278 MMC_VDD_31_32;
309 else 279 else
310 mmc->slots[0].ocr_mask = c->ocr_mask; 280 mmc->ocr_mask = c->ocr_mask;
311 281
312 if (!soc_is_am35xx()) 282 if (!soc_is_am35xx())
313 mmc->slots[0].features |= HSMMC_HAS_PBIAS; 283 mmc->features |= HSMMC_HAS_PBIAS;
314 284
315 switch (c->mmc) { 285 switch (c->mmc) {
316 case 1: 286 case 1:
317 if (mmc->slots[0].features & HSMMC_HAS_PBIAS) { 287 if (mmc->features & HSMMC_HAS_PBIAS) {
318 /* on-chip level shifting via PBIAS0/PBIAS1 */ 288 /* on-chip level shifting via PBIAS0/PBIAS1 */
319 mmc->slots[0].before_set_reg = 289 mmc->before_set_reg =
320 omap_hsmmc1_before_set_reg; 290 omap_hsmmc1_before_set_reg;
321 mmc->slots[0].after_set_reg = 291 mmc->after_set_reg =
322 omap_hsmmc1_after_set_reg; 292 omap_hsmmc1_after_set_reg;
323 } 293 }
324 294
325 if (soc_is_am35xx()) 295 if (soc_is_am35xx())
326 mmc->slots[0].set_power = nop_mmc_set_power; 296 mmc->set_power = nop_mmc_set_power;
327 297
328 /* OMAP3630 HSMMC1 supports only 4-bit */ 298 /* OMAP3630 HSMMC1 supports only 4-bit */
329 if (cpu_is_omap3630() && 299 if (cpu_is_omap3630() &&
330 (c->caps & MMC_CAP_8_BIT_DATA)) { 300 (c->caps & MMC_CAP_8_BIT_DATA)) {
331 c->caps &= ~MMC_CAP_8_BIT_DATA; 301 c->caps &= ~MMC_CAP_8_BIT_DATA;
332 c->caps |= MMC_CAP_4_BIT_DATA; 302 c->caps |= MMC_CAP_4_BIT_DATA;
333 mmc->slots[0].caps = c->caps; 303 mmc->caps = c->caps;
334 } 304 }
335 break; 305 break;
336 case 2: 306 case 2:
337 if (soc_is_am35xx()) 307 if (soc_is_am35xx())
338 mmc->slots[0].set_power = am35x_hsmmc2_set_power; 308 mmc->set_power = am35x_hsmmc2_set_power;
339 309
340 if (c->ext_clock) 310 if (c->ext_clock)
341 c->transceiver = 1; 311 c->transceiver = 1;
@@ -343,17 +313,17 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
343 c->caps &= ~MMC_CAP_8_BIT_DATA; 313 c->caps &= ~MMC_CAP_8_BIT_DATA;
344 c->caps |= MMC_CAP_4_BIT_DATA; 314 c->caps |= MMC_CAP_4_BIT_DATA;
345 } 315 }
346 if (mmc->slots[0].features & HSMMC_HAS_PBIAS) { 316 if (mmc->features & HSMMC_HAS_PBIAS) {
347 /* off-chip level shifting, or none */ 317 /* off-chip level shifting, or none */
348 mmc->slots[0].before_set_reg = hsmmc2_before_set_reg; 318 mmc->before_set_reg = hsmmc2_before_set_reg;
349 mmc->slots[0].after_set_reg = NULL; 319 mmc->after_set_reg = NULL;
350 } 320 }
351 break; 321 break;
352 case 3: 322 case 3:
353 case 4: 323 case 4:
354 case 5: 324 case 5:
355 mmc->slots[0].before_set_reg = NULL; 325 mmc->before_set_reg = NULL;
356 mmc->slots[0].after_set_reg = NULL; 326 mmc->after_set_reg = NULL;
357 break; 327 break;
358 default: 328 default:
359 pr_err("MMC%d configuration not supported!\n", c->mmc); 329 pr_err("MMC%d configuration not supported!\n", c->mmc);
@@ -368,7 +338,7 @@ static int omap_hsmmc_done;
368void omap_hsmmc_late_init(struct omap2_hsmmc_info *c) 338void omap_hsmmc_late_init(struct omap2_hsmmc_info *c)
369{ 339{
370 struct platform_device *pdev; 340 struct platform_device *pdev;
371 struct omap_mmc_platform_data *mmc_pdata; 341 struct omap_hsmmc_platform_data *mmc_pdata;
372 int res; 342 int res;
373 343
374 if (omap_hsmmc_done != 1) 344 if (omap_hsmmc_done != 1)
@@ -388,8 +358,8 @@ void omap_hsmmc_late_init(struct omap2_hsmmc_info *c)
388 if (!mmc_pdata) 358 if (!mmc_pdata)
389 continue; 359 continue;
390 360
391 mmc_pdata->slots[0].switch_pin = c->gpio_cd; 361 mmc_pdata->switch_pin = c->gpio_cd;
392 mmc_pdata->slots[0].gpio_wp = c->gpio_wp; 362 mmc_pdata->gpio_wp = c->gpio_wp;
393 363
394 res = omap_device_register(pdev); 364 res = omap_device_register(pdev);
395 if (res) 365 if (res)
@@ -408,12 +378,12 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
408 struct omap_device *od; 378 struct omap_device *od;
409 struct platform_device *pdev; 379 struct platform_device *pdev;
410 char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; 380 char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN];
411 struct omap_mmc_platform_data *mmc_data; 381 struct omap_hsmmc_platform_data *mmc_data;
412 struct omap_mmc_dev_attr *mmc_dev_attr; 382 struct omap_hsmmc_dev_attr *mmc_dev_attr;
413 char *name; 383 char *name;
414 int res; 384 int res;
415 385
416 mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL); 386 mmc_data = kzalloc(sizeof(*mmc_data), GFP_KERNEL);
417 if (!mmc_data) { 387 if (!mmc_data) {
418 pr_err("Cannot allocate memory for mmc device!\n"); 388 pr_err("Cannot allocate memory for mmc device!\n");
419 return; 389 return;
@@ -463,7 +433,7 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
463 } 433 }
464 434
465 res = platform_device_add_data(pdev, mmc_data, 435 res = platform_device_add_data(pdev, mmc_data,
466 sizeof(struct omap_mmc_platform_data)); 436 sizeof(struct omap_hsmmc_platform_data));
467 if (res) { 437 if (res) {
468 pr_err("Could not add pdata for %s\n", name); 438 pr_err("Could not add pdata for %s\n", name);
469 goto put_pdev; 439 goto put_pdev;
@@ -489,7 +459,7 @@ put_pdev:
489 platform_device_put(pdev); 459 platform_device_put(pdev);
490 460
491free_name: 461free_name:
492 kfree(mmc_data->slots[0].name); 462 kfree(mmc_data->name);
493 463
494free_mmc: 464free_mmc:
495 kfree(mmc_data); 465 kfree(mmc_data);
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h
index 7f2e790e0929..148cd9b15499 100644
--- a/arch/arm/mach-omap2/hsmmc.h
+++ b/arch/arm/mach-omap2/hsmmc.h
@@ -12,25 +12,18 @@ struct omap2_hsmmc_info {
12 u8 mmc; /* controller 1/2/3 */ 12 u8 mmc; /* controller 1/2/3 */
13 u32 caps; /* 4/8 wires and any additional host 13 u32 caps; /* 4/8 wires and any additional host
14 * capabilities OR'd (ref. linux/mmc/host.h) */ 14 * capabilities OR'd (ref. linux/mmc/host.h) */
15 u32 pm_caps; /* PM capabilities */
16 bool transceiver; /* MMC-2 option */ 15 bool transceiver; /* MMC-2 option */
17 bool ext_clock; /* use external pin for input clock */ 16 bool ext_clock; /* use external pin for input clock */
18 bool cover_only; /* No card detect - just cover switch */ 17 bool cover_only; /* No card detect - just cover switch */
19 bool nonremovable; /* Nonremovable e.g. eMMC */ 18 bool nonremovable; /* Nonremovable e.g. eMMC */
20 bool power_saving; /* Try to sleep or power off when possible */
21 bool no_off; /* power_saving and power is not to go off */
22 bool no_off_init; /* no power off when not in MMC sleep state */
23 bool vcc_aux_disable_is_sleep; /* Regulator off remapped to sleep */
24 bool deferred; /* mmc needs a deferred probe */ 19 bool deferred; /* mmc needs a deferred probe */
25 int gpio_cd; /* or -EINVAL */ 20 int gpio_cd; /* or -EINVAL */
26 int gpio_wp; /* or -EINVAL */ 21 int gpio_wp; /* or -EINVAL */
27 char *name; /* or NULL for default */ 22 char *name; /* or NULL for default */
28 struct platform_device *pdev; /* mmc controller instance */ 23 struct platform_device *pdev; /* mmc controller instance */
29 int ocr_mask; /* temporary HACK */ 24 int ocr_mask; /* temporary HACK */
30 int max_freq; /* maximum clock, if constrained by external
31 * circuitry, or 0 for default */
32 /* Remux (pad configuration) when powering on/off */ 25 /* Remux (pad configuration) when powering on/off */
33 void (*remux)(struct device *dev, int slot, int power_on); 26 void (*remux)(struct device *dev, int power_on);
34 /* init some special card */ 27 /* init some special card */
35 void (*init_card)(struct mmc_card *card); 28 void (*init_card)(struct mmc_card *card);
36}; 29};
diff --git a/arch/arm/mach-omap2/mmc.h b/arch/arm/mach-omap2/mmc.h
index 0cd4b089da9c..30d39b97e7dd 100644
--- a/arch/arm/mach-omap2/mmc.h
+++ b/arch/arm/mach-omap2/mmc.h
@@ -1,5 +1,3 @@
1#include <linux/mmc/host.h>
2#include <linux/platform_data/mmc-omap.h>
3 1
4#define OMAP24XX_NR_MMC 2 2#define OMAP24XX_NR_MMC 2
5#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE 3#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
@@ -7,14 +5,6 @@
7 5
8#define OMAP4_MMC_REG_OFFSET 0x100 6#define OMAP4_MMC_REG_OFFSET 0x100
9 7
10#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
11void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
12#else
13static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
14{
15}
16#endif
17
18struct omap_hwmod; 8struct omap_hwmod;
19int omap_msdi_reset(struct omap_hwmod *oh); 9int omap_msdi_reset(struct omap_hwmod *oh);
20 10
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 16b20cedc38d..b7cb44abe49b 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -36,7 +36,6 @@
36#include "soc.h" 36#include "soc.h"
37#include "iomap.h" 37#include "iomap.h"
38#include "common.h" 38#include "common.h"
39#include "mmc.h"
40#include "prminst44xx.h" 39#include "prminst44xx.h"
41#include "prcm_mpu44xx.h" 40#include "prcm_mpu44xx.h"
42#include "omap4-sar-layout.h" 41#include "omap4-sar-layout.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index c2555cb95e71..79127b35fe60 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -15,12 +15,12 @@
15 15
16#include <linux/i2c-omap.h> 16#include <linux/i2c-omap.h>
17#include <linux/platform_data/asoc-ti-mcbsp.h> 17#include <linux/platform_data/asoc-ti-mcbsp.h>
18#include <linux/platform_data/hsmmc-omap.h>
18#include <linux/platform_data/spi-omap2-mcspi.h> 19#include <linux/platform_data/spi-omap2-mcspi.h>
19#include <linux/omap-dma.h> 20#include <linux/omap-dma.h>
20#include <plat/dmtimer.h> 21#include <plat/dmtimer.h>
21 22
22#include "omap_hwmod.h" 23#include "omap_hwmod.h"
23#include "mmc.h"
24#include "l3_2xxx.h" 24#include "l3_2xxx.h"
25 25
26#include "soc.h" 26#include "soc.h"
@@ -372,7 +372,7 @@ static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = {
372 { .role = "dbck", .clk = "mmchsdb1_fck" }, 372 { .role = "dbck", .clk = "mmchsdb1_fck" },
373}; 373};
374 374
375static struct omap_mmc_dev_attr mmc1_dev_attr = { 375static struct omap_hsmmc_dev_attr mmc1_dev_attr = {
376 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 376 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
377}; 377};
378 378
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
index a579b89ce9b7..cabc5695b504 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
@@ -15,10 +15,10 @@
15 */ 15 */
16 16
17#include <linux/platform_data/gpio-omap.h> 17#include <linux/platform_data/gpio-omap.h>
18#include <linux/platform_data/hsmmc-omap.h>
18#include <linux/platform_data/spi-omap2-mcspi.h> 19#include <linux/platform_data/spi-omap2-mcspi.h>
19#include "omap_hwmod.h" 20#include "omap_hwmod.h"
20#include "i2c.h" 21#include "i2c.h"
21#include "mmc.h"
22#include "wd_timer.h" 22#include "wd_timer.h"
23#include "cm33xx.h" 23#include "cm33xx.h"
24#include "prm33xx.h" 24#include "prm33xx.h"
@@ -836,7 +836,7 @@ static struct omap_hwmod_class am33xx_mmc_hwmod_class = {
836}; 836};
837 837
838/* mmc0 */ 838/* mmc0 */
839static struct omap_mmc_dev_attr am33xx_mmc0_dev_attr = { 839static struct omap_hsmmc_dev_attr am33xx_mmc0_dev_attr = {
840 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 840 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
841}; 841};
842 842
@@ -854,7 +854,7 @@ struct omap_hwmod am33xx_mmc0_hwmod = {
854}; 854};
855 855
856/* mmc1 */ 856/* mmc1 */
857static struct omap_mmc_dev_attr am33xx_mmc1_dev_attr = { 857static struct omap_hsmmc_dev_attr am33xx_mmc1_dev_attr = {
858 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 858 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
859}; 859};
860 860
@@ -872,7 +872,7 @@ struct omap_hwmod am33xx_mmc1_hwmod = {
872}; 872};
873 873
874/* mmc2 */ 874/* mmc2 */
875static struct omap_mmc_dev_attr am33xx_mmc2_dev_attr = { 875static struct omap_hsmmc_dev_attr am33xx_mmc2_dev_attr = {
876 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 876 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
877}; 877};
878struct omap_hwmod am33xx_mmc2_hwmod = { 878struct omap_hwmod am33xx_mmc2_hwmod = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 6b406ca4bd3b..0cf7b563dcd1 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -27,7 +27,6 @@
27#include "prm33xx.h" 27#include "prm33xx.h"
28#include "prm-regbits-33xx.h" 28#include "prm-regbits-33xx.h"
29#include "i2c.h" 29#include "i2c.h"
30#include "mmc.h"
31#include "wd_timer.h" 30#include "wd_timer.h"
32#include "omap_hwmod_33xx_43xx_common_data.h" 31#include "omap_hwmod_33xx_43xx_common_data.h"
33 32
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 2a78b093c0ce..11468eea3871 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -18,6 +18,7 @@
18#include <linux/i2c-omap.h> 18#include <linux/i2c-omap.h>
19#include <linux/power/smartreflex.h> 19#include <linux/power/smartreflex.h>
20#include <linux/platform_data/gpio-omap.h> 20#include <linux/platform_data/gpio-omap.h>
21#include <linux/platform_data/hsmmc-omap.h>
21 22
22#include <linux/omap-dma.h> 23#include <linux/omap-dma.h>
23#include "l3_3xxx.h" 24#include "l3_3xxx.h"
@@ -37,7 +38,6 @@
37#include "cm-regbits-34xx.h" 38#include "cm-regbits-34xx.h"
38 39
39#include "i2c.h" 40#include "i2c.h"
40#include "mmc.h"
41#include "wd_timer.h" 41#include "wd_timer.h"
42#include "serial.h" 42#include "serial.h"
43 43
@@ -1786,12 +1786,12 @@ static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = {
1786 { .role = "dbck", .clk = "omap_32k_fck", }, 1786 { .role = "dbck", .clk = "omap_32k_fck", },
1787}; 1787};
1788 1788
1789static struct omap_mmc_dev_attr mmc1_dev_attr = { 1789static struct omap_hsmmc_dev_attr mmc1_dev_attr = {
1790 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 1790 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
1791}; 1791};
1792 1792
1793/* See 35xx errata 2.1.1.128 in SPRZ278F */ 1793/* See 35xx errata 2.1.1.128 in SPRZ278F */
1794static struct omap_mmc_dev_attr mmc1_pre_es3_dev_attr = { 1794static struct omap_hsmmc_dev_attr mmc1_pre_es3_dev_attr = {
1795 .flags = (OMAP_HSMMC_SUPPORTS_DUAL_VOLT | 1795 .flags = (OMAP_HSMMC_SUPPORTS_DUAL_VOLT |
1796 OMAP_HSMMC_BROKEN_MULTIBLOCK_READ), 1796 OMAP_HSMMC_BROKEN_MULTIBLOCK_READ),
1797}; 1797};
@@ -1854,7 +1854,7 @@ static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = {
1854}; 1854};
1855 1855
1856/* See 35xx errata 2.1.1.128 in SPRZ278F */ 1856/* See 35xx errata 2.1.1.128 in SPRZ278F */
1857static struct omap_mmc_dev_attr mmc2_pre_es3_dev_attr = { 1857static struct omap_hsmmc_dev_attr mmc2_pre_es3_dev_attr = {
1858 .flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ, 1858 .flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ,
1859}; 1859};
1860 1860
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 44e5634bba34..d8a3cf1c1787 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -22,6 +22,7 @@
22 22
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/platform_data/gpio-omap.h> 24#include <linux/platform_data/gpio-omap.h>
25#include <linux/platform_data/hsmmc-omap.h>
25#include <linux/power/smartreflex.h> 26#include <linux/power/smartreflex.h>
26#include <linux/i2c-omap.h> 27#include <linux/i2c-omap.h>
27 28
@@ -39,7 +40,6 @@
39#include "prm44xx.h" 40#include "prm44xx.h"
40#include "prm-regbits-44xx.h" 41#include "prm-regbits-44xx.h"
41#include "i2c.h" 42#include "i2c.h"
42#include "mmc.h"
43#include "wd_timer.h" 43#include "wd_timer.h"
44 44
45/* Base offset for all OMAP4 interrupts external to MPUSS */ 45/* Base offset for all OMAP4 interrupts external to MPUSS */
@@ -1952,7 +1952,7 @@ static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = {
1952}; 1952};
1953 1953
1954/* mmc1 dev_attr */ 1954/* mmc1 dev_attr */
1955static struct omap_mmc_dev_attr mmc1_dev_attr = { 1955static struct omap_hsmmc_dev_attr mmc1_dev_attr = {
1956 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 1956 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
1957}; 1957};
1958 1958
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 1103aa0e0d29..5ec786a76d3c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -19,6 +19,7 @@
19 19
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/platform_data/gpio-omap.h> 21#include <linux/platform_data/gpio-omap.h>
22#include <linux/platform_data/hsmmc-omap.h>
22#include <linux/power/smartreflex.h> 23#include <linux/power/smartreflex.h>
23#include <linux/i2c-omap.h> 24#include <linux/i2c-omap.h>
24 25
@@ -33,7 +34,6 @@
33#include "cm2_54xx.h" 34#include "cm2_54xx.h"
34#include "prm54xx.h" 35#include "prm54xx.h"
35#include "i2c.h" 36#include "i2c.h"
36#include "mmc.h"
37#include "wd_timer.h" 37#include "wd_timer.h"
38 38
39/* Base offset for all OMAP5 interrupts external to MPUSS */ 39/* Base offset for all OMAP5 interrupts external to MPUSS */
@@ -1269,7 +1269,7 @@ static struct omap_hwmod_opt_clk mmc1_opt_clks[] = {
1269}; 1269};
1270 1270
1271/* mmc1 dev_attr */ 1271/* mmc1 dev_attr */
1272static struct omap_mmc_dev_attr mmc1_dev_attr = { 1272static struct omap_hsmmc_dev_attr mmc1_dev_attr = {
1273 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 1273 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
1274}; 1274};
1275 1275
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 5684f112654b..711c97e90990 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -19,6 +19,7 @@
19 19
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/platform_data/gpio-omap.h> 21#include <linux/platform_data/gpio-omap.h>
22#include <linux/platform_data/hsmmc-omap.h>
22#include <linux/power/smartreflex.h> 23#include <linux/power/smartreflex.h>
23#include <linux/i2c-omap.h> 24#include <linux/i2c-omap.h>
24 25
@@ -33,7 +34,6 @@
33#include "cm2_7xx.h" 34#include "cm2_7xx.h"
34#include "prm7xx.h" 35#include "prm7xx.h"
35#include "i2c.h" 36#include "i2c.h"
36#include "mmc.h"
37#include "wd_timer.h" 37#include "wd_timer.h"
38#include "soc.h" 38#include "soc.h"
39 39
@@ -1301,7 +1301,7 @@ static struct omap_hwmod_opt_clk mmc1_opt_clks[] = {
1301}; 1301};
1302 1302
1303/* mmc1 dev_attr */ 1303/* mmc1 dev_attr */
1304static struct omap_mmc_dev_attr mmc1_dev_attr = { 1304static struct omap_hsmmc_dev_attr mmc1_dev_attr = {
1305 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 1305 .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
1306}; 1306};
1307 1307
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 37b75602adf6..cc92cdb9994c 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -17,7 +17,7 @@
17#include <linux/spi/spi.h> 17#include <linux/spi/spi.h>
18#include <linux/usb/atmel_usba_udc.h> 18#include <linux/usb/atmel_usba_udc.h>
19 19
20#include <mach/atmel-mci.h> 20#include <linux/platform_data/mmc-atmel-mci.h>
21#include <linux/atmel-mci.h> 21#include <linux/atmel-mci.h>
22 22
23#include <asm/io.h> 23#include <asm/io.h>
diff --git a/arch/avr32/mach-at32ap/include/mach/atmel-mci.h b/arch/avr32/mach-at32ap/include/mach/atmel-mci.h
deleted file mode 100644
index 11d7f4b28dc8..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/atmel-mci.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef __MACH_ATMEL_MCI_H
2#define __MACH_ATMEL_MCI_H
3
4#include <linux/platform_data/dma-dw.h>
5
6/**
7 * struct mci_dma_data - DMA data for MCI interface
8 */
9struct mci_dma_data {
10 struct dw_dma_slave sdata;
11};
12
13/* accessor macros */
14#define slave_data_ptr(s) (&(s)->sdata)
15#define find_slave_dev(s) ((s)->sdata.dma_dev)
16
17#endif /* __MACH_ATMEL_MCI_H */
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index 1fa4c80ff886..4409d79ed650 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -78,13 +78,16 @@ static int perdev_minors = CONFIG_MMC_BLOCK_MINORS;
78 78
79/* 79/*
80 * We've only got one major, so number of mmcblk devices is 80 * We've only got one major, so number of mmcblk devices is
81 * limited to 256 / number of minors per device. 81 * limited to (1 << 20) / number of minors per device. It is also
82 * currently limited by the size of the static bitmaps below.
82 */ 83 */
83static int max_devices; 84static int max_devices;
84 85
85/* 256 minors, so at most 256 separate devices */ 86#define MAX_DEVICES 256
86static DECLARE_BITMAP(dev_use, 256); 87
87static DECLARE_BITMAP(name_use, 256); 88/* TODO: Replace these with struct ida */
89static DECLARE_BITMAP(dev_use, MAX_DEVICES);
90static DECLARE_BITMAP(name_use, MAX_DEVICES);
88 91
89/* 92/*
90 * There is one mmc_blk_data per slot. 93 * There is one mmc_blk_data per slot.
@@ -112,7 +115,7 @@ struct mmc_blk_data {
112 115
113 /* 116 /*
114 * Only set in main mmc_blk_data associated 117 * Only set in main mmc_blk_data associated
115 * with mmc_card with mmc_set_drvdata, and keeps 118 * with mmc_card with dev_set_drvdata, and keeps
116 * track of the current selected device partition. 119 * track of the current selected device partition.
117 */ 120 */
118 unsigned int part_curr; 121 unsigned int part_curr;
@@ -260,7 +263,7 @@ static ssize_t force_ro_show(struct device *dev, struct device_attribute *attr,
260 int ret; 263 int ret;
261 struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev)); 264 struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
262 265
263 ret = snprintf(buf, PAGE_SIZE, "%d", 266 ret = snprintf(buf, PAGE_SIZE, "%d\n",
264 get_disk_ro(dev_to_disk(dev)) ^ 267 get_disk_ro(dev_to_disk(dev)) ^
265 md->read_only); 268 md->read_only);
266 mmc_blk_put(md); 269 mmc_blk_put(md);
@@ -642,7 +645,7 @@ static inline int mmc_blk_part_switch(struct mmc_card *card,
642 struct mmc_blk_data *md) 645 struct mmc_blk_data *md)
643{ 646{
644 int ret; 647 int ret;
645 struct mmc_blk_data *main_md = mmc_get_drvdata(card); 648 struct mmc_blk_data *main_md = dev_get_drvdata(&card->dev);
646 649
647 if (main_md->part_curr == md->part_type) 650 if (main_md->part_curr == md->part_type)
648 return 0; 651 return 0;
@@ -1004,7 +1007,8 @@ static int mmc_blk_reset(struct mmc_blk_data *md, struct mmc_host *host,
1004 err = mmc_hw_reset(host); 1007 err = mmc_hw_reset(host);
1005 /* Ensure we switch back to the correct partition */ 1008 /* Ensure we switch back to the correct partition */
1006 if (err != -EOPNOTSUPP) { 1009 if (err != -EOPNOTSUPP) {
1007 struct mmc_blk_data *main_md = mmc_get_drvdata(host->card); 1010 struct mmc_blk_data *main_md =
1011 dev_get_drvdata(&host->card->dev);
1008 int part_err; 1012 int part_err;
1009 1013
1010 main_md->part_curr = main_md->part_type; 1014 main_md->part_curr = main_md->part_type;
@@ -1308,19 +1312,11 @@ static int mmc_blk_packed_err_check(struct mmc_card *card,
1308 } 1312 }
1309 1313
1310 if (status & R1_EXCEPTION_EVENT) { 1314 if (status & R1_EXCEPTION_EVENT) {
1311 ext_csd = kzalloc(512, GFP_KERNEL); 1315 err = mmc_get_ext_csd(card, &ext_csd);
1312 if (!ext_csd) {
1313 pr_err("%s: unable to allocate buffer for ext_csd\n",
1314 req->rq_disk->disk_name);
1315 return -ENOMEM;
1316 }
1317
1318 err = mmc_send_ext_csd(card, ext_csd);
1319 if (err) { 1316 if (err) {
1320 pr_err("%s: error %d sending ext_csd\n", 1317 pr_err("%s: error %d sending ext_csd\n",
1321 req->rq_disk->disk_name, err); 1318 req->rq_disk->disk_name, err);
1322 check = MMC_BLK_ABORT; 1319 return MMC_BLK_ABORT;
1323 goto free;
1324 } 1320 }
1325 1321
1326 if ((ext_csd[EXT_CSD_EXP_EVENTS_STATUS] & 1322 if ((ext_csd[EXT_CSD_EXP_EVENTS_STATUS] &
@@ -1338,7 +1334,6 @@ static int mmc_blk_packed_err_check(struct mmc_card *card,
1338 req->rq_disk->disk_name, packed->nr_entries, 1334 req->rq_disk->disk_name, packed->nr_entries,
1339 packed->blocks, packed->idx_failure); 1335 packed->blocks, packed->idx_failure);
1340 } 1336 }
1341free:
1342 kfree(ext_csd); 1337 kfree(ext_csd);
1343 } 1338 }
1344 1339
@@ -2093,7 +2088,7 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card,
2093 2088
2094 /* 2089 /*
2095 * !subname implies we are creating main mmc_blk_data that will be 2090 * !subname implies we are creating main mmc_blk_data that will be
2096 * associated with mmc_card with mmc_set_drvdata. Due to device 2091 * associated with mmc_card with dev_set_drvdata. Due to device
2097 * partitions, devidx will not coincide with a per-physical card 2092 * partitions, devidx will not coincide with a per-physical card
2098 * index anymore so we keep track of a name index. 2093 * index anymore so we keep track of a name index.
2099 */ 2094 */
@@ -2425,8 +2420,9 @@ static const struct mmc_fixup blk_fixups[] =
2425 END_FIXUP 2420 END_FIXUP
2426}; 2421};
2427 2422
2428static int mmc_blk_probe(struct mmc_card *card) 2423static int mmc_blk_probe(struct device *dev)
2429{ 2424{
2425 struct mmc_card *card = mmc_dev_to_card(dev);
2430 struct mmc_blk_data *md, *part_md; 2426 struct mmc_blk_data *md, *part_md;
2431 char cap_str[10]; 2427 char cap_str[10];
2432 2428
@@ -2451,7 +2447,7 @@ static int mmc_blk_probe(struct mmc_card *card)
2451 if (mmc_blk_alloc_parts(card, md)) 2447 if (mmc_blk_alloc_parts(card, md))
2452 goto out; 2448 goto out;
2453 2449
2454 mmc_set_drvdata(card, md); 2450 dev_set_drvdata(dev, md);
2455 2451
2456 if (mmc_add_disk(md)) 2452 if (mmc_add_disk(md))
2457 goto out; 2453 goto out;
@@ -2481,9 +2477,10 @@ static int mmc_blk_probe(struct mmc_card *card)
2481 return 0; 2477 return 0;
2482} 2478}
2483 2479
2484static void mmc_blk_remove(struct mmc_card *card) 2480static int mmc_blk_remove(struct device *dev)
2485{ 2481{
2486 struct mmc_blk_data *md = mmc_get_drvdata(card); 2482 struct mmc_card *card = mmc_dev_to_card(dev);
2483 struct mmc_blk_data *md = dev_get_drvdata(dev);
2487 2484
2488 mmc_blk_remove_parts(card, md); 2485 mmc_blk_remove_parts(card, md);
2489 pm_runtime_get_sync(&card->dev); 2486 pm_runtime_get_sync(&card->dev);
@@ -2494,13 +2491,15 @@ static void mmc_blk_remove(struct mmc_card *card)
2494 pm_runtime_disable(&card->dev); 2491 pm_runtime_disable(&card->dev);
2495 pm_runtime_put_noidle(&card->dev); 2492 pm_runtime_put_noidle(&card->dev);
2496 mmc_blk_remove_req(md); 2493 mmc_blk_remove_req(md);
2497 mmc_set_drvdata(card, NULL); 2494 dev_set_drvdata(dev, NULL);
2495
2496 return 0;
2498} 2497}
2499 2498
2500static int _mmc_blk_suspend(struct mmc_card *card) 2499static int _mmc_blk_suspend(struct device *dev)
2501{ 2500{
2502 struct mmc_blk_data *part_md; 2501 struct mmc_blk_data *part_md;
2503 struct mmc_blk_data *md = mmc_get_drvdata(card); 2502 struct mmc_blk_data *md = dev_get_drvdata(dev);
2504 2503
2505 if (md) { 2504 if (md) {
2506 mmc_queue_suspend(&md->queue); 2505 mmc_queue_suspend(&md->queue);
@@ -2511,21 +2510,21 @@ static int _mmc_blk_suspend(struct mmc_card *card)
2511 return 0; 2510 return 0;
2512} 2511}
2513 2512
2514static void mmc_blk_shutdown(struct mmc_card *card) 2513static void mmc_blk_shutdown(struct device *dev)
2515{ 2514{
2516 _mmc_blk_suspend(card); 2515 _mmc_blk_suspend(dev);
2517} 2516}
2518 2517
2519#ifdef CONFIG_PM 2518#ifdef CONFIG_PM_SLEEP
2520static int mmc_blk_suspend(struct mmc_card *card) 2519static int mmc_blk_suspend(struct device *dev)
2521{ 2520{
2522 return _mmc_blk_suspend(card); 2521 return _mmc_blk_suspend(dev);
2523} 2522}
2524 2523
2525static int mmc_blk_resume(struct mmc_card *card) 2524static int mmc_blk_resume(struct device *dev)
2526{ 2525{
2527 struct mmc_blk_data *part_md; 2526 struct mmc_blk_data *part_md;
2528 struct mmc_blk_data *md = mmc_get_drvdata(card); 2527 struct mmc_blk_data *md = dev_get_drvdata(dev);
2529 2528
2530 if (md) { 2529 if (md) {
2531 /* 2530 /*
@@ -2540,19 +2539,15 @@ static int mmc_blk_resume(struct mmc_card *card)
2540 } 2539 }
2541 return 0; 2540 return 0;
2542} 2541}
2543#else
2544#define mmc_blk_suspend NULL
2545#define mmc_blk_resume NULL
2546#endif 2542#endif
2547 2543
2548static struct mmc_driver mmc_driver = { 2544static SIMPLE_DEV_PM_OPS(mmc_blk_pm_ops, mmc_blk_suspend, mmc_blk_resume);
2549 .drv = { 2545
2550 .name = "mmcblk", 2546static struct device_driver mmc_driver = {
2551 }, 2547 .name = "mmcblk",
2548 .pm = &mmc_blk_pm_ops,
2552 .probe = mmc_blk_probe, 2549 .probe = mmc_blk_probe,
2553 .remove = mmc_blk_remove, 2550 .remove = mmc_blk_remove,
2554 .suspend = mmc_blk_suspend,
2555 .resume = mmc_blk_resume,
2556 .shutdown = mmc_blk_shutdown, 2551 .shutdown = mmc_blk_shutdown,
2557}; 2552};
2558 2553
@@ -2563,7 +2558,7 @@ static int __init mmc_blk_init(void)
2563 if (perdev_minors != CONFIG_MMC_BLOCK_MINORS) 2558 if (perdev_minors != CONFIG_MMC_BLOCK_MINORS)
2564 pr_info("mmcblk: using %d minors per device\n", perdev_minors); 2559 pr_info("mmcblk: using %d minors per device\n", perdev_minors);
2565 2560
2566 max_devices = 256 / perdev_minors; 2561 max_devices = min(MAX_DEVICES, (1 << MINORBITS) / perdev_minors);
2567 2562
2568 res = register_blkdev(MMC_BLOCK_MAJOR, "mmc"); 2563 res = register_blkdev(MMC_BLOCK_MAJOR, "mmc");
2569 if (res) 2564 if (res)
diff --git a/drivers/mmc/card/mmc_test.c b/drivers/mmc/card/mmc_test.c
index 0c0fc52d42c5..0a7430f94d29 100644
--- a/drivers/mmc/card/mmc_test.c
+++ b/drivers/mmc/card/mmc_test.c
@@ -14,6 +14,7 @@
14#include <linux/mmc/host.h> 14#include <linux/mmc/host.h>
15#include <linux/mmc/mmc.h> 15#include <linux/mmc/mmc.h>
16#include <linux/slab.h> 16#include <linux/slab.h>
17#include <linux/device.h>
17 18
18#include <linux/scatterlist.h> 19#include <linux/scatterlist.h>
19#include <linux/swap.h> /* For nr_free_buffer_pages() */ 20#include <linux/swap.h> /* For nr_free_buffer_pages() */
@@ -32,6 +33,8 @@
32#define BUFFER_ORDER 2 33#define BUFFER_ORDER 2
33#define BUFFER_SIZE (PAGE_SIZE << BUFFER_ORDER) 34#define BUFFER_SIZE (PAGE_SIZE << BUFFER_ORDER)
34 35
36#define TEST_ALIGN_END 8
37
35/* 38/*
36 * Limit the test area size to the maximum MMC HC erase group size. Note that 39 * Limit the test area size to the maximum MMC HC erase group size. Note that
37 * the maximum SD allocation unit size is just 4MiB. 40 * the maximum SD allocation unit size is just 4MiB.
@@ -1174,7 +1177,7 @@ static int mmc_test_align_write(struct mmc_test_card *test)
1174 int ret, i; 1177 int ret, i;
1175 struct scatterlist sg; 1178 struct scatterlist sg;
1176 1179
1177 for (i = 1;i < 4;i++) { 1180 for (i = 1; i < TEST_ALIGN_END; i++) {
1178 sg_init_one(&sg, test->buffer + i, 512); 1181 sg_init_one(&sg, test->buffer + i, 512);
1179 ret = mmc_test_transfer(test, &sg, 1, 0, 1, 512, 1); 1182 ret = mmc_test_transfer(test, &sg, 1, 0, 1, 512, 1);
1180 if (ret) 1183 if (ret)
@@ -1189,7 +1192,7 @@ static int mmc_test_align_read(struct mmc_test_card *test)
1189 int ret, i; 1192 int ret, i;
1190 struct scatterlist sg; 1193 struct scatterlist sg;
1191 1194
1192 for (i = 1;i < 4;i++) { 1195 for (i = 1; i < TEST_ALIGN_END; i++) {
1193 sg_init_one(&sg, test->buffer + i, 512); 1196 sg_init_one(&sg, test->buffer + i, 512);
1194 ret = mmc_test_transfer(test, &sg, 1, 0, 1, 512, 0); 1197 ret = mmc_test_transfer(test, &sg, 1, 0, 1, 512, 0);
1195 if (ret) 1198 if (ret)
@@ -1216,7 +1219,7 @@ static int mmc_test_align_multi_write(struct mmc_test_card *test)
1216 if (size < 1024) 1219 if (size < 1024)
1217 return RESULT_UNSUP_HOST; 1220 return RESULT_UNSUP_HOST;
1218 1221
1219 for (i = 1;i < 4;i++) { 1222 for (i = 1; i < TEST_ALIGN_END; i++) {
1220 sg_init_one(&sg, test->buffer + i, size); 1223 sg_init_one(&sg, test->buffer + i, size);
1221 ret = mmc_test_transfer(test, &sg, 1, 0, size/512, 512, 1); 1224 ret = mmc_test_transfer(test, &sg, 1, 0, size/512, 512, 1);
1222 if (ret) 1225 if (ret)
@@ -1243,7 +1246,7 @@ static int mmc_test_align_multi_read(struct mmc_test_card *test)
1243 if (size < 1024) 1246 if (size < 1024)
1244 return RESULT_UNSUP_HOST; 1247 return RESULT_UNSUP_HOST;
1245 1248
1246 for (i = 1;i < 4;i++) { 1249 for (i = 1; i < TEST_ALIGN_END; i++) {
1247 sg_init_one(&sg, test->buffer + i, size); 1250 sg_init_one(&sg, test->buffer + i, size);
1248 ret = mmc_test_transfer(test, &sg, 1, 0, size/512, 512, 0); 1251 ret = mmc_test_transfer(test, &sg, 1, 0, size/512, 512, 0);
1249 if (ret) 1252 if (ret)
@@ -2997,8 +3000,9 @@ err:
2997 return ret; 3000 return ret;
2998} 3001}
2999 3002
3000static int mmc_test_probe(struct mmc_card *card) 3003static int mmc_test_probe(struct device *dev)
3001{ 3004{
3005 struct mmc_card *card = mmc_dev_to_card(dev);
3002 int ret; 3006 int ret;
3003 3007
3004 if (!mmc_card_mmc(card) && !mmc_card_sd(card)) 3008 if (!mmc_card_mmc(card) && !mmc_card_sd(card))
@@ -3013,20 +3017,22 @@ static int mmc_test_probe(struct mmc_card *card)
3013 return 0; 3017 return 0;
3014} 3018}
3015 3019
3016static void mmc_test_remove(struct mmc_card *card) 3020static int mmc_test_remove(struct device *dev)
3017{ 3021{
3022 struct mmc_card *card = mmc_dev_to_card(dev);
3023
3018 mmc_test_free_result(card); 3024 mmc_test_free_result(card);
3019 mmc_test_free_dbgfs_file(card); 3025 mmc_test_free_dbgfs_file(card);
3026
3027 return 0;
3020} 3028}
3021 3029
3022static void mmc_test_shutdown(struct mmc_card *card) 3030static void mmc_test_shutdown(struct device *dev)
3023{ 3031{
3024} 3032}
3025 3033
3026static struct mmc_driver mmc_driver = { 3034static struct device_driver mmc_driver = {
3027 .drv = { 3035 .name = "mmc_test",
3028 .name = "mmc_test",
3029 },
3030 .probe = mmc_test_probe, 3036 .probe = mmc_test_probe,
3031 .remove = mmc_test_remove, 3037 .remove = mmc_test_remove,
3032 .shutdown = mmc_test_shutdown, 3038 .shutdown = mmc_test_shutdown,
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c
index cfa6110632c3..236d194c2883 100644
--- a/drivers/mmc/card/queue.c
+++ b/drivers/mmc/card/queue.c
@@ -232,13 +232,15 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card,
232 if (!mqrq_cur->bounce_buf) { 232 if (!mqrq_cur->bounce_buf) {
233 pr_warn("%s: unable to allocate bounce cur buffer\n", 233 pr_warn("%s: unable to allocate bounce cur buffer\n",
234 mmc_card_name(card)); 234 mmc_card_name(card));
235 } 235 } else {
236 mqrq_prev->bounce_buf = kmalloc(bouncesz, GFP_KERNEL); 236 mqrq_prev->bounce_buf =
237 if (!mqrq_prev->bounce_buf) { 237 kmalloc(bouncesz, GFP_KERNEL);
238 pr_warn("%s: unable to allocate bounce prev buffer\n", 238 if (!mqrq_prev->bounce_buf) {
239 mmc_card_name(card)); 239 pr_warn("%s: unable to allocate bounce prev buffer\n",
240 kfree(mqrq_cur->bounce_buf); 240 mmc_card_name(card));
241 mqrq_cur->bounce_buf = NULL; 241 kfree(mqrq_cur->bounce_buf);
242 mqrq_cur->bounce_buf = NULL;
243 }
242 } 244 }
243 } 245 }
244 246
diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
index 8a1f1240e058..5ca562ccfcf3 100644
--- a/drivers/mmc/core/bus.c
+++ b/drivers/mmc/core/bus.c
@@ -25,8 +25,6 @@
25#include "sdio_cis.h" 25#include "sdio_cis.h"
26#include "bus.h" 26#include "bus.h"
27 27
28#define to_mmc_driver(d) container_of(d, struct mmc_driver, drv)
29
30static ssize_t type_show(struct device *dev, 28static ssize_t type_show(struct device *dev,
31 struct device_attribute *attr, char *buf) 29 struct device_attribute *attr, char *buf)
32{ 30{
@@ -106,33 +104,14 @@ mmc_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
106 return retval; 104 return retval;
107} 105}
108 106
109static int mmc_bus_probe(struct device *dev)
110{
111 struct mmc_driver *drv = to_mmc_driver(dev->driver);
112 struct mmc_card *card = mmc_dev_to_card(dev);
113
114 return drv->probe(card);
115}
116
117static int mmc_bus_remove(struct device *dev)
118{
119 struct mmc_driver *drv = to_mmc_driver(dev->driver);
120 struct mmc_card *card = mmc_dev_to_card(dev);
121
122 drv->remove(card);
123
124 return 0;
125}
126
127static void mmc_bus_shutdown(struct device *dev) 107static void mmc_bus_shutdown(struct device *dev)
128{ 108{
129 struct mmc_driver *drv = to_mmc_driver(dev->driver);
130 struct mmc_card *card = mmc_dev_to_card(dev); 109 struct mmc_card *card = mmc_dev_to_card(dev);
131 struct mmc_host *host = card->host; 110 struct mmc_host *host = card->host;
132 int ret; 111 int ret;
133 112
134 if (dev->driver && drv->shutdown) 113 if (dev->driver && dev->driver->shutdown)
135 drv->shutdown(card); 114 dev->driver->shutdown(dev);
136 115
137 if (host->bus_ops->shutdown) { 116 if (host->bus_ops->shutdown) {
138 ret = host->bus_ops->shutdown(host); 117 ret = host->bus_ops->shutdown(host);
@@ -145,16 +124,13 @@ static void mmc_bus_shutdown(struct device *dev)
145#ifdef CONFIG_PM_SLEEP 124#ifdef CONFIG_PM_SLEEP
146static int mmc_bus_suspend(struct device *dev) 125static int mmc_bus_suspend(struct device *dev)
147{ 126{
148 struct mmc_driver *drv = to_mmc_driver(dev->driver);
149 struct mmc_card *card = mmc_dev_to_card(dev); 127 struct mmc_card *card = mmc_dev_to_card(dev);
150 struct mmc_host *host = card->host; 128 struct mmc_host *host = card->host;
151 int ret; 129 int ret;
152 130
153 if (dev->driver && drv->suspend) { 131 ret = pm_generic_suspend(dev);
154 ret = drv->suspend(card); 132 if (ret)
155 if (ret) 133 return ret;
156 return ret;
157 }
158 134
159 ret = host->bus_ops->suspend(host); 135 ret = host->bus_ops->suspend(host);
160 return ret; 136 return ret;
@@ -162,7 +138,6 @@ static int mmc_bus_suspend(struct device *dev)
162 138
163static int mmc_bus_resume(struct device *dev) 139static int mmc_bus_resume(struct device *dev)
164{ 140{
165 struct mmc_driver *drv = to_mmc_driver(dev->driver);
166 struct mmc_card *card = mmc_dev_to_card(dev); 141 struct mmc_card *card = mmc_dev_to_card(dev);
167 struct mmc_host *host = card->host; 142 struct mmc_host *host = card->host;
168 int ret; 143 int ret;
@@ -172,9 +147,7 @@ static int mmc_bus_resume(struct device *dev)
172 pr_warn("%s: error %d during resume (card was removed?)\n", 147 pr_warn("%s: error %d during resume (card was removed?)\n",
173 mmc_hostname(host), ret); 148 mmc_hostname(host), ret);
174 149
175 if (dev->driver && drv->resume) 150 ret = pm_generic_resume(dev);
176 ret = drv->resume(card);
177
178 return ret; 151 return ret;
179} 152}
180#endif 153#endif
@@ -207,8 +180,6 @@ static struct bus_type mmc_bus_type = {
207 .dev_groups = mmc_dev_groups, 180 .dev_groups = mmc_dev_groups,
208 .match = mmc_bus_match, 181 .match = mmc_bus_match,
209 .uevent = mmc_bus_uevent, 182 .uevent = mmc_bus_uevent,
210 .probe = mmc_bus_probe,
211 .remove = mmc_bus_remove,
212 .shutdown = mmc_bus_shutdown, 183 .shutdown = mmc_bus_shutdown,
213 .pm = &mmc_bus_pm_ops, 184 .pm = &mmc_bus_pm_ops,
214}; 185};
@@ -227,24 +198,22 @@ void mmc_unregister_bus(void)
227 * mmc_register_driver - register a media driver 198 * mmc_register_driver - register a media driver
228 * @drv: MMC media driver 199 * @drv: MMC media driver
229 */ 200 */
230int mmc_register_driver(struct mmc_driver *drv) 201int mmc_register_driver(struct device_driver *drv)
231{ 202{
232 drv->drv.bus = &mmc_bus_type; 203 drv->bus = &mmc_bus_type;
233 return driver_register(&drv->drv); 204 return driver_register(drv);
234} 205}
235
236EXPORT_SYMBOL(mmc_register_driver); 206EXPORT_SYMBOL(mmc_register_driver);
237 207
238/** 208/**
239 * mmc_unregister_driver - unregister a media driver 209 * mmc_unregister_driver - unregister a media driver
240 * @drv: MMC media driver 210 * @drv: MMC media driver
241 */ 211 */
242void mmc_unregister_driver(struct mmc_driver *drv) 212void mmc_unregister_driver(struct device_driver *drv)
243{ 213{
244 drv->drv.bus = &mmc_bus_type; 214 drv->bus = &mmc_bus_type;
245 driver_unregister(&drv->drv); 215 driver_unregister(drv);
246} 216}
247
248EXPORT_SYMBOL(mmc_unregister_driver); 217EXPORT_SYMBOL(mmc_unregister_driver);
249 218
250static void mmc_release_card(struct device *dev) 219static void mmc_release_card(struct device *dev)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index f26a5f1d926d..9584bffa8b22 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -149,6 +149,14 @@ void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq)
149 149
150 led_trigger_event(host->led, LED_OFF); 150 led_trigger_event(host->led, LED_OFF);
151 151
152 if (mrq->sbc) {
153 pr_debug("%s: req done <CMD%u>: %d: %08x %08x %08x %08x\n",
154 mmc_hostname(host), mrq->sbc->opcode,
155 mrq->sbc->error,
156 mrq->sbc->resp[0], mrq->sbc->resp[1],
157 mrq->sbc->resp[2], mrq->sbc->resp[3]);
158 }
159
152 pr_debug("%s: req done (CMD%u): %d: %08x %08x %08x %08x\n", 160 pr_debug("%s: req done (CMD%u): %d: %08x %08x %08x %08x\n",
153 mmc_hostname(host), cmd->opcode, err, 161 mmc_hostname(host), cmd->opcode, err,
154 cmd->resp[0], cmd->resp[1], 162 cmd->resp[0], cmd->resp[1],
@@ -214,6 +222,10 @@ mmc_start_request(struct mmc_host *host, struct mmc_request *mrq)
214 222
215 mrq->cmd->error = 0; 223 mrq->cmd->error = 0;
216 mrq->cmd->mrq = mrq; 224 mrq->cmd->mrq = mrq;
225 if (mrq->sbc) {
226 mrq->sbc->error = 0;
227 mrq->sbc->mrq = mrq;
228 }
217 if (mrq->data) { 229 if (mrq->data) {
218 BUG_ON(mrq->data->blksz > host->max_blk_size); 230 BUG_ON(mrq->data->blksz > host->max_blk_size);
219 BUG_ON(mrq->data->blocks > host->max_blk_count); 231 BUG_ON(mrq->data->blocks > host->max_blk_count);
@@ -538,8 +550,18 @@ struct mmc_async_req *mmc_start_req(struct mmc_host *host,
538 if (host->card && mmc_card_mmc(host->card) && 550 if (host->card && mmc_card_mmc(host->card) &&
539 ((mmc_resp_type(host->areq->mrq->cmd) == MMC_RSP_R1) || 551 ((mmc_resp_type(host->areq->mrq->cmd) == MMC_RSP_R1) ||
540 (mmc_resp_type(host->areq->mrq->cmd) == MMC_RSP_R1B)) && 552 (mmc_resp_type(host->areq->mrq->cmd) == MMC_RSP_R1B)) &&
541 (host->areq->mrq->cmd->resp[0] & R1_EXCEPTION_EVENT)) 553 (host->areq->mrq->cmd->resp[0] & R1_EXCEPTION_EVENT)) {
554
555 /* Cancel the prepared request */
556 if (areq)
557 mmc_post_req(host, areq->mrq, -EINVAL);
558
542 mmc_start_bkops(host->card, true); 559 mmc_start_bkops(host->card, true);
560
561 /* prepare the request again */
562 if (areq)
563 mmc_pre_req(host, areq->mrq, !host->areq);
564 }
543 } 565 }
544 566
545 if (!err && areq) 567 if (!err && areq)
@@ -709,27 +731,16 @@ int mmc_read_bkops_status(struct mmc_card *card)
709 int err; 731 int err;
710 u8 *ext_csd; 732 u8 *ext_csd;
711 733
712 /*
713 * In future work, we should consider storing the entire ext_csd.
714 */
715 ext_csd = kmalloc(512, GFP_KERNEL);
716 if (!ext_csd) {
717 pr_err("%s: could not allocate buffer to receive the ext_csd.\n",
718 mmc_hostname(card->host));
719 return -ENOMEM;
720 }
721
722 mmc_claim_host(card->host); 734 mmc_claim_host(card->host);
723 err = mmc_send_ext_csd(card, ext_csd); 735 err = mmc_get_ext_csd(card, &ext_csd);
724 mmc_release_host(card->host); 736 mmc_release_host(card->host);
725 if (err) 737 if (err)
726 goto out; 738 return err;
727 739
728 card->ext_csd.raw_bkops_status = ext_csd[EXT_CSD_BKOPS_STATUS]; 740 card->ext_csd.raw_bkops_status = ext_csd[EXT_CSD_BKOPS_STATUS];
729 card->ext_csd.raw_exception_status = ext_csd[EXT_CSD_EXP_EVENTS_STATUS]; 741 card->ext_csd.raw_exception_status = ext_csd[EXT_CSD_EXP_EVENTS_STATUS];
730out:
731 kfree(ext_csd); 742 kfree(ext_csd);
732 return err; 743 return 0;
733} 744}
734EXPORT_SYMBOL(mmc_read_bkops_status); 745EXPORT_SYMBOL(mmc_read_bkops_status);
735 746
@@ -1088,6 +1099,22 @@ void mmc_set_bus_width(struct mmc_host *host, unsigned int width)
1088 mmc_host_clk_release(host); 1099 mmc_host_clk_release(host);
1089} 1100}
1090 1101
1102/*
1103 * Set initial state after a power cycle or a hw_reset.
1104 */
1105void mmc_set_initial_state(struct mmc_host *host)
1106{
1107 if (mmc_host_is_spi(host))
1108 host->ios.chip_select = MMC_CS_HIGH;
1109 else
1110 host->ios.chip_select = MMC_CS_DONTCARE;
1111 host->ios.bus_mode = MMC_BUSMODE_PUSHPULL;
1112 host->ios.bus_width = MMC_BUS_WIDTH_1;
1113 host->ios.timing = MMC_TIMING_LEGACY;
1114
1115 mmc_set_ios(host);
1116}
1117
1091/** 1118/**
1092 * mmc_vdd_to_ocrbitnum - Convert a voltage to the OCR bit number 1119 * mmc_vdd_to_ocrbitnum - Convert a voltage to the OCR bit number
1093 * @vdd: voltage (mV) 1120 * @vdd: voltage (mV)
@@ -1420,18 +1447,20 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr)
1420 pr_warn("%s: cannot verify signal voltage switch\n", 1447 pr_warn("%s: cannot verify signal voltage switch\n",
1421 mmc_hostname(host)); 1448 mmc_hostname(host));
1422 1449
1450 mmc_host_clk_hold(host);
1451
1423 cmd.opcode = SD_SWITCH_VOLTAGE; 1452 cmd.opcode = SD_SWITCH_VOLTAGE;
1424 cmd.arg = 0; 1453 cmd.arg = 0;
1425 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1454 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1426 1455
1427 err = mmc_wait_for_cmd(host, &cmd, 0); 1456 err = mmc_wait_for_cmd(host, &cmd, 0);
1428 if (err) 1457 if (err)
1429 return err; 1458 goto err_command;
1430 1459
1431 if (!mmc_host_is_spi(host) && (cmd.resp[0] & R1_ERROR)) 1460 if (!mmc_host_is_spi(host) && (cmd.resp[0] & R1_ERROR)) {
1432 return -EIO; 1461 err = -EIO;
1433 1462 goto err_command;
1434 mmc_host_clk_hold(host); 1463 }
1435 /* 1464 /*
1436 * The card should drive cmd and dat[0:3] low immediately 1465 * The card should drive cmd and dat[0:3] low immediately
1437 * after the response of cmd11, but wait 1 ms to be sure 1466 * after the response of cmd11, but wait 1 ms to be sure
@@ -1480,6 +1509,7 @@ power_cycle:
1480 mmc_power_cycle(host, ocr); 1509 mmc_power_cycle(host, ocr);
1481 } 1510 }
1482 1511
1512err_command:
1483 mmc_host_clk_release(host); 1513 mmc_host_clk_release(host);
1484 1514
1485 return err; 1515 return err;
@@ -1526,15 +1556,9 @@ void mmc_power_up(struct mmc_host *host, u32 ocr)
1526 mmc_host_clk_hold(host); 1556 mmc_host_clk_hold(host);
1527 1557
1528 host->ios.vdd = fls(ocr) - 1; 1558 host->ios.vdd = fls(ocr) - 1;
1529 if (mmc_host_is_spi(host))
1530 host->ios.chip_select = MMC_CS_HIGH;
1531 else
1532 host->ios.chip_select = MMC_CS_DONTCARE;
1533 host->ios.bus_mode = MMC_BUSMODE_PUSHPULL;
1534 host->ios.power_mode = MMC_POWER_UP; 1559 host->ios.power_mode = MMC_POWER_UP;
1535 host->ios.bus_width = MMC_BUS_WIDTH_1; 1560 /* Set initial state and call mmc_set_ios */
1536 host->ios.timing = MMC_TIMING_LEGACY; 1561 mmc_set_initial_state(host);
1537 mmc_set_ios(host);
1538 1562
1539 /* Try to set signal voltage to 3.3V but fall back to 1.8v or 1.2v */ 1563 /* Try to set signal voltage to 3.3V but fall back to 1.8v or 1.2v */
1540 if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330) == 0) 1564 if (__mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330) == 0)
@@ -1574,14 +1598,9 @@ void mmc_power_off(struct mmc_host *host)
1574 host->ios.clock = 0; 1598 host->ios.clock = 0;
1575 host->ios.vdd = 0; 1599 host->ios.vdd = 0;
1576 1600
1577 if (!mmc_host_is_spi(host)) {
1578 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
1579 host->ios.chip_select = MMC_CS_DONTCARE;
1580 }
1581 host->ios.power_mode = MMC_POWER_OFF; 1601 host->ios.power_mode = MMC_POWER_OFF;
1582 host->ios.bus_width = MMC_BUS_WIDTH_1; 1602 /* Set initial state and call mmc_set_ios */
1583 host->ios.timing = MMC_TIMING_LEGACY; 1603 mmc_set_initial_state(host);
1584 mmc_set_ios(host);
1585 1604
1586 /* 1605 /*
1587 * Some configurations, such as the 802.11 SDIO card in the OLPC 1606 * Some configurations, such as the 802.11 SDIO card in the OLPC
@@ -2259,30 +2278,16 @@ static int mmc_do_hw_reset(struct mmc_host *host, int check)
2259 2278
2260 /* If the reset has happened, then a status command will fail */ 2279 /* If the reset has happened, then a status command will fail */
2261 if (check) { 2280 if (check) {
2262 struct mmc_command cmd = {0}; 2281 u32 status;
2263 int err;
2264 2282
2265 cmd.opcode = MMC_SEND_STATUS; 2283 if (!mmc_send_status(card, &status)) {
2266 if (!mmc_host_is_spi(card->host))
2267 cmd.arg = card->rca << 16;
2268 cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC;
2269 err = mmc_wait_for_cmd(card->host, &cmd, 0);
2270 if (!err) {
2271 mmc_host_clk_release(host); 2284 mmc_host_clk_release(host);
2272 return -ENOSYS; 2285 return -ENOSYS;
2273 } 2286 }
2274 } 2287 }
2275 2288
2276 if (mmc_host_is_spi(host)) { 2289 /* Set initial state and call mmc_set_ios */
2277 host->ios.chip_select = MMC_CS_HIGH; 2290 mmc_set_initial_state(host);
2278 host->ios.bus_mode = MMC_BUSMODE_PUSHPULL;
2279 } else {
2280 host->ios.chip_select = MMC_CS_DONTCARE;
2281 host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
2282 }
2283 host->ios.bus_width = MMC_BUS_WIDTH_1;
2284 host->ios.timing = MMC_TIMING_LEGACY;
2285 mmc_set_ios(host);
2286 2291
2287 mmc_host_clk_release(host); 2292 mmc_host_clk_release(host);
2288 2293
diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h
index 443a584660f0..d76597c65e3a 100644
--- a/drivers/mmc/core/core.h
+++ b/drivers/mmc/core/core.h
@@ -49,6 +49,7 @@ void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type);
49void mmc_power_up(struct mmc_host *host, u32 ocr); 49void mmc_power_up(struct mmc_host *host, u32 ocr);
50void mmc_power_off(struct mmc_host *host); 50void mmc_power_off(struct mmc_host *host);
51void mmc_power_cycle(struct mmc_host *host, u32 ocr); 51void mmc_power_cycle(struct mmc_host *host, u32 ocr);
52void mmc_set_initial_state(struct mmc_host *host);
52 53
53static inline void mmc_delay(unsigned int ms) 54static inline void mmc_delay(unsigned int ms)
54{ 55{
diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index 91eb16223246..e9142108a6c6 100644
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -291,14 +291,8 @@ static int mmc_ext_csd_open(struct inode *inode, struct file *filp)
291 if (!buf) 291 if (!buf)
292 return -ENOMEM; 292 return -ENOMEM;
293 293
294 ext_csd = kmalloc(512, GFP_KERNEL);
295 if (!ext_csd) {
296 err = -ENOMEM;
297 goto out_free;
298 }
299
300 mmc_get_card(card); 294 mmc_get_card(card);
301 err = mmc_send_ext_csd(card, ext_csd); 295 err = mmc_get_ext_csd(card, &ext_csd);
302 mmc_put_card(card); 296 mmc_put_card(card);
303 if (err) 297 if (err)
304 goto out_free; 298 goto out_free;
@@ -314,7 +308,6 @@ static int mmc_ext_csd_open(struct inode *inode, struct file *filp)
314 308
315out_free: 309out_free:
316 kfree(buf); 310 kfree(buf);
317 kfree(ext_csd);
318 return err; 311 return err;
319} 312}
320 313
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index a301a78a2bd1..02ad79229f65 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -177,65 +177,6 @@ static int mmc_decode_csd(struct mmc_card *card)
177 return 0; 177 return 0;
178} 178}
179 179
180/*
181 * Read extended CSD.
182 */
183static int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd)
184{
185 int err;
186 u8 *ext_csd;
187
188 BUG_ON(!card);
189 BUG_ON(!new_ext_csd);
190
191 *new_ext_csd = NULL;
192
193 if (card->csd.mmca_vsn < CSD_SPEC_VER_4)
194 return 0;
195
196 /*
197 * As the ext_csd is so large and mostly unused, we don't store the
198 * raw block in mmc_card.
199 */
200 ext_csd = kmalloc(512, GFP_KERNEL);
201 if (!ext_csd) {
202 pr_err("%s: could not allocate a buffer to "
203 "receive the ext_csd.\n", mmc_hostname(card->host));
204 return -ENOMEM;
205 }
206
207 err = mmc_send_ext_csd(card, ext_csd);
208 if (err) {
209 kfree(ext_csd);
210 *new_ext_csd = NULL;
211
212 /* If the host or the card can't do the switch,
213 * fail more gracefully. */
214 if ((err != -EINVAL)
215 && (err != -ENOSYS)
216 && (err != -EFAULT))
217 return err;
218
219 /*
220 * High capacity cards should have this "magic" size
221 * stored in their CSD.
222 */
223 if (card->csd.capacity == (4096 * 512)) {
224 pr_err("%s: unable to read EXT_CSD "
225 "on a possible high capacity card. "
226 "Card will be ignored.\n",
227 mmc_hostname(card->host));
228 } else {
229 pr_warn("%s: unable to read EXT_CSD, performance might suffer\n",
230 mmc_hostname(card->host));
231 err = 0;
232 }
233 } else
234 *new_ext_csd = ext_csd;
235
236 return err;
237}
238
239static void mmc_select_card_type(struct mmc_card *card) 180static void mmc_select_card_type(struct mmc_card *card)
240{ 181{
241 struct mmc_host *host = card->host; 182 struct mmc_host *host = card->host;
@@ -391,16 +332,11 @@ static void mmc_manage_gp_partitions(struct mmc_card *card, u8 *ext_csd)
391/* 332/*
392 * Decode extended CSD. 333 * Decode extended CSD.
393 */ 334 */
394static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd) 335static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd)
395{ 336{
396 int err = 0, idx; 337 int err = 0, idx;
397 unsigned int part_size; 338 unsigned int part_size;
398 339
399 BUG_ON(!card);
400
401 if (!ext_csd)
402 return 0;
403
404 /* Version is coded in the CSD_STRUCTURE byte in the EXT_CSD register */ 340 /* Version is coded in the CSD_STRUCTURE byte in the EXT_CSD register */
405 card->ext_csd.raw_ext_csd_structure = ext_csd[EXT_CSD_STRUCTURE]; 341 card->ext_csd.raw_ext_csd_structure = ext_csd[EXT_CSD_STRUCTURE];
406 if (card->csd.structure == 3) { 342 if (card->csd.structure == 3) {
@@ -628,16 +564,56 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd)
628 card->ext_csd.data_sector_size = 512; 564 card->ext_csd.data_sector_size = 512;
629 } 565 }
630 566
567 /* eMMC v5 or later */
568 if (card->ext_csd.rev >= 7) {
569 memcpy(card->ext_csd.fwrev, &ext_csd[EXT_CSD_FIRMWARE_VERSION],
570 MMC_FIRMWARE_LEN);
571 card->ext_csd.ffu_capable =
572 (ext_csd[EXT_CSD_SUPPORTED_MODE] & 0x1) &&
573 !(ext_csd[EXT_CSD_FW_CONFIG] & 0x1);
574 }
631out: 575out:
632 return err; 576 return err;
633} 577}
634 578
635static inline void mmc_free_ext_csd(u8 *ext_csd) 579static int mmc_read_ext_csd(struct mmc_card *card)
636{ 580{
581 u8 *ext_csd;
582 int err;
583
584 if (!mmc_can_ext_csd(card))
585 return 0;
586
587 err = mmc_get_ext_csd(card, &ext_csd);
588 if (err) {
589 /* If the host or the card can't do the switch,
590 * fail more gracefully. */
591 if ((err != -EINVAL)
592 && (err != -ENOSYS)
593 && (err != -EFAULT))
594 return err;
595
596 /*
597 * High capacity cards should have this "magic" size
598 * stored in their CSD.
599 */
600 if (card->csd.capacity == (4096 * 512)) {
601 pr_err("%s: unable to read EXT_CSD on a possible high capacity card. Card will be ignored.\n",
602 mmc_hostname(card->host));
603 } else {
604 pr_warn("%s: unable to read EXT_CSD, performance might suffer\n",
605 mmc_hostname(card->host));
606 err = 0;
607 }
608
609 return err;
610 }
611
612 err = mmc_decode_ext_csd(card, ext_csd);
637 kfree(ext_csd); 613 kfree(ext_csd);
614 return err;
638} 615}
639 616
640
641static int mmc_compare_ext_csds(struct mmc_card *card, unsigned bus_width) 617static int mmc_compare_ext_csds(struct mmc_card *card, unsigned bus_width)
642{ 618{
643 u8 *bw_ext_csd; 619 u8 *bw_ext_csd;
@@ -647,11 +623,8 @@ static int mmc_compare_ext_csds(struct mmc_card *card, unsigned bus_width)
647 return 0; 623 return 0;
648 624
649 err = mmc_get_ext_csd(card, &bw_ext_csd); 625 err = mmc_get_ext_csd(card, &bw_ext_csd);
650 626 if (err)
651 if (err || bw_ext_csd == NULL) { 627 return err;
652 err = -EINVAL;
653 goto out;
654 }
655 628
656 /* only compare read only fields */ 629 /* only compare read only fields */
657 err = !((card->ext_csd.raw_partition_support == 630 err = !((card->ext_csd.raw_partition_support ==
@@ -710,8 +683,7 @@ static int mmc_compare_ext_csds(struct mmc_card *card, unsigned bus_width)
710 if (err) 683 if (err)
711 err = -EINVAL; 684 err = -EINVAL;
712 685
713out: 686 kfree(bw_ext_csd);
714 mmc_free_ext_csd(bw_ext_csd);
715 return err; 687 return err;
716} 688}
717 689
@@ -722,7 +694,7 @@ MMC_DEV_ATTR(csd, "%08x%08x%08x%08x\n", card->raw_csd[0], card->raw_csd[1],
722MMC_DEV_ATTR(date, "%02d/%04d\n", card->cid.month, card->cid.year); 694MMC_DEV_ATTR(date, "%02d/%04d\n", card->cid.month, card->cid.year);
723MMC_DEV_ATTR(erase_size, "%u\n", card->erase_size << 9); 695MMC_DEV_ATTR(erase_size, "%u\n", card->erase_size << 9);
724MMC_DEV_ATTR(preferred_erase_size, "%u\n", card->pref_erase << 9); 696MMC_DEV_ATTR(preferred_erase_size, "%u\n", card->pref_erase << 9);
725MMC_DEV_ATTR(fwrev, "0x%x\n", card->cid.fwrev); 697MMC_DEV_ATTR(ffu_capable, "%d\n", card->ext_csd.ffu_capable);
726MMC_DEV_ATTR(hwrev, "0x%x\n", card->cid.hwrev); 698MMC_DEV_ATTR(hwrev, "0x%x\n", card->cid.hwrev);
727MMC_DEV_ATTR(manfid, "0x%06x\n", card->cid.manfid); 699MMC_DEV_ATTR(manfid, "0x%06x\n", card->cid.manfid);
728MMC_DEV_ATTR(name, "%s\n", card->cid.prod_name); 700MMC_DEV_ATTR(name, "%s\n", card->cid.prod_name);
@@ -735,6 +707,22 @@ MMC_DEV_ATTR(enhanced_area_size, "%u\n", card->ext_csd.enhanced_area_size);
735MMC_DEV_ATTR(raw_rpmb_size_mult, "%#x\n", card->ext_csd.raw_rpmb_size_mult); 707MMC_DEV_ATTR(raw_rpmb_size_mult, "%#x\n", card->ext_csd.raw_rpmb_size_mult);
736MMC_DEV_ATTR(rel_sectors, "%#x\n", card->ext_csd.rel_sectors); 708MMC_DEV_ATTR(rel_sectors, "%#x\n", card->ext_csd.rel_sectors);
737 709
710static ssize_t mmc_fwrev_show(struct device *dev,
711 struct device_attribute *attr,
712 char *buf)
713{
714 struct mmc_card *card = mmc_dev_to_card(dev);
715
716 if (card->ext_csd.rev < 7) {
717 return sprintf(buf, "0x%x\n", card->cid.fwrev);
718 } else {
719 return sprintf(buf, "0x%*phN\n", MMC_FIRMWARE_LEN,
720 card->ext_csd.fwrev);
721 }
722}
723
724static DEVICE_ATTR(fwrev, S_IRUGO, mmc_fwrev_show, NULL);
725
738static struct attribute *mmc_std_attrs[] = { 726static struct attribute *mmc_std_attrs[] = {
739 &dev_attr_cid.attr, 727 &dev_attr_cid.attr,
740 &dev_attr_csd.attr, 728 &dev_attr_csd.attr,
@@ -742,6 +730,7 @@ static struct attribute *mmc_std_attrs[] = {
742 &dev_attr_erase_size.attr, 730 &dev_attr_erase_size.attr,
743 &dev_attr_preferred_erase_size.attr, 731 &dev_attr_preferred_erase_size.attr,
744 &dev_attr_fwrev.attr, 732 &dev_attr_fwrev.attr,
733 &dev_attr_ffu_capable.attr,
745 &dev_attr_hwrev.attr, 734 &dev_attr_hwrev.attr,
746 &dev_attr_manfid.attr, 735 &dev_attr_manfid.attr,
747 &dev_attr_name.attr, 736 &dev_attr_name.attr,
@@ -774,14 +763,6 @@ static int __mmc_select_powerclass(struct mmc_card *card,
774 unsigned int pwrclass_val = 0; 763 unsigned int pwrclass_val = 0;
775 int err = 0; 764 int err = 0;
776 765
777 /* Power class selection is supported for versions >= 4.0 */
778 if (card->csd.mmca_vsn < CSD_SPEC_VER_4)
779 return 0;
780
781 /* Power class values are defined only for 4/8 bit bus */
782 if (bus_width == EXT_CSD_BUS_WIDTH_1)
783 return 0;
784
785 switch (1 << host->ios.vdd) { 766 switch (1 << host->ios.vdd) {
786 case MMC_VDD_165_195: 767 case MMC_VDD_165_195:
787 if (host->ios.clock <= MMC_HIGH_26_MAX_DTR) 768 if (host->ios.clock <= MMC_HIGH_26_MAX_DTR)
@@ -844,7 +825,7 @@ static int mmc_select_powerclass(struct mmc_card *card)
844 int err, ddr; 825 int err, ddr;
845 826
846 /* Power class selection is supported for versions >= 4.0 */ 827 /* Power class selection is supported for versions >= 4.0 */
847 if (card->csd.mmca_vsn < CSD_SPEC_VER_4) 828 if (!mmc_can_ext_csd(card))
848 return 0; 829 return 0;
849 830
850 bus_width = host->ios.bus_width; 831 bus_width = host->ios.bus_width;
@@ -905,7 +886,7 @@ static int mmc_select_bus_width(struct mmc_card *card)
905 unsigned idx, bus_width = 0; 886 unsigned idx, bus_width = 0;
906 int err = 0; 887 int err = 0;
907 888
908 if ((card->csd.mmca_vsn < CSD_SPEC_VER_4) && 889 if (!mmc_can_ext_csd(card) &&
909 !(host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) 890 !(host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)))
910 return 0; 891 return 0;
911 892
@@ -998,7 +979,7 @@ static int mmc_select_hs_ddr(struct mmc_card *card)
998 ext_csd_bits, 979 ext_csd_bits,
999 card->ext_csd.generic_cmd6_time); 980 card->ext_csd.generic_cmd6_time);
1000 if (err) { 981 if (err) {
1001 pr_warn("%s: switch to bus width %d ddr failed\n", 982 pr_err("%s: switch to bus width %d ddr failed\n",
1002 mmc_hostname(host), 1 << bus_width); 983 mmc_hostname(host), 1 << bus_width);
1003 return err; 984 return err;
1004 } 985 }
@@ -1069,7 +1050,7 @@ static int mmc_select_hs400(struct mmc_card *card)
1069 card->ext_csd.generic_cmd6_time, 1050 card->ext_csd.generic_cmd6_time,
1070 true, true, true); 1051 true, true, true);
1071 if (err) { 1052 if (err) {
1072 pr_warn("%s: switch to high-speed from hs200 failed, err:%d\n", 1053 pr_err("%s: switch to high-speed from hs200 failed, err:%d\n",
1073 mmc_hostname(host), err); 1054 mmc_hostname(host), err);
1074 return err; 1055 return err;
1075 } 1056 }
@@ -1079,7 +1060,7 @@ static int mmc_select_hs400(struct mmc_card *card)
1079 EXT_CSD_DDR_BUS_WIDTH_8, 1060 EXT_CSD_DDR_BUS_WIDTH_8,
1080 card->ext_csd.generic_cmd6_time); 1061 card->ext_csd.generic_cmd6_time);
1081 if (err) { 1062 if (err) {
1082 pr_warn("%s: switch to bus width for hs400 failed, err:%d\n", 1063 pr_err("%s: switch to bus width for hs400 failed, err:%d\n",
1083 mmc_hostname(host), err); 1064 mmc_hostname(host), err);
1084 return err; 1065 return err;
1085 } 1066 }
@@ -1089,7 +1070,7 @@ static int mmc_select_hs400(struct mmc_card *card)
1089 card->ext_csd.generic_cmd6_time, 1070 card->ext_csd.generic_cmd6_time,
1090 true, true, true); 1071 true, true, true);
1091 if (err) { 1072 if (err) {
1092 pr_warn("%s: switch to hs400 failed, err:%d\n", 1073 pr_err("%s: switch to hs400 failed, err:%d\n",
1093 mmc_hostname(host), err); 1074 mmc_hostname(host), err);
1094 return err; 1075 return err;
1095 } 1076 }
@@ -1146,8 +1127,7 @@ static int mmc_select_timing(struct mmc_card *card)
1146{ 1127{
1147 int err = 0; 1128 int err = 0;
1148 1129
1149 if ((card->csd.mmca_vsn < CSD_SPEC_VER_4 && 1130 if (!mmc_can_ext_csd(card))
1150 card->ext_csd.hs_max_dtr == 0))
1151 goto bus_speed; 1131 goto bus_speed;
1152 1132
1153 if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200) 1133 if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_HS200)
@@ -1232,7 +1212,7 @@ static int mmc_hs200_tuning(struct mmc_card *card)
1232 mmc_host_clk_release(host); 1212 mmc_host_clk_release(host);
1233 1213
1234 if (err) 1214 if (err)
1235 pr_warn("%s: tuning execution failed\n", 1215 pr_err("%s: tuning execution failed\n",
1236 mmc_hostname(host)); 1216 mmc_hostname(host));
1237 } 1217 }
1238 1218
@@ -1252,7 +1232,6 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
1252 int err; 1232 int err;
1253 u32 cid[4]; 1233 u32 cid[4];
1254 u32 rocr; 1234 u32 rocr;
1255 u8 *ext_csd = NULL;
1256 1235
1257 BUG_ON(!host); 1236 BUG_ON(!host);
1258 WARN_ON(!host->claimed); 1237 WARN_ON(!host->claimed);
@@ -1361,14 +1340,8 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
1361 } 1340 }
1362 1341
1363 if (!oldcard) { 1342 if (!oldcard) {
1364 /* 1343 /* Read extended CSD. */
1365 * Fetch and process extended CSD. 1344 err = mmc_read_ext_csd(card);
1366 */
1367
1368 err = mmc_get_ext_csd(card, &ext_csd);
1369 if (err)
1370 goto free_card;
1371 err = mmc_read_ext_csd(card, ext_csd);
1372 if (err) 1345 if (err)
1373 goto free_card; 1346 goto free_card;
1374 1347
@@ -1458,18 +1431,18 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
1458 if (mmc_card_hs200(card)) { 1431 if (mmc_card_hs200(card)) {
1459 err = mmc_hs200_tuning(card); 1432 err = mmc_hs200_tuning(card);
1460 if (err) 1433 if (err)
1461 goto err; 1434 goto free_card;
1462 1435
1463 err = mmc_select_hs400(card); 1436 err = mmc_select_hs400(card);
1464 if (err) 1437 if (err)
1465 goto err; 1438 goto free_card;
1466 } else if (mmc_card_hs(card)) { 1439 } else if (mmc_card_hs(card)) {
1467 /* Select the desired bus width optionally */ 1440 /* Select the desired bus width optionally */
1468 err = mmc_select_bus_width(card); 1441 err = mmc_select_bus_width(card);
1469 if (!IS_ERR_VALUE(err)) { 1442 if (!IS_ERR_VALUE(err)) {
1470 err = mmc_select_hs_ddr(card); 1443 err = mmc_select_hs_ddr(card);
1471 if (err) 1444 if (err)
1472 goto err; 1445 goto free_card;
1473 } 1446 }
1474 } 1447 }
1475 1448
@@ -1545,15 +1518,12 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
1545 if (!oldcard) 1518 if (!oldcard)
1546 host->card = card; 1519 host->card = card;
1547 1520
1548 mmc_free_ext_csd(ext_csd);
1549 return 0; 1521 return 0;
1550 1522
1551free_card: 1523free_card:
1552 if (!oldcard) 1524 if (!oldcard)
1553 mmc_remove_card(card); 1525 mmc_remove_card(card);
1554err: 1526err:
1555 mmc_free_ext_csd(ext_csd);
1556
1557 return err; 1527 return err;
1558} 1528}
1559 1529
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c
index 7911e0510a1d..3b044c5b029c 100644
--- a/drivers/mmc/core/mmc_ops.c
+++ b/drivers/mmc/core/mmc_ops.c
@@ -264,20 +264,6 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host,
264 struct mmc_command cmd = {0}; 264 struct mmc_command cmd = {0};
265 struct mmc_data data = {0}; 265 struct mmc_data data = {0};
266 struct scatterlist sg; 266 struct scatterlist sg;
267 void *data_buf;
268 int is_on_stack;
269
270 is_on_stack = object_is_on_stack(buf);
271 if (is_on_stack) {
272 /*
273 * dma onto stack is unsafe/nonportable, but callers to this
274 * routine normally provide temporary on-stack buffers ...
275 */
276 data_buf = kmalloc(len, GFP_KERNEL);
277 if (!data_buf)
278 return -ENOMEM;
279 } else
280 data_buf = buf;
281 267
282 mrq.cmd = &cmd; 268 mrq.cmd = &cmd;
283 mrq.data = &data; 269 mrq.data = &data;
@@ -298,7 +284,7 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host,
298 data.sg = &sg; 284 data.sg = &sg;
299 data.sg_len = 1; 285 data.sg_len = 1;
300 286
301 sg_init_one(&sg, data_buf, len); 287 sg_init_one(&sg, buf, len);
302 288
303 if (opcode == MMC_SEND_CSD || opcode == MMC_SEND_CID) { 289 if (opcode == MMC_SEND_CSD || opcode == MMC_SEND_CID) {
304 /* 290 /*
@@ -312,11 +298,6 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host,
312 298
313 mmc_wait_for_req(host, &mrq); 299 mmc_wait_for_req(host, &mrq);
314 300
315 if (is_on_stack) {
316 memcpy(buf, data_buf, len);
317 kfree(data_buf);
318 }
319
320 if (cmd.error) 301 if (cmd.error)
321 return cmd.error; 302 return cmd.error;
322 if (data.error) 303 if (data.error)
@@ -334,7 +315,7 @@ int mmc_send_csd(struct mmc_card *card, u32 *csd)
334 return mmc_send_cxd_native(card->host, card->rca << 16, 315 return mmc_send_cxd_native(card->host, card->rca << 16,
335 csd, MMC_SEND_CSD); 316 csd, MMC_SEND_CSD);
336 317
337 csd_tmp = kmalloc(16, GFP_KERNEL); 318 csd_tmp = kzalloc(16, GFP_KERNEL);
338 if (!csd_tmp) 319 if (!csd_tmp)
339 return -ENOMEM; 320 return -ENOMEM;
340 321
@@ -362,7 +343,7 @@ int mmc_send_cid(struct mmc_host *host, u32 *cid)
362 cid, MMC_SEND_CID); 343 cid, MMC_SEND_CID);
363 } 344 }
364 345
365 cid_tmp = kmalloc(16, GFP_KERNEL); 346 cid_tmp = kzalloc(16, GFP_KERNEL);
366 if (!cid_tmp) 347 if (!cid_tmp)
367 return -ENOMEM; 348 return -ENOMEM;
368 349
@@ -378,12 +359,35 @@ err:
378 return ret; 359 return ret;
379} 360}
380 361
381int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd) 362int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd)
382{ 363{
383 return mmc_send_cxd_data(card, card->host, MMC_SEND_EXT_CSD, 364 int err;
384 ext_csd, 512); 365 u8 *ext_csd;
366
367 if (!card || !new_ext_csd)
368 return -EINVAL;
369
370 if (!mmc_can_ext_csd(card))
371 return -EOPNOTSUPP;
372
373 /*
374 * As the ext_csd is so large and mostly unused, we don't store the
375 * raw block in mmc_card.
376 */
377 ext_csd = kzalloc(512, GFP_KERNEL);
378 if (!ext_csd)
379 return -ENOMEM;
380
381 err = mmc_send_cxd_data(card, card->host, MMC_SEND_EXT_CSD, ext_csd,
382 512);
383 if (err)
384 kfree(ext_csd);
385 else
386 *new_ext_csd = ext_csd;
387
388 return err;
385} 389}
386EXPORT_SYMBOL_GPL(mmc_send_ext_csd); 390EXPORT_SYMBOL_GPL(mmc_get_ext_csd);
387 391
388int mmc_spi_read_ocr(struct mmc_host *host, int highcap, u32 *ocrp) 392int mmc_spi_read_ocr(struct mmc_host *host, int highcap, u32 *ocrp)
389{ 393{
@@ -543,6 +547,75 @@ int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
543} 547}
544EXPORT_SYMBOL_GPL(mmc_switch); 548EXPORT_SYMBOL_GPL(mmc_switch);
545 549
550int mmc_send_tuning(struct mmc_host *host)
551{
552 struct mmc_request mrq = {NULL};
553 struct mmc_command cmd = {0};
554 struct mmc_data data = {0};
555 struct scatterlist sg;
556 struct mmc_ios *ios = &host->ios;
557 const u8 *tuning_block_pattern;
558 int size, err = 0;
559 u8 *data_buf;
560 u32 opcode;
561
562 if (ios->bus_width == MMC_BUS_WIDTH_8) {
563 tuning_block_pattern = tuning_blk_pattern_8bit;
564 size = sizeof(tuning_blk_pattern_8bit);
565 opcode = MMC_SEND_TUNING_BLOCK_HS200;
566 } else if (ios->bus_width == MMC_BUS_WIDTH_4) {
567 tuning_block_pattern = tuning_blk_pattern_4bit;
568 size = sizeof(tuning_blk_pattern_4bit);
569 opcode = MMC_SEND_TUNING_BLOCK;
570 } else
571 return -EINVAL;
572
573 data_buf = kzalloc(size, GFP_KERNEL);
574 if (!data_buf)
575 return -ENOMEM;
576
577 mrq.cmd = &cmd;
578 mrq.data = &data;
579
580 cmd.opcode = opcode;
581 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
582
583 data.blksz = size;
584 data.blocks = 1;
585 data.flags = MMC_DATA_READ;
586
587 /*
588 * According to the tuning specs, Tuning process
589 * is normally shorter 40 executions of CMD19,
590 * and timeout value should be shorter than 150 ms
591 */
592 data.timeout_ns = 150 * NSEC_PER_MSEC;
593
594 data.sg = &sg;
595 data.sg_len = 1;
596 sg_init_one(&sg, data_buf, size);
597
598 mmc_wait_for_req(host, &mrq);
599
600 if (cmd.error) {
601 err = cmd.error;
602 goto out;
603 }
604
605 if (data.error) {
606 err = data.error;
607 goto out;
608 }
609
610 if (memcmp(data_buf, tuning_block_pattern, size))
611 err = -EIO;
612
613out:
614 kfree(data_buf);
615 return err;
616}
617EXPORT_SYMBOL_GPL(mmc_send_tuning);
618
546static int 619static int
547mmc_send_bus_test(struct mmc_card *card, struct mmc_host *host, u8 opcode, 620mmc_send_bus_test(struct mmc_card *card, struct mmc_host *host, u8 opcode,
548 u8 len) 621 u8 len)
@@ -675,3 +748,8 @@ int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status)
675 748
676 return 0; 749 return 0;
677} 750}
751
752int mmc_can_ext_csd(struct mmc_card *card)
753{
754 return (card && card->csd.mmca_vsn > CSD_SPEC_VER_3);
755}
diff --git a/drivers/mmc/core/mmc_ops.h b/drivers/mmc/core/mmc_ops.h
index 390dac665b2a..6f4b00ed93de 100644
--- a/drivers/mmc/core/mmc_ops.h
+++ b/drivers/mmc/core/mmc_ops.h
@@ -20,13 +20,13 @@ int mmc_send_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr);
20int mmc_all_send_cid(struct mmc_host *host, u32 *cid); 20int mmc_all_send_cid(struct mmc_host *host, u32 *cid);
21int mmc_set_relative_addr(struct mmc_card *card); 21int mmc_set_relative_addr(struct mmc_card *card);
22int mmc_send_csd(struct mmc_card *card, u32 *csd); 22int mmc_send_csd(struct mmc_card *card, u32 *csd);
23int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd);
24int mmc_send_status(struct mmc_card *card, u32 *status); 23int mmc_send_status(struct mmc_card *card, u32 *status);
25int mmc_send_cid(struct mmc_host *host, u32 *cid); 24int mmc_send_cid(struct mmc_host *host, u32 *cid);
26int mmc_spi_read_ocr(struct mmc_host *host, int highcap, u32 *ocrp); 25int mmc_spi_read_ocr(struct mmc_host *host, int highcap, u32 *ocrp);
27int mmc_spi_set_crc(struct mmc_host *host, int use_crc); 26int mmc_spi_set_crc(struct mmc_host *host, int use_crc);
28int mmc_bus_test(struct mmc_card *card, u8 bus_width); 27int mmc_bus_test(struct mmc_card *card, u8 bus_width);
29int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status); 28int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status);
29int mmc_can_ext_csd(struct mmc_card *card);
30 30
31#endif 31#endif
32 32
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c
index 2439e717655b..fd0750b5a634 100644
--- a/drivers/mmc/core/sdio.c
+++ b/drivers/mmc/core/sdio.c
@@ -980,8 +980,12 @@ static int mmc_sdio_resume(struct mmc_host *host)
980 if (mmc_card_is_removable(host) || !mmc_card_keep_power(host)) { 980 if (mmc_card_is_removable(host) || !mmc_card_keep_power(host)) {
981 sdio_reset(host); 981 sdio_reset(host);
982 mmc_go_idle(host); 982 mmc_go_idle(host);
983 err = mmc_sdio_init_card(host, host->card->ocr, host->card, 983 mmc_send_if_cond(host, host->card->ocr);
984 mmc_card_keep_power(host)); 984 err = mmc_send_io_op_cond(host, 0, NULL);
985 if (!err)
986 err = mmc_sdio_init_card(host, host->card->ocr,
987 host->card,
988 mmc_card_keep_power(host));
985 } else if (mmc_card_keep_power(host) && mmc_card_wake_sdio_irq(host)) { 989 } else if (mmc_card_keep_power(host) && mmc_card_wake_sdio_irq(host)) {
986 /* We may have switched to 1-bit mode during suspend */ 990 /* We may have switched to 1-bit mode during suspend */
987 err = sdio_enable_4bit_bus(host->card); 991 err = sdio_enable_4bit_bus(host->card);
@@ -1035,7 +1039,7 @@ static int mmc_sdio_power_restore(struct mmc_host *host)
1035 1039
1036 sdio_reset(host); 1040 sdio_reset(host);
1037 mmc_go_idle(host); 1041 mmc_go_idle(host);
1038 mmc_send_if_cond(host, host->ocr_avail); 1042 mmc_send_if_cond(host, host->card->ocr);
1039 1043
1040 ret = mmc_send_io_op_cond(host, 0, NULL); 1044 ret = mmc_send_io_op_cond(host, 0, NULL);
1041 if (ret) 1045 if (ret)
diff --git a/drivers/mmc/core/sdio_bus.c b/drivers/mmc/core/sdio_bus.c
index 6da97b170563..60885316afba 100644
--- a/drivers/mmc/core/sdio_bus.c
+++ b/drivers/mmc/core/sdio_bus.c
@@ -26,6 +26,8 @@
26#include "sdio_cis.h" 26#include "sdio_cis.h"
27#include "sdio_bus.h" 27#include "sdio_bus.h"
28 28
29#define to_sdio_driver(d) container_of(d, struct sdio_driver, drv)
30
29/* show configuration fields */ 31/* show configuration fields */
30#define sdio_config_attr(field, format_string) \ 32#define sdio_config_attr(field, format_string) \
31static ssize_t \ 33static ssize_t \
@@ -196,8 +198,6 @@ static int sdio_bus_remove(struct device *dev)
196 return ret; 198 return ret;
197} 199}
198 200
199#ifdef CONFIG_PM
200
201static const struct dev_pm_ops sdio_bus_pm_ops = { 201static const struct dev_pm_ops sdio_bus_pm_ops = {
202 SET_SYSTEM_SLEEP_PM_OPS(pm_generic_suspend, pm_generic_resume) 202 SET_SYSTEM_SLEEP_PM_OPS(pm_generic_suspend, pm_generic_resume)
203 SET_RUNTIME_PM_OPS( 203 SET_RUNTIME_PM_OPS(
@@ -207,14 +207,6 @@ static const struct dev_pm_ops sdio_bus_pm_ops = {
207 ) 207 )
208}; 208};
209 209
210#define SDIO_PM_OPS_PTR (&sdio_bus_pm_ops)
211
212#else /* !CONFIG_PM */
213
214#define SDIO_PM_OPS_PTR NULL
215
216#endif /* !CONFIG_PM */
217
218static struct bus_type sdio_bus_type = { 210static struct bus_type sdio_bus_type = {
219 .name = "sdio", 211 .name = "sdio",
220 .dev_groups = sdio_dev_groups, 212 .dev_groups = sdio_dev_groups,
@@ -222,7 +214,7 @@ static struct bus_type sdio_bus_type = {
222 .uevent = sdio_bus_uevent, 214 .uevent = sdio_bus_uevent,
223 .probe = sdio_bus_probe, 215 .probe = sdio_bus_probe,
224 .remove = sdio_bus_remove, 216 .remove = sdio_bus_remove,
225 .pm = SDIO_PM_OPS_PTR, 217 .pm = &sdio_bus_pm_ops,
226}; 218};
227 219
228int sdio_register_bus(void) 220int sdio_register_bus(void)
@@ -295,7 +287,7 @@ struct sdio_func *sdio_alloc_func(struct mmc_card *card)
295static void sdio_acpi_set_handle(struct sdio_func *func) 287static void sdio_acpi_set_handle(struct sdio_func *func)
296{ 288{
297 struct mmc_host *host = func->card->host; 289 struct mmc_host *host = func->card->host;
298 u64 addr = (host->slotno << 16) | func->num; 290 u64 addr = ((u64)host->slotno << 16) | func->num;
299 291
300 acpi_preset_companion(&func->dev, ACPI_COMPANION(host->parent), addr); 292 acpi_preset_companion(&func->dev, ACPI_COMPANION(host->parent), addr);
301} 293}
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 13860656104b..2d6fbdd11803 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -580,7 +580,7 @@ config SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND
580config MMC_DW 580config MMC_DW
581 tristate "Synopsys DesignWare Memory Card Interface" 581 tristate "Synopsys DesignWare Memory Card Interface"
582 depends on HAS_DMA 582 depends on HAS_DMA
583 depends on ARC || ARM || MIPS || COMPILE_TEST 583 depends on ARC || ARM || ARM64 || MIPS || COMPILE_TEST
584 help 584 help
585 This selects support for the Synopsys DesignWare Mobile Storage IP 585 This selects support for the Synopsys DesignWare Mobile Storage IP
586 block, this provides host support for SD and MMC interfaces, in both 586 block, this provides host support for SD and MMC interfaces, in both
@@ -748,3 +748,8 @@ config MMC_SUNXI
748 help 748 help
749 This selects support for the SD/MMC Host Controller on 749 This selects support for the SD/MMC Host Controller on
750 Allwinner sunxi SoCs. 750 Allwinner sunxi SoCs.
751
752config MMC_TOSHIBA_PCI
753 tristate "Toshiba Type A SD/MMC Card Interface Driver"
754 depends on PCI
755 help
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index b09ecfb88269..f7b0a77cf419 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -55,6 +55,7 @@ obj-$(CONFIG_MMC_WMT) += wmt-sdmmc.o
55obj-$(CONFIG_MMC_MOXART) += moxart-mmc.o 55obj-$(CONFIG_MMC_MOXART) += moxart-mmc.o
56obj-$(CONFIG_MMC_SUNXI) += sunxi-mmc.o 56obj-$(CONFIG_MMC_SUNXI) += sunxi-mmc.o
57obj-$(CONFIG_MMC_USDHI6ROL0) += usdhi6rol0.o 57obj-$(CONFIG_MMC_USDHI6ROL0) += usdhi6rol0.o
58obj-$(CONFIG_MMC_TOSHIBA_PCI) += toshsd.o
58 59
59obj-$(CONFIG_MMC_REALTEK_PCI) += rtsx_pci_sdmmc.o 60obj-$(CONFIG_MMC_REALTEK_PCI) += rtsx_pci_sdmmc.o
60obj-$(CONFIG_MMC_REALTEK_USB) += rtsx_usb_sdmmc.o 61obj-$(CONFIG_MMC_REALTEK_USB) += rtsx_usb_sdmmc.o
diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
index 77250d4b1979..62aba9af19f4 100644
--- a/drivers/mmc/host/atmel-mci.c
+++ b/drivers/mmc/host/atmel-mci.c
@@ -30,13 +30,16 @@
30#include <linux/stat.h> 30#include <linux/stat.h>
31#include <linux/types.h> 31#include <linux/types.h>
32#include <linux/platform_data/atmel.h> 32#include <linux/platform_data/atmel.h>
33#include <linux/platform_data/mmc-atmel-mci.h>
33 34
34#include <linux/mmc/host.h> 35#include <linux/mmc/host.h>
35#include <linux/mmc/sdio.h> 36#include <linux/mmc/sdio.h>
36 37
37#include <mach/atmel-mci.h>
38#include <linux/atmel-mci.h> 38#include <linux/atmel-mci.h>
39#include <linux/atmel_pdc.h> 39#include <linux/atmel_pdc.h>
40#include <linux/pm.h>
41#include <linux/pm_runtime.h>
42#include <linux/pinctrl/consumer.h>
40 43
41#include <asm/cacheflush.h> 44#include <asm/cacheflush.h>
42#include <asm/io.h> 45#include <asm/io.h>
@@ -44,6 +47,8 @@
44 47
45#include "atmel-mci-regs.h" 48#include "atmel-mci-regs.h"
46 49
50#define AUTOSUSPEND_DELAY 50
51
47#define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE) 52#define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE)
48#define ATMCI_DMA_THRESHOLD 16 53#define ATMCI_DMA_THRESHOLD 16
49 54
@@ -386,20 +391,19 @@ static int atmci_regs_show(struct seq_file *s, void *v)
386 if (!buf) 391 if (!buf)
387 return -ENOMEM; 392 return -ENOMEM;
388 393
394 pm_runtime_get_sync(&host->pdev->dev);
395
389 /* 396 /*
390 * Grab a more or less consistent snapshot. Note that we're 397 * Grab a more or less consistent snapshot. Note that we're
391 * not disabling interrupts, so IMR and SR may not be 398 * not disabling interrupts, so IMR and SR may not be
392 * consistent. 399 * consistent.
393 */ 400 */
394 ret = clk_prepare_enable(host->mck);
395 if (ret)
396 goto out;
397
398 spin_lock_bh(&host->lock); 401 spin_lock_bh(&host->lock);
399 memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE); 402 memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE);
400 spin_unlock_bh(&host->lock); 403 spin_unlock_bh(&host->lock);
401 404
402 clk_disable_unprepare(host->mck); 405 pm_runtime_mark_last_busy(&host->pdev->dev);
406 pm_runtime_put_autosuspend(&host->pdev->dev);
403 407
404 seq_printf(s, "MR:\t0x%08x%s%s ", 408 seq_printf(s, "MR:\t0x%08x%s%s ",
405 buf[ATMCI_MR / 4], 409 buf[ATMCI_MR / 4],
@@ -449,7 +453,6 @@ static int atmci_regs_show(struct seq_file *s, void *v)
449 val & ATMCI_CFG_LSYNC ? " LSYNC" : ""); 453 val & ATMCI_CFG_LSYNC ? " LSYNC" : "");
450 } 454 }
451 455
452out:
453 kfree(buf); 456 kfree(buf);
454 457
455 return ret; 458 return ret;
@@ -560,6 +563,9 @@ atmci_of_init(struct platform_device *pdev)
560 pdata->slot[slot_id].detect_is_active_high = 563 pdata->slot[slot_id].detect_is_active_high =
561 of_property_read_bool(cnp, "cd-inverted"); 564 of_property_read_bool(cnp, "cd-inverted");
562 565
566 pdata->slot[slot_id].non_removable =
567 of_property_read_bool(cnp, "non-removable");
568
563 pdata->slot[slot_id].wp_pin = 569 pdata->slot[slot_id].wp_pin =
564 of_get_named_gpio(cnp, "wp-gpios", 0); 570 of_get_named_gpio(cnp, "wp-gpios", 0);
565 } 571 }
@@ -1252,6 +1258,8 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1252 WARN_ON(slot->mrq); 1258 WARN_ON(slot->mrq);
1253 dev_dbg(&host->pdev->dev, "MRQ: cmd %u\n", mrq->cmd->opcode); 1259 dev_dbg(&host->pdev->dev, "MRQ: cmd %u\n", mrq->cmd->opcode);
1254 1260
1261 pm_runtime_get_sync(&host->pdev->dev);
1262
1255 /* 1263 /*
1256 * We may "know" the card is gone even though there's still an 1264 * We may "know" the card is gone even though there's still an
1257 * electrical connection. If so, we really need to communicate 1265 * electrical connection. If so, we really need to communicate
@@ -1281,7 +1289,8 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1281 struct atmel_mci_slot *slot = mmc_priv(mmc); 1289 struct atmel_mci_slot *slot = mmc_priv(mmc);
1282 struct atmel_mci *host = slot->host; 1290 struct atmel_mci *host = slot->host;
1283 unsigned int i; 1291 unsigned int i;
1284 bool unprepare_clk; 1292
1293 pm_runtime_get_sync(&host->pdev->dev);
1285 1294
1286 slot->sdc_reg &= ~ATMCI_SDCBUS_MASK; 1295 slot->sdc_reg &= ~ATMCI_SDCBUS_MASK;
1287 switch (ios->bus_width) { 1296 switch (ios->bus_width) {
@@ -1297,13 +1306,8 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1297 unsigned int clock_min = ~0U; 1306 unsigned int clock_min = ~0U;
1298 u32 clkdiv; 1307 u32 clkdiv;
1299 1308
1300 clk_prepare(host->mck);
1301 unprepare_clk = true;
1302
1303 spin_lock_bh(&host->lock); 1309 spin_lock_bh(&host->lock);
1304 if (!host->mode_reg) { 1310 if (!host->mode_reg) {
1305 clk_enable(host->mck);
1306 unprepare_clk = false;
1307 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 1311 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1308 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); 1312 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1309 if (host->caps.has_cfg_reg) 1313 if (host->caps.has_cfg_reg)
@@ -1371,8 +1375,6 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1371 } else { 1375 } else {
1372 bool any_slot_active = false; 1376 bool any_slot_active = false;
1373 1377
1374 unprepare_clk = false;
1375
1376 spin_lock_bh(&host->lock); 1378 spin_lock_bh(&host->lock);
1377 slot->clock = 0; 1379 slot->clock = 0;
1378 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 1380 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
@@ -1385,17 +1387,12 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1385 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); 1387 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
1386 if (host->mode_reg) { 1388 if (host->mode_reg) {
1387 atmci_readl(host, ATMCI_MR); 1389 atmci_readl(host, ATMCI_MR);
1388 clk_disable(host->mck);
1389 unprepare_clk = true;
1390 } 1390 }
1391 host->mode_reg = 0; 1391 host->mode_reg = 0;
1392 } 1392 }
1393 spin_unlock_bh(&host->lock); 1393 spin_unlock_bh(&host->lock);
1394 } 1394 }
1395 1395
1396 if (unprepare_clk)
1397 clk_unprepare(host->mck);
1398
1399 switch (ios->power_mode) { 1396 switch (ios->power_mode) {
1400 case MMC_POWER_OFF: 1397 case MMC_POWER_OFF:
1401 if (!IS_ERR(mmc->supply.vmmc)) 1398 if (!IS_ERR(mmc->supply.vmmc))
@@ -1421,6 +1418,9 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1421 */ 1418 */
1422 break; 1419 break;
1423 } 1420 }
1421
1422 pm_runtime_mark_last_busy(&host->pdev->dev);
1423 pm_runtime_put_autosuspend(&host->pdev->dev);
1424} 1424}
1425 1425
1426static int atmci_get_ro(struct mmc_host *mmc) 1426static int atmci_get_ro(struct mmc_host *mmc)
@@ -1512,6 +1512,9 @@ static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
1512 spin_unlock(&host->lock); 1512 spin_unlock(&host->lock);
1513 mmc_request_done(prev_mmc, mrq); 1513 mmc_request_done(prev_mmc, mrq);
1514 spin_lock(&host->lock); 1514 spin_lock(&host->lock);
1515
1516 pm_runtime_mark_last_busy(&host->pdev->dev);
1517 pm_runtime_put_autosuspend(&host->pdev->dev);
1515} 1518}
1516 1519
1517static void atmci_command_complete(struct atmel_mci *host, 1520static void atmci_command_complete(struct atmel_mci *host,
@@ -2137,7 +2140,7 @@ static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
2137 return IRQ_HANDLED; 2140 return IRQ_HANDLED;
2138} 2141}
2139 2142
2140static int __init atmci_init_slot(struct atmel_mci *host, 2143static int atmci_init_slot(struct atmel_mci *host,
2141 struct mci_slot_pdata *slot_data, unsigned int id, 2144 struct mci_slot_pdata *slot_data, unsigned int id,
2142 u32 sdc_reg, u32 sdio_irq) 2145 u32 sdc_reg, u32 sdio_irq)
2143{ 2146{
@@ -2206,8 +2209,12 @@ static int __init atmci_init_slot(struct atmel_mci *host,
2206 } 2209 }
2207 } 2210 }
2208 2211
2209 if (!gpio_is_valid(slot->detect_pin)) 2212 if (!gpio_is_valid(slot->detect_pin)) {
2210 mmc->caps |= MMC_CAP_NEEDS_POLL; 2213 if (slot_data->non_removable)
2214 mmc->caps |= MMC_CAP_NONREMOVABLE;
2215 else
2216 mmc->caps |= MMC_CAP_NEEDS_POLL;
2217 }
2211 2218
2212 if (gpio_is_valid(slot->wp_pin)) { 2219 if (gpio_is_valid(slot->wp_pin)) {
2213 if (devm_gpio_request(&host->pdev->dev, slot->wp_pin, 2220 if (devm_gpio_request(&host->pdev->dev, slot->wp_pin,
@@ -2265,55 +2272,25 @@ static void atmci_cleanup_slot(struct atmel_mci_slot *slot,
2265 mmc_free_host(slot->mmc); 2272 mmc_free_host(slot->mmc);
2266} 2273}
2267 2274
2268static bool atmci_filter(struct dma_chan *chan, void *pdata) 2275static int atmci_configure_dma(struct atmel_mci *host)
2269{ 2276{
2270 struct mci_platform_data *sl_pdata = pdata; 2277 host->dma.chan = dma_request_slave_channel_reason(&host->pdev->dev,
2271 struct mci_dma_data *sl; 2278 "rxtx");
2272 2279 if (IS_ERR(host->dma.chan))
2273 if (!sl_pdata) 2280 return PTR_ERR(host->dma.chan);
2274 return false; 2281
2282 dev_info(&host->pdev->dev, "using %s for DMA transfers\n",
2283 dma_chan_name(host->dma.chan));
2284
2285 host->dma_conf.src_addr = host->mapbase + ATMCI_RDR;
2286 host->dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
2287 host->dma_conf.src_maxburst = 1;
2288 host->dma_conf.dst_addr = host->mapbase + ATMCI_TDR;
2289 host->dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
2290 host->dma_conf.dst_maxburst = 1;
2291 host->dma_conf.device_fc = false;
2275 2292
2276 sl = sl_pdata->dma_slave; 2293 return 0;
2277 if (sl && find_slave_dev(sl) == chan->device->dev) {
2278 chan->private = slave_data_ptr(sl);
2279 return true;
2280 } else {
2281 return false;
2282 }
2283}
2284
2285static bool atmci_configure_dma(struct atmel_mci *host)
2286{
2287 struct mci_platform_data *pdata;
2288 dma_cap_mask_t mask;
2289
2290 if (host == NULL)
2291 return false;
2292
2293 pdata = host->pdev->dev.platform_data;
2294
2295 dma_cap_zero(mask);
2296 dma_cap_set(DMA_SLAVE, mask);
2297
2298 host->dma.chan = dma_request_slave_channel_compat(mask, atmci_filter, pdata,
2299 &host->pdev->dev, "rxtx");
2300 if (!host->dma.chan) {
2301 dev_warn(&host->pdev->dev, "no DMA channel available\n");
2302 return false;
2303 } else {
2304 dev_info(&host->pdev->dev,
2305 "using %s for DMA transfers\n",
2306 dma_chan_name(host->dma.chan));
2307
2308 host->dma_conf.src_addr = host->mapbase + ATMCI_RDR;
2309 host->dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
2310 host->dma_conf.src_maxburst = 1;
2311 host->dma_conf.dst_addr = host->mapbase + ATMCI_TDR;
2312 host->dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
2313 host->dma_conf.dst_maxburst = 1;
2314 host->dma_conf.device_fc = false;
2315 return true;
2316 }
2317} 2294}
2318 2295
2319/* 2296/*
@@ -2321,7 +2298,7 @@ static bool atmci_configure_dma(struct atmel_mci *host)
2321 * HSMCI provides DMA support and a new config register but no more supports 2298 * HSMCI provides DMA support and a new config register but no more supports
2322 * PDC. 2299 * PDC.
2323 */ 2300 */
2324static void __init atmci_get_cap(struct atmel_mci *host) 2301static void atmci_get_cap(struct atmel_mci *host)
2325{ 2302{
2326 unsigned int version; 2303 unsigned int version;
2327 2304
@@ -2370,7 +2347,7 @@ static void __init atmci_get_cap(struct atmel_mci *host)
2370 } 2347 }
2371} 2348}
2372 2349
2373static int __init atmci_probe(struct platform_device *pdev) 2350static int atmci_probe(struct platform_device *pdev)
2374{ 2351{
2375 struct mci_platform_data *pdata; 2352 struct mci_platform_data *pdata;
2376 struct atmel_mci *host; 2353 struct atmel_mci *host;
@@ -2417,19 +2394,23 @@ static int __init atmci_probe(struct platform_device *pdev)
2417 2394
2418 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 2395 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
2419 host->bus_hz = clk_get_rate(host->mck); 2396 host->bus_hz = clk_get_rate(host->mck);
2420 clk_disable_unprepare(host->mck);
2421 2397
2422 host->mapbase = regs->start; 2398 host->mapbase = regs->start;
2423 2399
2424 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host); 2400 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
2425 2401
2426 ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host); 2402 ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
2427 if (ret) 2403 if (ret) {
2404 clk_disable_unprepare(host->mck);
2428 return ret; 2405 return ret;
2406 }
2429 2407
2430 /* Get MCI capabilities and set operations according to it */ 2408 /* Get MCI capabilities and set operations according to it */
2431 atmci_get_cap(host); 2409 atmci_get_cap(host);
2432 if (atmci_configure_dma(host)) { 2410 ret = atmci_configure_dma(host);
2411 if (ret == -EPROBE_DEFER)
2412 goto err_dma_probe_defer;
2413 if (ret == 0) {
2433 host->prepare_data = &atmci_prepare_data_dma; 2414 host->prepare_data = &atmci_prepare_data_dma;
2434 host->submit_data = &atmci_submit_data_dma; 2415 host->submit_data = &atmci_submit_data_dma;
2435 host->stop_transfer = &atmci_stop_transfer_dma; 2416 host->stop_transfer = &atmci_stop_transfer_dma;
@@ -2449,6 +2430,12 @@ static int __init atmci_probe(struct platform_device *pdev)
2449 2430
2450 setup_timer(&host->timer, atmci_timeout_timer, (unsigned long)host); 2431 setup_timer(&host->timer, atmci_timeout_timer, (unsigned long)host);
2451 2432
2433 pm_runtime_get_noresume(&pdev->dev);
2434 pm_runtime_set_active(&pdev->dev);
2435 pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_DELAY);
2436 pm_runtime_use_autosuspend(&pdev->dev);
2437 pm_runtime_enable(&pdev->dev);
2438
2452 /* We need at least one slot to succeed */ 2439 /* We need at least one slot to succeed */
2453 nr_slots = 0; 2440 nr_slots = 0;
2454 ret = -ENODEV; 2441 ret = -ENODEV;
@@ -2491,6 +2478,9 @@ static int __init atmci_probe(struct platform_device *pdev)
2491 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n", 2478 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
2492 host->mapbase, irq, nr_slots); 2479 host->mapbase, irq, nr_slots);
2493 2480
2481 pm_runtime_mark_last_busy(&host->pdev->dev);
2482 pm_runtime_put_autosuspend(&pdev->dev);
2483
2494 return 0; 2484 return 0;
2495 2485
2496err_dma_alloc: 2486err_dma_alloc:
@@ -2499,18 +2489,26 @@ err_dma_alloc:
2499 atmci_cleanup_slot(host->slot[i], i); 2489 atmci_cleanup_slot(host->slot[i], i);
2500 } 2490 }
2501err_init_slot: 2491err_init_slot:
2492 clk_disable_unprepare(host->mck);
2493
2494 pm_runtime_disable(&pdev->dev);
2495 pm_runtime_put_noidle(&pdev->dev);
2496
2502 del_timer_sync(&host->timer); 2497 del_timer_sync(&host->timer);
2503 if (host->dma.chan) 2498 if (!IS_ERR(host->dma.chan))
2504 dma_release_channel(host->dma.chan); 2499 dma_release_channel(host->dma.chan);
2500err_dma_probe_defer:
2505 free_irq(irq, host); 2501 free_irq(irq, host);
2506 return ret; 2502 return ret;
2507} 2503}
2508 2504
2509static int __exit atmci_remove(struct platform_device *pdev) 2505static int atmci_remove(struct platform_device *pdev)
2510{ 2506{
2511 struct atmel_mci *host = platform_get_drvdata(pdev); 2507 struct atmel_mci *host = platform_get_drvdata(pdev);
2512 unsigned int i; 2508 unsigned int i;
2513 2509
2510 pm_runtime_get_sync(&pdev->dev);
2511
2514 if (host->buffer) 2512 if (host->buffer)
2515 dma_free_coherent(&pdev->dev, host->buf_size, 2513 dma_free_coherent(&pdev->dev, host->buf_size,
2516 host->buffer, host->buf_phys_addr); 2514 host->buffer, host->buf_phys_addr);
@@ -2520,41 +2518,62 @@ static int __exit atmci_remove(struct platform_device *pdev)
2520 atmci_cleanup_slot(host->slot[i], i); 2518 atmci_cleanup_slot(host->slot[i], i);
2521 } 2519 }
2522 2520
2523 clk_prepare_enable(host->mck);
2524 atmci_writel(host, ATMCI_IDR, ~0UL); 2521 atmci_writel(host, ATMCI_IDR, ~0UL);
2525 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); 2522 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
2526 atmci_readl(host, ATMCI_SR); 2523 atmci_readl(host, ATMCI_SR);
2527 clk_disable_unprepare(host->mck);
2528 2524
2529 del_timer_sync(&host->timer); 2525 del_timer_sync(&host->timer);
2530 if (host->dma.chan) 2526 if (!IS_ERR(host->dma.chan))
2531 dma_release_channel(host->dma.chan); 2527 dma_release_channel(host->dma.chan);
2532 2528
2533 free_irq(platform_get_irq(pdev, 0), host); 2529 free_irq(platform_get_irq(pdev, 0), host);
2534 2530
2531 clk_disable_unprepare(host->mck);
2532
2533 pm_runtime_disable(&pdev->dev);
2534 pm_runtime_put_noidle(&pdev->dev);
2535
2535 return 0; 2536 return 0;
2536} 2537}
2537 2538
2538static struct platform_driver atmci_driver = { 2539#ifdef CONFIG_PM
2539 .remove = __exit_p(atmci_remove), 2540static int atmci_runtime_suspend(struct device *dev)
2540 .driver = {
2541 .name = "atmel_mci",
2542 .of_match_table = of_match_ptr(atmci_dt_ids),
2543 },
2544};
2545
2546static int __init atmci_init(void)
2547{ 2541{
2548 return platform_driver_probe(&atmci_driver, atmci_probe); 2542 struct atmel_mci *host = dev_get_drvdata(dev);
2543
2544 clk_disable_unprepare(host->mck);
2545
2546 pinctrl_pm_select_sleep_state(dev);
2547
2548 return 0;
2549} 2549}
2550 2550
2551static void __exit atmci_exit(void) 2551static int atmci_runtime_resume(struct device *dev)
2552{ 2552{
2553 platform_driver_unregister(&atmci_driver); 2553 struct atmel_mci *host = dev_get_drvdata(dev);
2554
2555 pinctrl_pm_select_default_state(dev);
2556
2557 return clk_prepare_enable(host->mck);
2554} 2558}
2559#endif
2555 2560
2556late_initcall(atmci_init); /* try to load after dma driver when built-in */ 2561static const struct dev_pm_ops atmci_dev_pm_ops = {
2557module_exit(atmci_exit); 2562 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
2563 pm_runtime_force_resume)
2564 SET_PM_RUNTIME_PM_OPS(atmci_runtime_suspend, atmci_runtime_resume, NULL)
2565};
2566
2567static struct platform_driver atmci_driver = {
2568 .probe = atmci_probe,
2569 .remove = atmci_remove,
2570 .driver = {
2571 .name = "atmel_mci",
2572 .of_match_table = of_match_ptr(atmci_dt_ids),
2573 .pm = &atmci_dev_pm_ops,
2574 },
2575};
2576module_platform_driver(atmci_driver);
2558 2577
2559MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); 2578MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
2560MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); 2579MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index 0fbc53ac7eae..509365cb22c6 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -25,6 +25,7 @@
25#define NUM_PINS(x) (x + 2) 25#define NUM_PINS(x) (x + 2)
26 26
27#define SDMMC_CLKSEL 0x09C 27#define SDMMC_CLKSEL 0x09C
28#define SDMMC_CLKSEL64 0x0A8
28#define SDMMC_CLKSEL_CCLK_SAMPLE(x) (((x) & 7) << 0) 29#define SDMMC_CLKSEL_CCLK_SAMPLE(x) (((x) & 7) << 0)
29#define SDMMC_CLKSEL_CCLK_DRIVE(x) (((x) & 7) << 16) 30#define SDMMC_CLKSEL_CCLK_DRIVE(x) (((x) & 7) << 16)
30#define SDMMC_CLKSEL_CCLK_DIVIDER(x) (((x) & 7) << 24) 31#define SDMMC_CLKSEL_CCLK_DIVIDER(x) (((x) & 7) << 24)
@@ -65,6 +66,8 @@ enum dw_mci_exynos_type {
65 DW_MCI_TYPE_EXYNOS5250, 66 DW_MCI_TYPE_EXYNOS5250,
66 DW_MCI_TYPE_EXYNOS5420, 67 DW_MCI_TYPE_EXYNOS5420,
67 DW_MCI_TYPE_EXYNOS5420_SMU, 68 DW_MCI_TYPE_EXYNOS5420_SMU,
69 DW_MCI_TYPE_EXYNOS7,
70 DW_MCI_TYPE_EXYNOS7_SMU,
68}; 71};
69 72
70/* Exynos implementation specific driver private data */ 73/* Exynos implementation specific driver private data */
@@ -95,6 +98,12 @@ static struct dw_mci_exynos_compatible {
95 }, { 98 }, {
96 .compatible = "samsung,exynos5420-dw-mshc-smu", 99 .compatible = "samsung,exynos5420-dw-mshc-smu",
97 .ctrl_type = DW_MCI_TYPE_EXYNOS5420_SMU, 100 .ctrl_type = DW_MCI_TYPE_EXYNOS5420_SMU,
101 }, {
102 .compatible = "samsung,exynos7-dw-mshc",
103 .ctrl_type = DW_MCI_TYPE_EXYNOS7,
104 }, {
105 .compatible = "samsung,exynos7-dw-mshc-smu",
106 .ctrl_type = DW_MCI_TYPE_EXYNOS7_SMU,
98 }, 107 },
99}; 108};
100 109
@@ -102,7 +111,8 @@ static int dw_mci_exynos_priv_init(struct dw_mci *host)
102{ 111{
103 struct dw_mci_exynos_priv_data *priv = host->priv; 112 struct dw_mci_exynos_priv_data *priv = host->priv;
104 113
105 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS5420_SMU) { 114 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS5420_SMU ||
115 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) {
106 mci_writel(host, MPSBEGIN0, 0); 116 mci_writel(host, MPSBEGIN0, 0);
107 mci_writel(host, MPSEND0, DWMCI_BLOCK_NUM); 117 mci_writel(host, MPSEND0, DWMCI_BLOCK_NUM);
108 mci_writel(host, MPSCTRL0, DWMCI_MPSCTRL_SECURE_WRITE_BIT | 118 mci_writel(host, MPSCTRL0, DWMCI_MPSCTRL_SECURE_WRITE_BIT |
@@ -153,11 +163,22 @@ static int dw_mci_exynos_resume(struct device *dev)
153static int dw_mci_exynos_resume_noirq(struct device *dev) 163static int dw_mci_exynos_resume_noirq(struct device *dev)
154{ 164{
155 struct dw_mci *host = dev_get_drvdata(dev); 165 struct dw_mci *host = dev_get_drvdata(dev);
166 struct dw_mci_exynos_priv_data *priv = host->priv;
156 u32 clksel; 167 u32 clksel;
157 168
158 clksel = mci_readl(host, CLKSEL); 169 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
159 if (clksel & SDMMC_CLKSEL_WAKEUP_INT) 170 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
160 mci_writel(host, CLKSEL, clksel); 171 clksel = mci_readl(host, CLKSEL64);
172 else
173 clksel = mci_readl(host, CLKSEL);
174
175 if (clksel & SDMMC_CLKSEL_WAKEUP_INT) {
176 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
177 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
178 mci_writel(host, CLKSEL64, clksel);
179 else
180 mci_writel(host, CLKSEL, clksel);
181 }
161 182
162 return 0; 183 return 0;
163} 184}
@@ -169,6 +190,7 @@ static int dw_mci_exynos_resume_noirq(struct device *dev)
169 190
170static void dw_mci_exynos_prepare_command(struct dw_mci *host, u32 *cmdr) 191static void dw_mci_exynos_prepare_command(struct dw_mci *host, u32 *cmdr)
171{ 192{
193 struct dw_mci_exynos_priv_data *priv = host->priv;
172 /* 194 /*
173 * Exynos4412 and Exynos5250 extends the use of CMD register with the 195 * Exynos4412 and Exynos5250 extends the use of CMD register with the
174 * use of bit 29 (which is reserved on standard MSHC controllers) for 196 * use of bit 29 (which is reserved on standard MSHC controllers) for
@@ -176,8 +198,14 @@ static void dw_mci_exynos_prepare_command(struct dw_mci *host, u32 *cmdr)
176 * HOLD register should be bypassed in case there is no phase shift 198 * HOLD register should be bypassed in case there is no phase shift
177 * applied on CMD/DATA that is sent to the card. 199 * applied on CMD/DATA that is sent to the card.
178 */ 200 */
179 if (SDMMC_CLKSEL_GET_DRV_WD3(mci_readl(host, CLKSEL))) 201 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
180 *cmdr |= SDMMC_CMD_USE_HOLD_REG; 202 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) {
203 if (SDMMC_CLKSEL_GET_DRV_WD3(mci_readl(host, CLKSEL64)))
204 *cmdr |= SDMMC_CMD_USE_HOLD_REG;
205 } else {
206 if (SDMMC_CLKSEL_GET_DRV_WD3(mci_readl(host, CLKSEL)))
207 *cmdr |= SDMMC_CMD_USE_HOLD_REG;
208 }
181} 209}
182 210
183static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios) 211static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios)
@@ -188,12 +216,20 @@ static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios)
188 u8 div = priv->ciu_div + 1; 216 u8 div = priv->ciu_div + 1;
189 217
190 if (ios->timing == MMC_TIMING_MMC_DDR52) { 218 if (ios->timing == MMC_TIMING_MMC_DDR52) {
191 mci_writel(host, CLKSEL, priv->ddr_timing); 219 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
220 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
221 mci_writel(host, CLKSEL64, priv->ddr_timing);
222 else
223 mci_writel(host, CLKSEL, priv->ddr_timing);
192 /* Should be double rate for DDR mode */ 224 /* Should be double rate for DDR mode */
193 if (ios->bus_width == MMC_BUS_WIDTH_8) 225 if (ios->bus_width == MMC_BUS_WIDTH_8)
194 wanted <<= 1; 226 wanted <<= 1;
195 } else { 227 } else {
196 mci_writel(host, CLKSEL, priv->sdr_timing); 228 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
229 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
230 mci_writel(host, CLKSEL64, priv->sdr_timing);
231 else
232 mci_writel(host, CLKSEL, priv->sdr_timing);
197 } 233 }
198 234
199 /* Don't care if wanted clock is zero */ 235 /* Don't care if wanted clock is zero */
@@ -265,26 +301,51 @@ static int dw_mci_exynos_parse_dt(struct dw_mci *host)
265 301
266static inline u8 dw_mci_exynos_get_clksmpl(struct dw_mci *host) 302static inline u8 dw_mci_exynos_get_clksmpl(struct dw_mci *host)
267{ 303{
268 return SDMMC_CLKSEL_CCLK_SAMPLE(mci_readl(host, CLKSEL)); 304 struct dw_mci_exynos_priv_data *priv = host->priv;
305
306 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
307 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
308 return SDMMC_CLKSEL_CCLK_SAMPLE(mci_readl(host, CLKSEL64));
309 else
310 return SDMMC_CLKSEL_CCLK_SAMPLE(mci_readl(host, CLKSEL));
269} 311}
270 312
271static inline void dw_mci_exynos_set_clksmpl(struct dw_mci *host, u8 sample) 313static inline void dw_mci_exynos_set_clksmpl(struct dw_mci *host, u8 sample)
272{ 314{
273 u32 clksel; 315 u32 clksel;
274 clksel = mci_readl(host, CLKSEL); 316 struct dw_mci_exynos_priv_data *priv = host->priv;
317
318 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
319 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
320 clksel = mci_readl(host, CLKSEL64);
321 else
322 clksel = mci_readl(host, CLKSEL);
275 clksel = (clksel & ~0x7) | SDMMC_CLKSEL_CCLK_SAMPLE(sample); 323 clksel = (clksel & ~0x7) | SDMMC_CLKSEL_CCLK_SAMPLE(sample);
276 mci_writel(host, CLKSEL, clksel); 324 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
325 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
326 mci_writel(host, CLKSEL64, clksel);
327 else
328 mci_writel(host, CLKSEL, clksel);
277} 329}
278 330
279static inline u8 dw_mci_exynos_move_next_clksmpl(struct dw_mci *host) 331static inline u8 dw_mci_exynos_move_next_clksmpl(struct dw_mci *host)
280{ 332{
333 struct dw_mci_exynos_priv_data *priv = host->priv;
281 u32 clksel; 334 u32 clksel;
282 u8 sample; 335 u8 sample;
283 336
284 clksel = mci_readl(host, CLKSEL); 337 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
338 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
339 clksel = mci_readl(host, CLKSEL64);
340 else
341 clksel = mci_readl(host, CLKSEL);
285 sample = (clksel + 1) & 0x7; 342 sample = (clksel + 1) & 0x7;
286 clksel = (clksel & ~0x7) | sample; 343 clksel = (clksel & ~0x7) | sample;
287 mci_writel(host, CLKSEL, clksel); 344 if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
345 priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
346 mci_writel(host, CLKSEL64, clksel);
347 else
348 mci_writel(host, CLKSEL, clksel);
288 return sample; 349 return sample;
289} 350}
290 351
@@ -411,6 +472,10 @@ static const struct of_device_id dw_mci_exynos_match[] = {
411 .data = &exynos_drv_data, }, 472 .data = &exynos_drv_data, },
412 { .compatible = "samsung,exynos5420-dw-mshc-smu", 473 { .compatible = "samsung,exynos5420-dw-mshc-smu",
413 .data = &exynos_drv_data, }, 474 .data = &exynos_drv_data, },
475 { .compatible = "samsung,exynos7-dw-mshc",
476 .data = &exynos_drv_data, },
477 { .compatible = "samsung,exynos7-dw-mshc-smu",
478 .data = &exynos_drv_data, },
414 {}, 479 {},
415}; 480};
416MODULE_DEVICE_TABLE(of, dw_mci_exynos_match); 481MODULE_DEVICE_TABLE(of, dw_mci_exynos_match);
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
index 8b6572162ed9..ec6dbcdec693 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.c
+++ b/drivers/mmc/host/dw_mmc-pltfm.c
@@ -35,6 +35,10 @@ static const struct dw_mci_drv_data socfpga_drv_data = {
35 .prepare_command = dw_mci_pltfm_prepare_command, 35 .prepare_command = dw_mci_pltfm_prepare_command,
36}; 36};
37 37
38static const struct dw_mci_drv_data pistachio_drv_data = {
39 .prepare_command = dw_mci_pltfm_prepare_command,
40};
41
38int dw_mci_pltfm_register(struct platform_device *pdev, 42int dw_mci_pltfm_register(struct platform_device *pdev,
39 const struct dw_mci_drv_data *drv_data) 43 const struct dw_mci_drv_data *drv_data)
40{ 44{
@@ -90,6 +94,8 @@ static const struct of_device_id dw_mci_pltfm_match[] = {
90 { .compatible = "snps,dw-mshc", }, 94 { .compatible = "snps,dw-mshc", },
91 { .compatible = "altr,socfpga-dw-mshc", 95 { .compatible = "altr,socfpga-dw-mshc",
92 .data = &socfpga_drv_data }, 96 .data = &socfpga_drv_data },
97 { .compatible = "img,pistachio-dw-mshc",
98 .data = &pistachio_drv_data },
93 {}, 99 {},
94}; 100};
95MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match); 101MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match);
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c
index f0c2cb1a210d..5650ac488cf3 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -37,6 +37,9 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios)
37 unsigned int cclkin; 37 unsigned int cclkin;
38 u32 bus_hz; 38 u32 bus_hz;
39 39
40 if (ios->clock == 0)
41 return;
42
40 /* 43 /*
41 * cclkin: source clock of mmc controller 44 * cclkin: source clock of mmc controller
42 * bus_hz: card interface clock generated by CLKGEN 45 * bus_hz: card interface clock generated by CLKGEN
@@ -65,14 +68,24 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios)
65 } 68 }
66} 69}
67 70
71static int dw_mci_rockchip_init(struct dw_mci *host)
72{
73 /* It is slot 8 on Rockchip SoCs */
74 host->sdio_id0 = 8;
75
76 return 0;
77}
78
68static const struct dw_mci_drv_data rk2928_drv_data = { 79static const struct dw_mci_drv_data rk2928_drv_data = {
69 .prepare_command = dw_mci_rockchip_prepare_command, 80 .prepare_command = dw_mci_rockchip_prepare_command,
81 .init = dw_mci_rockchip_init,
70}; 82};
71 83
72static const struct dw_mci_drv_data rk3288_drv_data = { 84static const struct dw_mci_drv_data rk3288_drv_data = {
73 .prepare_command = dw_mci_rockchip_prepare_command, 85 .prepare_command = dw_mci_rockchip_prepare_command,
74 .set_ios = dw_mci_rk3288_set_ios, 86 .set_ios = dw_mci_rk3288_set_ios,
75 .setup_clock = dw_mci_rk3288_setup_clock, 87 .setup_clock = dw_mci_rk3288_setup_clock,
88 .init = dw_mci_rockchip_init,
76}; 89};
77 90
78static const struct of_device_id dw_mci_rockchip_match[] = { 91static const struct of_device_id dw_mci_rockchip_match[] = {
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 69f0cc68d5b2..67c04518ec4c 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -34,7 +34,6 @@
34#include <linux/mmc/dw_mmc.h> 34#include <linux/mmc/dw_mmc.h>
35#include <linux/bitops.h> 35#include <linux/bitops.h>
36#include <linux/regulator/consumer.h> 36#include <linux/regulator/consumer.h>
37#include <linux/workqueue.h>
38#include <linux/of.h> 37#include <linux/of.h>
39#include <linux/of_gpio.h> 38#include <linux/of_gpio.h>
40#include <linux/mmc/slot-gpio.h> 39#include <linux/mmc/slot-gpio.h>
@@ -62,6 +61,24 @@
62 SDMMC_IDMAC_INT_FBE | SDMMC_IDMAC_INT_RI | \ 61 SDMMC_IDMAC_INT_FBE | SDMMC_IDMAC_INT_RI | \
63 SDMMC_IDMAC_INT_TI) 62 SDMMC_IDMAC_INT_TI)
64 63
64struct idmac_desc_64addr {
65 u32 des0; /* Control Descriptor */
66
67 u32 des1; /* Reserved */
68
69 u32 des2; /*Buffer sizes */
70#define IDMAC_64ADDR_SET_BUFFER1_SIZE(d, s) \
71 ((d)->des2 = ((d)->des2 & 0x03ffe000) | ((s) & 0x1fff))
72
73 u32 des3; /* Reserved */
74
75 u32 des4; /* Lower 32-bits of Buffer Address Pointer 1*/
76 u32 des5; /* Upper 32-bits of Buffer Address Pointer 1*/
77
78 u32 des6; /* Lower 32-bits of Next Descriptor Address */
79 u32 des7; /* Upper 32-bits of Next Descriptor Address */
80};
81
65struct idmac_desc { 82struct idmac_desc {
66 u32 des0; /* Control Descriptor */ 83 u32 des0; /* Control Descriptor */
67#define IDMAC_DES0_DIC BIT(1) 84#define IDMAC_DES0_DIC BIT(1)
@@ -83,6 +100,7 @@ struct idmac_desc {
83#endif /* CONFIG_MMC_DW_IDMAC */ 100#endif /* CONFIG_MMC_DW_IDMAC */
84 101
85static bool dw_mci_reset(struct dw_mci *host); 102static bool dw_mci_reset(struct dw_mci *host);
103static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset);
86 104
87#if defined(CONFIG_DEBUG_FS) 105#if defined(CONFIG_DEBUG_FS)
88static int dw_mci_req_show(struct seq_file *s, void *v) 106static int dw_mci_req_show(struct seq_file *s, void *v)
@@ -414,30 +432,66 @@ static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data,
414 unsigned int sg_len) 432 unsigned int sg_len)
415{ 433{
416 int i; 434 int i;
417 struct idmac_desc *desc = host->sg_cpu; 435 if (host->dma_64bit_address == 1) {
436 struct idmac_desc_64addr *desc = host->sg_cpu;
418 437
419 for (i = 0; i < sg_len; i++, desc++) { 438 for (i = 0; i < sg_len; i++, desc++) {
420 unsigned int length = sg_dma_len(&data->sg[i]); 439 unsigned int length = sg_dma_len(&data->sg[i]);
421 u32 mem_addr = sg_dma_address(&data->sg[i]); 440 u64 mem_addr = sg_dma_address(&data->sg[i]);
422 441
423 /* Set the OWN bit and disable interrupts for this descriptor */ 442 /*
424 desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH; 443 * Set the OWN bit and disable interrupts for this
444 * descriptor
445 */
446 desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC |
447 IDMAC_DES0_CH;
448 /* Buffer length */
449 IDMAC_64ADDR_SET_BUFFER1_SIZE(desc, length);
450
451 /* Physical address to DMA to/from */
452 desc->des4 = mem_addr & 0xffffffff;
453 desc->des5 = mem_addr >> 32;
454 }
425 455
426 /* Buffer length */ 456 /* Set first descriptor */
427 IDMAC_SET_BUFFER1_SIZE(desc, length); 457 desc = host->sg_cpu;
458 desc->des0 |= IDMAC_DES0_FD;
428 459
429 /* Physical address to DMA to/from */ 460 /* Set last descriptor */
430 desc->des2 = mem_addr; 461 desc = host->sg_cpu + (i - 1) *
431 } 462 sizeof(struct idmac_desc_64addr);
463 desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC);
464 desc->des0 |= IDMAC_DES0_LD;
432 465
433 /* Set first descriptor */ 466 } else {
434 desc = host->sg_cpu; 467 struct idmac_desc *desc = host->sg_cpu;
435 desc->des0 |= IDMAC_DES0_FD; 468
469 for (i = 0; i < sg_len; i++, desc++) {
470 unsigned int length = sg_dma_len(&data->sg[i]);
471 u32 mem_addr = sg_dma_address(&data->sg[i]);
472
473 /*
474 * Set the OWN bit and disable interrupts for this
475 * descriptor
476 */
477 desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC |
478 IDMAC_DES0_CH;
479 /* Buffer length */
480 IDMAC_SET_BUFFER1_SIZE(desc, length);
436 481
437 /* Set last descriptor */ 482 /* Physical address to DMA to/from */
438 desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); 483 desc->des2 = mem_addr;
439 desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); 484 }
440 desc->des0 |= IDMAC_DES0_LD; 485
486 /* Set first descriptor */
487 desc = host->sg_cpu;
488 desc->des0 |= IDMAC_DES0_FD;
489
490 /* Set last descriptor */
491 desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc);
492 desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC);
493 desc->des0 |= IDMAC_DES0_LD;
494 }
441 495
442 wmb(); 496 wmb();
443} 497}
@@ -448,6 +502,10 @@ static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len)
448 502
449 dw_mci_translate_sglist(host, host->data, sg_len); 503 dw_mci_translate_sglist(host, host->data, sg_len);
450 504
505 /* Make sure to reset DMA in case we did PIO before this */
506 dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET);
507 dw_mci_idmac_reset(host);
508
451 /* Select IDMAC interface */ 509 /* Select IDMAC interface */
452 temp = mci_readl(host, CTRL); 510 temp = mci_readl(host, CTRL);
453 temp |= SDMMC_CTRL_USE_IDMAC; 511 temp |= SDMMC_CTRL_USE_IDMAC;
@@ -466,29 +524,71 @@ static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len)
466 524
467static int dw_mci_idmac_init(struct dw_mci *host) 525static int dw_mci_idmac_init(struct dw_mci *host)
468{ 526{
469 struct idmac_desc *p;
470 int i; 527 int i;
471 528
472 /* Number of descriptors in the ring buffer */ 529 if (host->dma_64bit_address == 1) {
473 host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 530 struct idmac_desc_64addr *p;
531 /* Number of descriptors in the ring buffer */
532 host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc_64addr);
533
534 /* Forward link the descriptor list */
535 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1;
536 i++, p++) {
537 p->des6 = (host->sg_dma +
538 (sizeof(struct idmac_desc_64addr) *
539 (i + 1))) & 0xffffffff;
540
541 p->des7 = (u64)(host->sg_dma +
542 (sizeof(struct idmac_desc_64addr) *
543 (i + 1))) >> 32;
544 /* Initialize reserved and buffer size fields to "0" */
545 p->des1 = 0;
546 p->des2 = 0;
547 p->des3 = 0;
548 }
549
550 /* Set the last descriptor as the end-of-ring descriptor */
551 p->des6 = host->sg_dma & 0xffffffff;
552 p->des7 = (u64)host->sg_dma >> 32;
553 p->des0 = IDMAC_DES0_ER;
554
555 } else {
556 struct idmac_desc *p;
557 /* Number of descriptors in the ring buffer */
558 host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc);
474 559
475 /* Forward link the descriptor list */ 560 /* Forward link the descriptor list */
476 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) 561 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++)
477 p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1)); 562 p->des3 = host->sg_dma + (sizeof(struct idmac_desc) *
563 (i + 1));
478 564
479 /* Set the last descriptor as the end-of-ring descriptor */ 565 /* Set the last descriptor as the end-of-ring descriptor */
480 p->des3 = host->sg_dma; 566 p->des3 = host->sg_dma;
481 p->des0 = IDMAC_DES0_ER; 567 p->des0 = IDMAC_DES0_ER;
568 }
482 569
483 dw_mci_idmac_reset(host); 570 dw_mci_idmac_reset(host);
484 571
485 /* Mask out interrupts - get Tx & Rx complete only */ 572 if (host->dma_64bit_address == 1) {
486 mci_writel(host, IDSTS, IDMAC_INT_CLR); 573 /* Mask out interrupts - get Tx & Rx complete only */
487 mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI | 574 mci_writel(host, IDSTS64, IDMAC_INT_CLR);
488 SDMMC_IDMAC_INT_TI); 575 mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI |
576 SDMMC_IDMAC_INT_RI | SDMMC_IDMAC_INT_TI);
577
578 /* Set the descriptor base address */
579 mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff);
580 mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32);
581
582 } else {
583 /* Mask out interrupts - get Tx & Rx complete only */
584 mci_writel(host, IDSTS, IDMAC_INT_CLR);
585 mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI |
586 SDMMC_IDMAC_INT_RI | SDMMC_IDMAC_INT_TI);
587
588 /* Set the descriptor base address */
589 mci_writel(host, DBADDR, host->sg_dma);
590 }
489 591
490 /* Set the descriptor base address */
491 mci_writel(host, DBADDR, host->sg_dma);
492 return 0; 592 return 0;
493} 593}
494 594
@@ -626,6 +726,13 @@ static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data)
626 726
627 WARN_ON(!(data->flags & MMC_DATA_READ)); 727 WARN_ON(!(data->flags & MMC_DATA_READ));
628 728
729 /*
730 * CDTHRCTL doesn't exist prior to 240A (in fact that register offset is
731 * in the FIFO region, so we really shouldn't access it).
732 */
733 if (host->verid < DW_MMC_240A)
734 return;
735
629 if (host->timing != MMC_TIMING_MMC_HS200 && 736 if (host->timing != MMC_TIMING_MMC_HS200 &&
630 host->timing != MMC_TIMING_UHS_SDR104) 737 host->timing != MMC_TIMING_UHS_SDR104)
631 goto disable; 738 goto disable;
@@ -819,7 +926,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit)
819 926
820 /* enable clock; only low power if no SDIO */ 927 /* enable clock; only low power if no SDIO */
821 clk_en_a = SDMMC_CLKEN_ENABLE << slot->id; 928 clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
822 if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id))) 929 if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->sdio_id)))
823 clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id; 930 clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
824 mci_writel(host, CLKENA, clk_en_a); 931 mci_writel(host, CLKENA, clk_en_a);
825 932
@@ -1075,7 +1182,7 @@ static int dw_mci_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
1075 ret = regulator_set_voltage(mmc->supply.vqmmc, min_uv, max_uv); 1182 ret = regulator_set_voltage(mmc->supply.vqmmc, min_uv, max_uv);
1076 1183
1077 if (ret) { 1184 if (ret) {
1078 dev_err(&mmc->class_dev, 1185 dev_dbg(&mmc->class_dev,
1079 "Regulator set error %d: %d - %d\n", 1186 "Regulator set error %d: %d - %d\n",
1080 ret, min_uv, max_uv); 1187 ret, min_uv, max_uv);
1081 return ret; 1188 return ret;
@@ -1180,10 +1287,10 @@ static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb)
1180 dw_mci_disable_low_power(slot); 1287 dw_mci_disable_low_power(slot);
1181 1288
1182 mci_writel(host, INTMASK, 1289 mci_writel(host, INTMASK,
1183 (int_mask | SDMMC_INT_SDIO(slot->id))); 1290 (int_mask | SDMMC_INT_SDIO(slot->sdio_id)));
1184 } else { 1291 } else {
1185 mci_writel(host, INTMASK, 1292 mci_writel(host, INTMASK,
1186 (int_mask & ~SDMMC_INT_SDIO(slot->id))); 1293 (int_mask & ~SDMMC_INT_SDIO(slot->sdio_id)));
1187 } 1294 }
1188} 1295}
1189 1296
@@ -1954,6 +2061,23 @@ static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status)
1954 tasklet_schedule(&host->tasklet); 2061 tasklet_schedule(&host->tasklet);
1955} 2062}
1956 2063
2064static void dw_mci_handle_cd(struct dw_mci *host)
2065{
2066 int i;
2067
2068 for (i = 0; i < host->num_slots; i++) {
2069 struct dw_mci_slot *slot = host->slot[i];
2070
2071 if (!slot)
2072 continue;
2073
2074 if (slot->mmc->ops->card_event)
2075 slot->mmc->ops->card_event(slot->mmc);
2076 mmc_detect_change(slot->mmc,
2077 msecs_to_jiffies(host->pdata->detect_delay_ms));
2078 }
2079}
2080
1957static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 2081static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
1958{ 2082{
1959 struct dw_mci *host = dev_id; 2083 struct dw_mci *host = dev_id;
@@ -2029,14 +2153,15 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
2029 2153
2030 if (pending & SDMMC_INT_CD) { 2154 if (pending & SDMMC_INT_CD) {
2031 mci_writel(host, RINTSTS, SDMMC_INT_CD); 2155 mci_writel(host, RINTSTS, SDMMC_INT_CD);
2032 queue_work(host->card_workqueue, &host->card_work); 2156 dw_mci_handle_cd(host);
2033 } 2157 }
2034 2158
2035 /* Handle SDIO Interrupts */ 2159 /* Handle SDIO Interrupts */
2036 for (i = 0; i < host->num_slots; i++) { 2160 for (i = 0; i < host->num_slots; i++) {
2037 struct dw_mci_slot *slot = host->slot[i]; 2161 struct dw_mci_slot *slot = host->slot[i];
2038 if (pending & SDMMC_INT_SDIO(i)) { 2162 if (pending & SDMMC_INT_SDIO(slot->sdio_id)) {
2039 mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i)); 2163 mci_writel(host, RINTSTS,
2164 SDMMC_INT_SDIO(slot->sdio_id));
2040 mmc_signal_sdio_irq(slot->mmc); 2165 mmc_signal_sdio_irq(slot->mmc);
2041 } 2166 }
2042 } 2167 }
@@ -2045,99 +2170,28 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
2045 2170
2046#ifdef CONFIG_MMC_DW_IDMAC 2171#ifdef CONFIG_MMC_DW_IDMAC
2047 /* Handle DMA interrupts */ 2172 /* Handle DMA interrupts */
2048 pending = mci_readl(host, IDSTS); 2173 if (host->dma_64bit_address == 1) {
2049 if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { 2174 pending = mci_readl(host, IDSTS64);
2050 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); 2175 if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) {
2051 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); 2176 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI |
2052 host->dma_ops->complete(host); 2177 SDMMC_IDMAC_INT_RI);
2178 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI);
2179 host->dma_ops->complete(host);
2180 }
2181 } else {
2182 pending = mci_readl(host, IDSTS);
2183 if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) {
2184 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI |
2185 SDMMC_IDMAC_INT_RI);
2186 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI);
2187 host->dma_ops->complete(host);
2188 }
2053 } 2189 }
2054#endif 2190#endif
2055 2191
2056 return IRQ_HANDLED; 2192 return IRQ_HANDLED;
2057} 2193}
2058 2194
2059static void dw_mci_work_routine_card(struct work_struct *work)
2060{
2061 struct dw_mci *host = container_of(work, struct dw_mci, card_work);
2062 int i;
2063
2064 for (i = 0; i < host->num_slots; i++) {
2065 struct dw_mci_slot *slot = host->slot[i];
2066 struct mmc_host *mmc = slot->mmc;
2067 struct mmc_request *mrq;
2068 int present;
2069
2070 present = dw_mci_get_cd(mmc);
2071 while (present != slot->last_detect_state) {
2072 dev_dbg(&slot->mmc->class_dev, "card %s\n",
2073 present ? "inserted" : "removed");
2074
2075 spin_lock_bh(&host->lock);
2076
2077 /* Card change detected */
2078 slot->last_detect_state = present;
2079
2080 /* Clean up queue if present */
2081 mrq = slot->mrq;
2082 if (mrq) {
2083 if (mrq == host->mrq) {
2084 host->data = NULL;
2085 host->cmd = NULL;
2086
2087 switch (host->state) {
2088 case STATE_IDLE:
2089 case STATE_WAITING_CMD11_DONE:
2090 break;
2091 case STATE_SENDING_CMD11:
2092 case STATE_SENDING_CMD:
2093 mrq->cmd->error = -ENOMEDIUM;
2094 if (!mrq->data)
2095 break;
2096 /* fall through */
2097 case STATE_SENDING_DATA:
2098 mrq->data->error = -ENOMEDIUM;
2099 dw_mci_stop_dma(host);
2100 break;
2101 case STATE_DATA_BUSY:
2102 case STATE_DATA_ERROR:
2103 if (mrq->data->error == -EINPROGRESS)
2104 mrq->data->error = -ENOMEDIUM;
2105 /* fall through */
2106 case STATE_SENDING_STOP:
2107 if (mrq->stop)
2108 mrq->stop->error = -ENOMEDIUM;
2109 break;
2110 }
2111
2112 dw_mci_request_end(host, mrq);
2113 } else {
2114 list_del(&slot->queue_node);
2115 mrq->cmd->error = -ENOMEDIUM;
2116 if (mrq->data)
2117 mrq->data->error = -ENOMEDIUM;
2118 if (mrq->stop)
2119 mrq->stop->error = -ENOMEDIUM;
2120
2121 spin_unlock(&host->lock);
2122 mmc_request_done(slot->mmc, mrq);
2123 spin_lock(&host->lock);
2124 }
2125 }
2126
2127 /* Power down slot */
2128 if (present == 0)
2129 dw_mci_reset(host);
2130
2131 spin_unlock_bh(&host->lock);
2132
2133 present = dw_mci_get_cd(mmc);
2134 }
2135
2136 mmc_detect_change(slot->mmc,
2137 msecs_to_jiffies(host->pdata->detect_delay_ms));
2138 }
2139}
2140
2141#ifdef CONFIG_OF 2195#ifdef CONFIG_OF
2142/* given a slot id, find out the device node representing that slot */ 2196/* given a slot id, find out the device node representing that slot */
2143static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot) 2197static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot)
@@ -2206,6 +2260,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
2206 2260
2207 slot = mmc_priv(mmc); 2261 slot = mmc_priv(mmc);
2208 slot->id = id; 2262 slot->id = id;
2263 slot->sdio_id = host->sdio_id0 + id;
2209 slot->mmc = mmc; 2264 slot->mmc = mmc;
2210 slot->host = host; 2265 slot->host = host;
2211 host->slot[id] = slot; 2266 host->slot[id] = slot;
@@ -2289,9 +2344,6 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
2289 dw_mci_init_debugfs(slot); 2344 dw_mci_init_debugfs(slot);
2290#endif 2345#endif
2291 2346
2292 /* Card initially undetected */
2293 slot->last_detect_state = 0;
2294
2295 return 0; 2347 return 0;
2296 2348
2297err_host_allocated: 2349err_host_allocated:
@@ -2309,6 +2361,22 @@ static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id)
2309 2361
2310static void dw_mci_init_dma(struct dw_mci *host) 2362static void dw_mci_init_dma(struct dw_mci *host)
2311{ 2363{
2364 int addr_config;
2365 /* Check ADDR_CONFIG bit in HCON to find IDMAC address bus width */
2366 addr_config = (mci_readl(host, HCON) >> 27) & 0x01;
2367
2368 if (addr_config == 1) {
2369 /* host supports IDMAC in 64-bit address mode */
2370 host->dma_64bit_address = 1;
2371 dev_info(host->dev, "IDMAC supports 64-bit address mode.\n");
2372 if (!dma_set_mask(host->dev, DMA_BIT_MASK(64)))
2373 dma_set_coherent_mask(host->dev, DMA_BIT_MASK(64));
2374 } else {
2375 /* host supports IDMAC in 32-bit address mode */
2376 host->dma_64bit_address = 0;
2377 dev_info(host->dev, "IDMAC supports 32-bit address mode.\n");
2378 }
2379
2312 /* Alloc memory for sg translation */ 2380 /* Alloc memory for sg translation */
2313 host->sg_cpu = dmam_alloc_coherent(host->dev, PAGE_SIZE, 2381 host->sg_cpu = dmam_alloc_coherent(host->dev, PAGE_SIZE,
2314 &host->sg_dma, GFP_KERNEL); 2382 &host->sg_dma, GFP_KERNEL);
@@ -2672,17 +2740,10 @@ int dw_mci_probe(struct dw_mci *host)
2672 host->data_offset = DATA_240A_OFFSET; 2740 host->data_offset = DATA_240A_OFFSET;
2673 2741
2674 tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); 2742 tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host);
2675 host->card_workqueue = alloc_workqueue("dw-mci-card",
2676 WQ_MEM_RECLAIM, 1);
2677 if (!host->card_workqueue) {
2678 ret = -ENOMEM;
2679 goto err_dmaunmap;
2680 }
2681 INIT_WORK(&host->card_work, dw_mci_work_routine_card);
2682 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt, 2743 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt,
2683 host->irq_flags, "dw-mci", host); 2744 host->irq_flags, "dw-mci", host);
2684 if (ret) 2745 if (ret)
2685 goto err_workqueue; 2746 goto err_dmaunmap;
2686 2747
2687 if (host->pdata->num_slots) 2748 if (host->pdata->num_slots)
2688 host->num_slots = host->pdata->num_slots; 2749 host->num_slots = host->pdata->num_slots;
@@ -2718,7 +2779,7 @@ int dw_mci_probe(struct dw_mci *host)
2718 } else { 2779 } else {
2719 dev_dbg(host->dev, "attempted to initialize %d slots, " 2780 dev_dbg(host->dev, "attempted to initialize %d slots, "
2720 "but failed on all\n", host->num_slots); 2781 "but failed on all\n", host->num_slots);
2721 goto err_workqueue; 2782 goto err_dmaunmap;
2722 } 2783 }
2723 2784
2724 if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) 2785 if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO)
@@ -2726,9 +2787,6 @@ int dw_mci_probe(struct dw_mci *host)
2726 2787
2727 return 0; 2788 return 0;
2728 2789
2729err_workqueue:
2730 destroy_workqueue(host->card_workqueue);
2731
2732err_dmaunmap: 2790err_dmaunmap:
2733 if (host->use_dma && host->dma_ops->exit) 2791 if (host->use_dma && host->dma_ops->exit)
2734 host->dma_ops->exit(host); 2792 host->dma_ops->exit(host);
@@ -2762,8 +2820,6 @@ void dw_mci_remove(struct dw_mci *host)
2762 mci_writel(host, CLKENA, 0); 2820 mci_writel(host, CLKENA, 0);
2763 mci_writel(host, CLKSRC, 0); 2821 mci_writel(host, CLKSRC, 0);
2764 2822
2765 destroy_workqueue(host->card_workqueue);
2766
2767 if (host->use_dma && host->dma_ops->exit) 2823 if (host->use_dma && host->dma_ops->exit)
2768 host->dma_ops->exit(host); 2824 host->dma_ops->exit(host);
2769 2825
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index 01b99e8a9190..0d0f7a271d63 100644
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -55,6 +55,17 @@
55#define SDMMC_BUFADDR 0x098 55#define SDMMC_BUFADDR 0x098
56#define SDMMC_CDTHRCTL 0x100 56#define SDMMC_CDTHRCTL 0x100
57#define SDMMC_DATA(x) (x) 57#define SDMMC_DATA(x) (x)
58/*
59* Registers to support idmac 64-bit address mode
60*/
61#define SDMMC_DBADDRL 0x088
62#define SDMMC_DBADDRU 0x08c
63#define SDMMC_IDSTS64 0x090
64#define SDMMC_IDINTEN64 0x094
65#define SDMMC_DSCADDRL 0x098
66#define SDMMC_DSCADDRU 0x09c
67#define SDMMC_BUFADDRL 0x0A0
68#define SDMMC_BUFADDRU 0x0A4
58 69
59/* 70/*
60 * Data offset is difference according to Version 71 * Data offset is difference according to Version
@@ -214,7 +225,7 @@ extern int dw_mci_resume(struct dw_mci *host);
214 * with CONFIG_MMC_CLKGATE. 225 * with CONFIG_MMC_CLKGATE.
215 * @flags: Random state bits associated with the slot. 226 * @flags: Random state bits associated with the slot.
216 * @id: Number of this slot. 227 * @id: Number of this slot.
217 * @last_detect_state: Most recently observed card detect state. 228 * @sdio_id: Number of this slot in the SDIO interrupt registers.
218 */ 229 */
219struct dw_mci_slot { 230struct dw_mci_slot {
220 struct mmc_host *mmc; 231 struct mmc_host *mmc;
@@ -234,7 +245,7 @@ struct dw_mci_slot {
234#define DW_MMC_CARD_PRESENT 0 245#define DW_MMC_CARD_PRESENT 0
235#define DW_MMC_CARD_NEED_INIT 1 246#define DW_MMC_CARD_NEED_INIT 1
236 int id; 247 int id;
237 int last_detect_state; 248 int sdio_id;
238}; 249};
239 250
240struct dw_mci_tuning_data { 251struct dw_mci_tuning_data {
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 43af791e2e45..53bf7a4b5839 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -736,8 +736,15 @@ static void mmci_post_request(struct mmc_host *mmc, struct mmc_request *mrq,
736 chan = host->dma_tx_channel; 736 chan = host->dma_tx_channel;
737 dmaengine_terminate_all(chan); 737 dmaengine_terminate_all(chan);
738 738
739 if (host->dma_desc_current == next->dma_desc)
740 host->dma_desc_current = NULL;
741
742 if (host->dma_current == next->dma_chan)
743 host->dma_current = NULL;
744
739 next->dma_desc = NULL; 745 next->dma_desc = NULL;
740 next->dma_chan = NULL; 746 next->dma_chan = NULL;
747 data->host_cookie = 0;
741 } 748 }
742} 749}
743 750
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index 9405ecdaf6cf..90c60fd4ff6e 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -1360,7 +1360,7 @@ msmsdcc_probe(struct platform_device *pdev)
1360 if (ret) 1360 if (ret)
1361 goto cmd_irq_free; 1361 goto cmd_irq_free;
1362 1362
1363 mmc_set_drvdata(pdev, mmc); 1363 platform_set_drvdata(pdev, mmc);
1364 mmc_add_host(mmc); 1364 mmc_add_host(mmc);
1365 1365
1366 pr_info("%s: Qualcomm MSM SDCC at 0x%016llx irq %d,%d dma %d\n", 1366 pr_info("%s: Qualcomm MSM SDCC at 0x%016llx irq %d,%d dma %d\n",
@@ -1419,7 +1419,7 @@ ioremap_free:
1419static int 1419static int
1420msmsdcc_suspend(struct platform_device *dev, pm_message_t state) 1420msmsdcc_suspend(struct platform_device *dev, pm_message_t state)
1421{ 1421{
1422 struct mmc_host *mmc = mmc_get_drvdata(dev); 1422 struct mmc_host *mmc = platform_get_drvdata(dev);
1423 1423
1424 if (mmc) { 1424 if (mmc) {
1425 struct msmsdcc_host *host = mmc_priv(mmc); 1425 struct msmsdcc_host *host = mmc_priv(mmc);
@@ -1437,7 +1437,7 @@ msmsdcc_suspend(struct platform_device *dev, pm_message_t state)
1437static int 1437static int
1438msmsdcc_resume(struct platform_device *dev) 1438msmsdcc_resume(struct platform_device *dev)
1439{ 1439{
1440 struct mmc_host *mmc = mmc_get_drvdata(dev); 1440 struct mmc_host *mmc = platform_get_drvdata(dev);
1441 1441
1442 if (mmc) { 1442 if (mmc) {
1443 struct msmsdcc_host *host = mmc_priv(mmc); 1443 struct msmsdcc_host *host = mmc_priv(mmc);
diff --git a/drivers/mmc/host/mvsdio.c b/drivers/mmc/host/mvsdio.c
index 6b4c5ad3b393..4f8618f4522d 100644
--- a/drivers/mmc/host/mvsdio.c
+++ b/drivers/mmc/host/mvsdio.c
@@ -111,10 +111,15 @@ static int mvsd_setup_data(struct mvsd_host *host, struct mmc_data *data)
111 mvsd_write(MVSD_BLK_COUNT, data->blocks); 111 mvsd_write(MVSD_BLK_COUNT, data->blocks);
112 mvsd_write(MVSD_BLK_SIZE, data->blksz); 112 mvsd_write(MVSD_BLK_SIZE, data->blksz);
113 113
114 if (nodma || (data->blksz | data->sg->offset) & 3) { 114 if (nodma || (data->blksz | data->sg->offset) & 3 ||
115 ((!(data->flags & MMC_DATA_READ) && data->sg->offset & 0x3f))) {
115 /* 116 /*
116 * We cannot do DMA on a buffer which offset or size 117 * We cannot do DMA on a buffer which offset or size
117 * is not aligned on a 4-byte boundary. 118 * is not aligned on a 4-byte boundary.
119 *
120 * It also appears the host to card DMA can corrupt
121 * data when the buffer is not aligned on a 64 byte
122 * boundary.
118 */ 123 */
119 host->pio_size = data->blocks * data->blksz; 124 host->pio_size = data->blocks * data->blksz;
120 host->pio_ptr = sg_virt(data->sg); 125 host->pio_ptr = sg_virt(data->sg);
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c
index ad111422ad55..5316d9b9e7b4 100644
--- a/drivers/mmc/host/mxcmmc.c
+++ b/drivers/mmc/host/mxcmmc.c
@@ -373,13 +373,9 @@ static void mxcmci_dma_callback(void *data)
373 del_timer(&host->watchdog); 373 del_timer(&host->watchdog);
374 374
375 stat = mxcmci_readl(host, MMC_REG_STATUS); 375 stat = mxcmci_readl(host, MMC_REG_STATUS);
376 mxcmci_writel(host, stat & ~STATUS_DATA_TRANS_DONE, MMC_REG_STATUS);
377 376
378 dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat); 377 dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat);
379 378
380 if (stat & STATUS_READ_OP_DONE)
381 mxcmci_writel(host, STATUS_READ_OP_DONE, MMC_REG_STATUS);
382
383 mxcmci_data_done(host, stat); 379 mxcmci_data_done(host, stat);
384} 380}
385 381
@@ -743,10 +739,8 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
743 sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio; 739 sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio;
744 spin_unlock_irqrestore(&host->lock, flags); 740 spin_unlock_irqrestore(&host->lock, flags);
745 741
746 if (mxcmci_use_dma(host) && 742 if (mxcmci_use_dma(host) && (stat & (STATUS_WRITE_OP_DONE)))
747 (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE))) 743 mxcmci_writel(host, STATUS_WRITE_OP_DONE, MMC_REG_STATUS);
748 mxcmci_writel(host, STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
749 MMC_REG_STATUS);
750 744
751 if (sdio_irq) { 745 if (sdio_irq) {
752 mxcmci_writel(host, STATUS_SDIO_INT_ACTIVE, MMC_REG_STATUS); 746 mxcmci_writel(host, STATUS_SDIO_INT_ACTIVE, MMC_REG_STATUS);
@@ -756,8 +750,7 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
756 if (stat & STATUS_END_CMD_RESP) 750 if (stat & STATUS_END_CMD_RESP)
757 mxcmci_cmd_done(host, stat); 751 mxcmci_cmd_done(host, stat);
758 752
759 if (mxcmci_use_dma(host) && 753 if (mxcmci_use_dma(host) && (stat & STATUS_WRITE_OP_DONE)) {
760 (stat & (STATUS_DATA_TRANS_DONE | STATUS_WRITE_OP_DONE))) {
761 del_timer(&host->watchdog); 754 del_timer(&host->watchdog);
762 mxcmci_data_done(host, stat); 755 mxcmci_data_done(host, stat);
763 } 756 }
@@ -1084,12 +1077,14 @@ static int mxcmci_probe(struct platform_device *pdev)
1084 dat3_card_detect = true; 1077 dat3_card_detect = true;
1085 1078
1086 ret = mmc_regulator_get_supply(mmc); 1079 ret = mmc_regulator_get_supply(mmc);
1087 if (ret) { 1080 if (ret == -EPROBE_DEFER)
1088 if (pdata && ret != -EPROBE_DEFER) 1081 goto out_free;
1089 mmc->ocr_avail = pdata->ocr_avail ? : 1082
1090 MMC_VDD_32_33 | MMC_VDD_33_34; 1083 if (!mmc->ocr_avail) {
1084 if (pdata && pdata->ocr_avail)
1085 mmc->ocr_avail = pdata->ocr_avail;
1091 else 1086 else
1092 goto out_free; 1087 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1093 } 1088 }
1094 1089
1095 if (dat3_card_detect) 1090 if (dat3_card_detect)
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index cd74e5143c36..60c4ca97a727 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -581,10 +581,9 @@ static int mxs_mmc_probe(struct platform_device *pdev)
581 struct regulator *reg_vmmc; 581 struct regulator *reg_vmmc;
582 struct mxs_ssp *ssp; 582 struct mxs_ssp *ssp;
583 583
584 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
585 irq_err = platform_get_irq(pdev, 0); 584 irq_err = platform_get_irq(pdev, 0);
586 if (!iores || irq_err < 0) 585 if (irq_err < 0)
587 return -EINVAL; 586 return irq_err;
588 587
589 mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev); 588 mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev);
590 if (!mmc) 589 if (!mmc)
@@ -593,6 +592,7 @@ static int mxs_mmc_probe(struct platform_device *pdev)
593 host = mmc_priv(mmc); 592 host = mmc_priv(mmc);
594 ssp = &host->ssp; 593 ssp = &host->ssp;
595 ssp->dev = &pdev->dev; 594 ssp->dev = &pdev->dev;
595 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
596 ssp->base = devm_ioremap_resource(&pdev->dev, iores); 596 ssp->base = devm_ioremap_resource(&pdev->dev, iores);
597 if (IS_ERR(ssp->base)) { 597 if (IS_ERR(ssp->base)) {
598 ret = PTR_ERR(ssp->base); 598 ret = PTR_ERR(ssp->base);
@@ -619,7 +619,9 @@ static int mxs_mmc_probe(struct platform_device *pdev)
619 ret = PTR_ERR(ssp->clk); 619 ret = PTR_ERR(ssp->clk);
620 goto out_mmc_free; 620 goto out_mmc_free;
621 } 621 }
622 clk_prepare_enable(ssp->clk); 622 ret = clk_prepare_enable(ssp->clk);
623 if (ret)
624 goto out_mmc_free;
623 625
624 ret = mxs_mmc_reset(host); 626 ret = mxs_mmc_reset(host);
625 if (ret) { 627 if (ret) {
@@ -660,7 +662,7 @@ static int mxs_mmc_probe(struct platform_device *pdev)
660 platform_set_drvdata(pdev, mmc); 662 platform_set_drvdata(pdev, mmc);
661 663
662 ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0, 664 ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0,
663 DRIVER_NAME, host); 665 dev_name(&pdev->dev), host);
664 if (ret) 666 if (ret)
665 goto out_free_dma; 667 goto out_free_dma;
666 668
@@ -702,7 +704,7 @@ static int mxs_mmc_remove(struct platform_device *pdev)
702 return 0; 704 return 0;
703} 705}
704 706
705#ifdef CONFIG_PM 707#ifdef CONFIG_PM_SLEEP
706static int mxs_mmc_suspend(struct device *dev) 708static int mxs_mmc_suspend(struct device *dev)
707{ 709{
708 struct mmc_host *mmc = dev_get_drvdata(dev); 710 struct mmc_host *mmc = dev_get_drvdata(dev);
@@ -719,25 +721,19 @@ static int mxs_mmc_resume(struct device *dev)
719 struct mxs_mmc_host *host = mmc_priv(mmc); 721 struct mxs_mmc_host *host = mmc_priv(mmc);
720 struct mxs_ssp *ssp = &host->ssp; 722 struct mxs_ssp *ssp = &host->ssp;
721 723
722 clk_prepare_enable(ssp->clk); 724 return clk_prepare_enable(ssp->clk);
723 return 0;
724} 725}
725
726static const struct dev_pm_ops mxs_mmc_pm_ops = {
727 .suspend = mxs_mmc_suspend,
728 .resume = mxs_mmc_resume,
729};
730#endif 726#endif
731 727
728static SIMPLE_DEV_PM_OPS(mxs_mmc_pm_ops, mxs_mmc_suspend, mxs_mmc_resume);
729
732static struct platform_driver mxs_mmc_driver = { 730static struct platform_driver mxs_mmc_driver = {
733 .probe = mxs_mmc_probe, 731 .probe = mxs_mmc_probe,
734 .remove = mxs_mmc_remove, 732 .remove = mxs_mmc_remove,
735 .id_table = mxs_ssp_ids, 733 .id_table = mxs_ssp_ids,
736 .driver = { 734 .driver = {
737 .name = DRIVER_NAME, 735 .name = DRIVER_NAME,
738#ifdef CONFIG_PM
739 .pm = &mxs_mmc_pm_ops, 736 .pm = &mxs_mmc_pm_ops,
740#endif
741 .of_match_table = mxs_mmc_dt_ids, 737 .of_match_table = mxs_mmc_dt_ids,
742 }, 738 },
743}; 739};
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index df27bb4fc098..7c71dcdcba8b 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -42,7 +42,7 @@
42#include <linux/regulator/consumer.h> 42#include <linux/regulator/consumer.h>
43#include <linux/pinctrl/consumer.h> 43#include <linux/pinctrl/consumer.h>
44#include <linux/pm_runtime.h> 44#include <linux/pm_runtime.h>
45#include <linux/platform_data/mmc-omap.h> 45#include <linux/platform_data/hsmmc-omap.h>
46 46
47/* OMAP HSMMC Host Controller Registers */ 47/* OMAP HSMMC Host Controller Registers */
48#define OMAP_HSMMC_SYSSTATUS 0x0014 48#define OMAP_HSMMC_SYSSTATUS 0x0014
@@ -155,7 +155,7 @@
155 * omap.c controller driver. Luckily this is not currently done on any known 155 * omap.c controller driver. Luckily this is not currently done on any known
156 * omap_hsmmc.c device. 156 * omap_hsmmc.c device.
157 */ 157 */
158#define mmc_slot(host) (host->pdata->slots[host->slot_id]) 158#define mmc_pdata(host) host->pdata
159 159
160/* 160/*
161 * MMC Host controller read/write API's 161 * MMC Host controller read/write API's
@@ -207,7 +207,6 @@ struct omap_hsmmc_host {
207 int use_dma, dma_ch; 207 int use_dma, dma_ch;
208 struct dma_chan *tx_chan; 208 struct dma_chan *tx_chan;
209 struct dma_chan *rx_chan; 209 struct dma_chan *rx_chan;
210 int slot_id;
211 int response_busy; 210 int response_busy;
212 int context_loss; 211 int context_loss;
213 int protect_card; 212 int protect_card;
@@ -220,7 +219,26 @@ struct omap_hsmmc_host {
220#define HSMMC_SDIO_IRQ_ENABLED (1 << 1) /* SDIO irq enabled */ 219#define HSMMC_SDIO_IRQ_ENABLED (1 << 1) /* SDIO irq enabled */
221#define HSMMC_WAKE_IRQ_ENABLED (1 << 2) 220#define HSMMC_WAKE_IRQ_ENABLED (1 << 2)
222 struct omap_hsmmc_next next_data; 221 struct omap_hsmmc_next next_data;
223 struct omap_mmc_platform_data *pdata; 222 struct omap_hsmmc_platform_data *pdata;
223
224 /* To handle board related suspend/resume functionality for MMC */
225 int (*suspend)(struct device *dev);
226 int (*resume)(struct device *dev);
227
228 /* return MMC cover switch state, can be NULL if not supported.
229 *
230 * possible return values:
231 * 0 - closed
232 * 1 - open
233 */
234 int (*get_cover_state)(struct device *dev);
235
236 /* Card detection IRQs */
237 int card_detect_irq;
238
239 int (*card_detect)(struct device *dev);
240 int (*get_ro)(struct device *dev);
241
224}; 242};
225 243
226struct omap_mmc_of_data { 244struct omap_mmc_of_data {
@@ -230,50 +248,48 @@ struct omap_mmc_of_data {
230 248
231static void omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host); 249static void omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host);
232 250
233static int omap_hsmmc_card_detect(struct device *dev, int slot) 251static int omap_hsmmc_card_detect(struct device *dev)
234{ 252{
235 struct omap_hsmmc_host *host = dev_get_drvdata(dev); 253 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
236 struct omap_mmc_platform_data *mmc = host->pdata; 254 struct omap_hsmmc_platform_data *mmc = host->pdata;
237 255
238 /* NOTE: assumes card detect signal is active-low */ 256 /* NOTE: assumes card detect signal is active-low */
239 return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 257 return !gpio_get_value_cansleep(mmc->switch_pin);
240} 258}
241 259
242static int omap_hsmmc_get_wp(struct device *dev, int slot) 260static int omap_hsmmc_get_wp(struct device *dev)
243{ 261{
244 struct omap_hsmmc_host *host = dev_get_drvdata(dev); 262 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
245 struct omap_mmc_platform_data *mmc = host->pdata; 263 struct omap_hsmmc_platform_data *mmc = host->pdata;
246 264
247 /* NOTE: assumes write protect signal is active-high */ 265 /* NOTE: assumes write protect signal is active-high */
248 return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 266 return gpio_get_value_cansleep(mmc->gpio_wp);
249} 267}
250 268
251static int omap_hsmmc_get_cover_state(struct device *dev, int slot) 269static int omap_hsmmc_get_cover_state(struct device *dev)
252{ 270{
253 struct omap_hsmmc_host *host = dev_get_drvdata(dev); 271 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
254 struct omap_mmc_platform_data *mmc = host->pdata; 272 struct omap_hsmmc_platform_data *mmc = host->pdata;
255 273
256 /* NOTE: assumes card detect signal is active-low */ 274 /* NOTE: assumes card detect signal is active-low */
257 return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 275 return !gpio_get_value_cansleep(mmc->switch_pin);
258} 276}
259 277
260#ifdef CONFIG_PM 278#ifdef CONFIG_PM
261 279
262static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) 280static int omap_hsmmc_suspend_cdirq(struct device *dev)
263{ 281{
264 struct omap_hsmmc_host *host = dev_get_drvdata(dev); 282 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
265 struct omap_mmc_platform_data *mmc = host->pdata;
266 283
267 disable_irq(mmc->slots[0].card_detect_irq); 284 disable_irq(host->card_detect_irq);
268 return 0; 285 return 0;
269} 286}
270 287
271static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) 288static int omap_hsmmc_resume_cdirq(struct device *dev)
272{ 289{
273 struct omap_hsmmc_host *host = dev_get_drvdata(dev); 290 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
274 struct omap_mmc_platform_data *mmc = host->pdata;
275 291
276 enable_irq(mmc->slots[0].card_detect_irq); 292 enable_irq(host->card_detect_irq);
277 return 0; 293 return 0;
278} 294}
279 295
@@ -286,8 +302,7 @@ static int omap_hsmmc_resume_cdirq(struct device *dev, int slot)
286 302
287#ifdef CONFIG_REGULATOR 303#ifdef CONFIG_REGULATOR
288 304
289static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on, 305static int omap_hsmmc_set_power(struct device *dev, int power_on, int vdd)
290 int vdd)
291{ 306{
292 struct omap_hsmmc_host *host = 307 struct omap_hsmmc_host *host =
293 platform_get_drvdata(to_platform_device(dev)); 308 platform_get_drvdata(to_platform_device(dev));
@@ -300,8 +315,8 @@ static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on,
300 if (!host->vcc) 315 if (!host->vcc)
301 return 0; 316 return 0;
302 317
303 if (mmc_slot(host).before_set_reg) 318 if (mmc_pdata(host)->before_set_reg)
304 mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 319 mmc_pdata(host)->before_set_reg(dev, power_on, vdd);
305 320
306 if (host->pbias) { 321 if (host->pbias) {
307 if (host->pbias_enabled == 1) { 322 if (host->pbias_enabled == 1) {
@@ -363,8 +378,8 @@ static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on,
363 } 378 }
364 } 379 }
365 380
366 if (mmc_slot(host).after_set_reg) 381 if (mmc_pdata(host)->after_set_reg)
367 mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 382 mmc_pdata(host)->after_set_reg(dev, power_on, vdd);
368 383
369error_set_power: 384error_set_power:
370 return ret; 385 return ret;
@@ -383,18 +398,18 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
383 } else { 398 } else {
384 host->vcc = reg; 399 host->vcc = reg;
385 ocr_value = mmc_regulator_get_ocrmask(reg); 400 ocr_value = mmc_regulator_get_ocrmask(reg);
386 if (!mmc_slot(host).ocr_mask) { 401 if (!mmc_pdata(host)->ocr_mask) {
387 mmc_slot(host).ocr_mask = ocr_value; 402 mmc_pdata(host)->ocr_mask = ocr_value;
388 } else { 403 } else {
389 if (!(mmc_slot(host).ocr_mask & ocr_value)) { 404 if (!(mmc_pdata(host)->ocr_mask & ocr_value)) {
390 dev_err(host->dev, "ocrmask %x is not supported\n", 405 dev_err(host->dev, "ocrmask %x is not supported\n",
391 mmc_slot(host).ocr_mask); 406 mmc_pdata(host)->ocr_mask);
392 mmc_slot(host).ocr_mask = 0; 407 mmc_pdata(host)->ocr_mask = 0;
393 return -EINVAL; 408 return -EINVAL;
394 } 409 }
395 } 410 }
396 } 411 }
397 mmc_slot(host).set_power = omap_hsmmc_set_power; 412 mmc_pdata(host)->set_power = omap_hsmmc_set_power;
398 413
399 /* Allow an aux regulator */ 414 /* Allow an aux regulator */
400 reg = devm_regulator_get_optional(host->dev, "vmmc_aux"); 415 reg = devm_regulator_get_optional(host->dev, "vmmc_aux");
@@ -404,7 +419,7 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
404 host->pbias = IS_ERR(reg) ? NULL : reg; 419 host->pbias = IS_ERR(reg) ? NULL : reg;
405 420
406 /* For eMMC do not power off when not in sleep state */ 421 /* For eMMC do not power off when not in sleep state */
407 if (mmc_slot(host).no_regulator_off_init) 422 if (mmc_pdata(host)->no_regulator_off_init)
408 return 0; 423 return 0;
409 /* 424 /*
410 * To disable boot_on regulator, enable regulator 425 * To disable boot_on regulator, enable regulator
@@ -412,10 +427,10 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
412 */ 427 */
413 if ((host->vcc && regulator_is_enabled(host->vcc) > 0) || 428 if ((host->vcc && regulator_is_enabled(host->vcc) > 0) ||
414 (host->vcc_aux && regulator_is_enabled(host->vcc_aux))) { 429 (host->vcc_aux && regulator_is_enabled(host->vcc_aux))) {
415 int vdd = ffs(mmc_slot(host).ocr_mask) - 1; 430 int vdd = ffs(mmc_pdata(host)->ocr_mask) - 1;
416 431
417 mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd); 432 mmc_pdata(host)->set_power(host->dev, 1, vdd);
418 mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 433 mmc_pdata(host)->set_power(host->dev, 0, 0);
419 } 434 }
420 435
421 return 0; 436 return 0;
@@ -423,7 +438,7 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
423 438
424static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 439static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host)
425{ 440{
426 mmc_slot(host).set_power = NULL; 441 mmc_pdata(host)->set_power = NULL;
427} 442}
428 443
429static inline int omap_hsmmc_have_reg(void) 444static inline int omap_hsmmc_have_reg(void)
@@ -449,55 +464,59 @@ static inline int omap_hsmmc_have_reg(void)
449 464
450#endif 465#endif
451 466
452static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata) 467static int omap_hsmmc_gpio_init(struct omap_hsmmc_host *host,
468 struct omap_hsmmc_platform_data *pdata)
453{ 469{
454 int ret; 470 int ret;
455 471
456 if (gpio_is_valid(pdata->slots[0].switch_pin)) { 472 if (gpio_is_valid(pdata->switch_pin)) {
457 if (pdata->slots[0].cover) 473 if (pdata->cover)
458 pdata->slots[0].get_cover_state = 474 host->get_cover_state =
459 omap_hsmmc_get_cover_state; 475 omap_hsmmc_get_cover_state;
460 else 476 else
461 pdata->slots[0].card_detect = omap_hsmmc_card_detect; 477 host->card_detect = omap_hsmmc_card_detect;
462 pdata->slots[0].card_detect_irq = 478 host->card_detect_irq =
463 gpio_to_irq(pdata->slots[0].switch_pin); 479 gpio_to_irq(pdata->switch_pin);
464 ret = gpio_request(pdata->slots[0].switch_pin, "mmc_cd"); 480 ret = gpio_request(pdata->switch_pin, "mmc_cd");
465 if (ret) 481 if (ret)
466 return ret; 482 return ret;
467 ret = gpio_direction_input(pdata->slots[0].switch_pin); 483 ret = gpio_direction_input(pdata->switch_pin);
468 if (ret) 484 if (ret)
469 goto err_free_sp; 485 goto err_free_sp;
470 } else 486 } else {
471 pdata->slots[0].switch_pin = -EINVAL; 487 pdata->switch_pin = -EINVAL;
488 }
472 489
473 if (gpio_is_valid(pdata->slots[0].gpio_wp)) { 490 if (gpio_is_valid(pdata->gpio_wp)) {
474 pdata->slots[0].get_ro = omap_hsmmc_get_wp; 491 host->get_ro = omap_hsmmc_get_wp;
475 ret = gpio_request(pdata->slots[0].gpio_wp, "mmc_wp"); 492 ret = gpio_request(pdata->gpio_wp, "mmc_wp");
476 if (ret) 493 if (ret)
477 goto err_free_cd; 494 goto err_free_cd;
478 ret = gpio_direction_input(pdata->slots[0].gpio_wp); 495 ret = gpio_direction_input(pdata->gpio_wp);
479 if (ret) 496 if (ret)
480 goto err_free_wp; 497 goto err_free_wp;
481 } else 498 } else {
482 pdata->slots[0].gpio_wp = -EINVAL; 499 pdata->gpio_wp = -EINVAL;
500 }
483 501
484 return 0; 502 return 0;
485 503
486err_free_wp: 504err_free_wp:
487 gpio_free(pdata->slots[0].gpio_wp); 505 gpio_free(pdata->gpio_wp);
488err_free_cd: 506err_free_cd:
489 if (gpio_is_valid(pdata->slots[0].switch_pin)) 507 if (gpio_is_valid(pdata->switch_pin))
490err_free_sp: 508err_free_sp:
491 gpio_free(pdata->slots[0].switch_pin); 509 gpio_free(pdata->switch_pin);
492 return ret; 510 return ret;
493} 511}
494 512
495static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) 513static void omap_hsmmc_gpio_free(struct omap_hsmmc_host *host,
514 struct omap_hsmmc_platform_data *pdata)
496{ 515{
497 if (gpio_is_valid(pdata->slots[0].gpio_wp)) 516 if (gpio_is_valid(pdata->gpio_wp))
498 gpio_free(pdata->slots[0].gpio_wp); 517 gpio_free(pdata->gpio_wp);
499 if (gpio_is_valid(pdata->slots[0].switch_pin)) 518 if (gpio_is_valid(pdata->switch_pin))
500 gpio_free(pdata->slots[0].switch_pin); 519 gpio_free(pdata->switch_pin);
501} 520}
502 521
503/* 522/*
@@ -607,8 +626,9 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
607 * in capabilities register 626 * in capabilities register
608 * - MMC/SD clock coming out of controller > 25MHz 627 * - MMC/SD clock coming out of controller > 25MHz
609 */ 628 */
610 if ((mmc_slot(host).features & HSMMC_HAS_HSPE_SUPPORT) && 629 if ((mmc_pdata(host)->features & HSMMC_HAS_HSPE_SUPPORT) &&
611 (ios->timing != MMC_TIMING_MMC_DDR52) && 630 (ios->timing != MMC_TIMING_MMC_DDR52) &&
631 (ios->timing != MMC_TIMING_UHS_DDR50) &&
612 ((OMAP_HSMMC_READ(host->base, CAPA) & HSS) == HSS)) { 632 ((OMAP_HSMMC_READ(host->base, CAPA) & HSS) == HSS)) {
613 regval = OMAP_HSMMC_READ(host->base, HCTL); 633 regval = OMAP_HSMMC_READ(host->base, HCTL);
614 if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000) 634 if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000)
@@ -628,7 +648,8 @@ static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host)
628 u32 con; 648 u32 con;
629 649
630 con = OMAP_HSMMC_READ(host->base, CON); 650 con = OMAP_HSMMC_READ(host->base, CON);
631 if (ios->timing == MMC_TIMING_MMC_DDR52) 651 if (ios->timing == MMC_TIMING_MMC_DDR52 ||
652 ios->timing == MMC_TIMING_UHS_DDR50)
632 con |= DDR; /* configure in DDR mode */ 653 con |= DDR; /* configure in DDR mode */
633 else 654 else
634 con &= ~DDR; 655 con &= ~DDR;
@@ -791,8 +812,8 @@ int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host)
791{ 812{
792 int r = 1; 813 int r = 1;
793 814
794 if (mmc_slot(host).get_cover_state) 815 if (host->get_cover_state)
795 r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 816 r = host->get_cover_state(host->dev);
796 return r; 817 return r;
797} 818}
798 819
@@ -816,7 +837,7 @@ omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr,
816 struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 837 struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev);
817 struct omap_hsmmc_host *host = mmc_priv(mmc); 838 struct omap_hsmmc_host *host = mmc_priv(mmc);
818 839
819 return sprintf(buf, "%s\n", mmc_slot(host).name); 840 return sprintf(buf, "%s\n", mmc_pdata(host)->name);
820} 841}
821 842
822static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 843static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL);
@@ -1061,7 +1082,7 @@ static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host,
1061 * OMAP4 ES2 and greater has an updated reset logic. 1082 * OMAP4 ES2 and greater has an updated reset logic.
1062 * Monitor a 0->1 transition first 1083 * Monitor a 0->1 transition first
1063 */ 1084 */
1064 if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) { 1085 if (mmc_pdata(host)->features & HSMMC_HAS_UPDATED_RESET) {
1065 while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) 1086 while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit))
1066 && (i++ < limit)) 1087 && (i++ < limit))
1067 udelay(1); 1088 udelay(1);
@@ -1210,12 +1231,11 @@ static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd)
1210 clk_disable_unprepare(host->dbclk); 1231 clk_disable_unprepare(host->dbclk);
1211 1232
1212 /* Turn the power off */ 1233 /* Turn the power off */
1213 ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 1234 ret = mmc_pdata(host)->set_power(host->dev, 0, 0);
1214 1235
1215 /* Turn the power ON with given VDD 1.8 or 3.0v */ 1236 /* Turn the power ON with given VDD 1.8 or 3.0v */
1216 if (!ret) 1237 if (!ret)
1217 ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 1238 ret = mmc_pdata(host)->set_power(host->dev, 1, vdd);
1218 vdd);
1219 pm_runtime_get_sync(host->dev); 1239 pm_runtime_get_sync(host->dev);
1220 if (host->dbclk) 1240 if (host->dbclk)
1221 clk_prepare_enable(host->dbclk); 1241 clk_prepare_enable(host->dbclk);
@@ -1259,11 +1279,11 @@ err:
1259/* Protect the card while the cover is open */ 1279/* Protect the card while the cover is open */
1260static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 1280static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host)
1261{ 1281{
1262 if (!mmc_slot(host).get_cover_state) 1282 if (!host->get_cover_state)
1263 return; 1283 return;
1264 1284
1265 host->reqs_blocked = 0; 1285 host->reqs_blocked = 0;
1266 if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 1286 if (host->get_cover_state(host->dev)) {
1267 if (host->protect_card) { 1287 if (host->protect_card) {
1268 dev_info(host->dev, "%s: cover is closed, " 1288 dev_info(host->dev, "%s: cover is closed, "
1269 "card is now accessible\n", 1289 "card is now accessible\n",
@@ -1286,13 +1306,12 @@ static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host)
1286static irqreturn_t omap_hsmmc_detect(int irq, void *dev_id) 1306static irqreturn_t omap_hsmmc_detect(int irq, void *dev_id)
1287{ 1307{
1288 struct omap_hsmmc_host *host = dev_id; 1308 struct omap_hsmmc_host *host = dev_id;
1289 struct omap_mmc_slot_data *slot = &mmc_slot(host);
1290 int carddetect; 1309 int carddetect;
1291 1310
1292 sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 1311 sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch");
1293 1312
1294 if (slot->card_detect) 1313 if (host->card_detect)
1295 carddetect = slot->card_detect(host->dev, host->slot_id); 1314 carddetect = host->card_detect(host->dev);
1296 else { 1315 else {
1297 omap_hsmmc_protect_card(host); 1316 omap_hsmmc_protect_card(host);
1298 carddetect = -ENOSYS; 1317 carddetect = -ENOSYS;
@@ -1618,12 +1637,10 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1618 if (ios->power_mode != host->power_mode) { 1637 if (ios->power_mode != host->power_mode) {
1619 switch (ios->power_mode) { 1638 switch (ios->power_mode) {
1620 case MMC_POWER_OFF: 1639 case MMC_POWER_OFF:
1621 mmc_slot(host).set_power(host->dev, host->slot_id, 1640 mmc_pdata(host)->set_power(host->dev, 0, 0);
1622 0, 0);
1623 break; 1641 break;
1624 case MMC_POWER_UP: 1642 case MMC_POWER_UP:
1625 mmc_slot(host).set_power(host->dev, host->slot_id, 1643 mmc_pdata(host)->set_power(host->dev, 1, ios->vdd);
1626 1, ios->vdd);
1627 break; 1644 break;
1628 case MMC_POWER_ON: 1645 case MMC_POWER_ON:
1629 do_send_init_stream = 1; 1646 do_send_init_stream = 1;
@@ -1668,26 +1685,26 @@ static int omap_hsmmc_get_cd(struct mmc_host *mmc)
1668{ 1685{
1669 struct omap_hsmmc_host *host = mmc_priv(mmc); 1686 struct omap_hsmmc_host *host = mmc_priv(mmc);
1670 1687
1671 if (!mmc_slot(host).card_detect) 1688 if (!host->card_detect)
1672 return -ENOSYS; 1689 return -ENOSYS;
1673 return mmc_slot(host).card_detect(host->dev, host->slot_id); 1690 return host->card_detect(host->dev);
1674} 1691}
1675 1692
1676static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1693static int omap_hsmmc_get_ro(struct mmc_host *mmc)
1677{ 1694{
1678 struct omap_hsmmc_host *host = mmc_priv(mmc); 1695 struct omap_hsmmc_host *host = mmc_priv(mmc);
1679 1696
1680 if (!mmc_slot(host).get_ro) 1697 if (!host->get_ro)
1681 return -ENOSYS; 1698 return -ENOSYS;
1682 return mmc_slot(host).get_ro(host->dev, 0); 1699 return host->get_ro(host->dev);
1683} 1700}
1684 1701
1685static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card) 1702static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card)
1686{ 1703{
1687 struct omap_hsmmc_host *host = mmc_priv(mmc); 1704 struct omap_hsmmc_host *host = mmc_priv(mmc);
1688 1705
1689 if (mmc_slot(host).init_card) 1706 if (mmc_pdata(host)->init_card)
1690 mmc_slot(host).init_card(card); 1707 mmc_pdata(host)->init_card(card);
1691} 1708}
1692 1709
1693static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 1710static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
@@ -1957,9 +1974,9 @@ static const struct of_device_id omap_mmc_of_match[] = {
1957}; 1974};
1958MODULE_DEVICE_TABLE(of, omap_mmc_of_match); 1975MODULE_DEVICE_TABLE(of, omap_mmc_of_match);
1959 1976
1960static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev) 1977static struct omap_hsmmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
1961{ 1978{
1962 struct omap_mmc_platform_data *pdata; 1979 struct omap_hsmmc_platform_data *pdata;
1963 struct device_node *np = dev->of_node; 1980 struct device_node *np = dev->of_node;
1964 u32 bus_width, max_freq; 1981 u32 bus_width, max_freq;
1965 int cd_gpio, wp_gpio; 1982 int cd_gpio, wp_gpio;
@@ -1976,40 +1993,38 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
1976 if (of_find_property(np, "ti,dual-volt", NULL)) 1993 if (of_find_property(np, "ti,dual-volt", NULL))
1977 pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT; 1994 pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT;
1978 1995
1979 /* This driver only supports 1 slot */ 1996 pdata->switch_pin = cd_gpio;
1980 pdata->nr_slots = 1; 1997 pdata->gpio_wp = wp_gpio;
1981 pdata->slots[0].switch_pin = cd_gpio;
1982 pdata->slots[0].gpio_wp = wp_gpio;
1983 1998
1984 if (of_find_property(np, "ti,non-removable", NULL)) { 1999 if (of_find_property(np, "ti,non-removable", NULL)) {
1985 pdata->slots[0].nonremovable = true; 2000 pdata->nonremovable = true;
1986 pdata->slots[0].no_regulator_off_init = true; 2001 pdata->no_regulator_off_init = true;
1987 } 2002 }
1988 of_property_read_u32(np, "bus-width", &bus_width); 2003 of_property_read_u32(np, "bus-width", &bus_width);
1989 if (bus_width == 4) 2004 if (bus_width == 4)
1990 pdata->slots[0].caps |= MMC_CAP_4_BIT_DATA; 2005 pdata->caps |= MMC_CAP_4_BIT_DATA;
1991 else if (bus_width == 8) 2006 else if (bus_width == 8)
1992 pdata->slots[0].caps |= MMC_CAP_8_BIT_DATA; 2007 pdata->caps |= MMC_CAP_8_BIT_DATA;
1993 2008
1994 if (of_find_property(np, "ti,needs-special-reset", NULL)) 2009 if (of_find_property(np, "ti,needs-special-reset", NULL))
1995 pdata->slots[0].features |= HSMMC_HAS_UPDATED_RESET; 2010 pdata->features |= HSMMC_HAS_UPDATED_RESET;
1996 2011
1997 if (!of_property_read_u32(np, "max-frequency", &max_freq)) 2012 if (!of_property_read_u32(np, "max-frequency", &max_freq))
1998 pdata->max_freq = max_freq; 2013 pdata->max_freq = max_freq;
1999 2014
2000 if (of_find_property(np, "ti,needs-special-hs-handling", NULL)) 2015 if (of_find_property(np, "ti,needs-special-hs-handling", NULL))
2001 pdata->slots[0].features |= HSMMC_HAS_HSPE_SUPPORT; 2016 pdata->features |= HSMMC_HAS_HSPE_SUPPORT;
2002 2017
2003 if (of_find_property(np, "keep-power-in-suspend", NULL)) 2018 if (of_find_property(np, "keep-power-in-suspend", NULL))
2004 pdata->slots[0].pm_caps |= MMC_PM_KEEP_POWER; 2019 pdata->pm_caps |= MMC_PM_KEEP_POWER;
2005 2020
2006 if (of_find_property(np, "enable-sdio-wakeup", NULL)) 2021 if (of_find_property(np, "enable-sdio-wakeup", NULL))
2007 pdata->slots[0].pm_caps |= MMC_PM_WAKE_SDIO_IRQ; 2022 pdata->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
2008 2023
2009 return pdata; 2024 return pdata;
2010} 2025}
2011#else 2026#else
2012static inline struct omap_mmc_platform_data 2027static inline struct omap_hsmmc_platform_data
2013 *of_get_hsmmc_pdata(struct device *dev) 2028 *of_get_hsmmc_pdata(struct device *dev)
2014{ 2029{
2015 return ERR_PTR(-EINVAL); 2030 return ERR_PTR(-EINVAL);
@@ -2018,7 +2033,7 @@ static inline struct omap_mmc_platform_data
2018 2033
2019static int omap_hsmmc_probe(struct platform_device *pdev) 2034static int omap_hsmmc_probe(struct platform_device *pdev)
2020{ 2035{
2021 struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 2036 struct omap_hsmmc_platform_data *pdata = pdev->dev.platform_data;
2022 struct mmc_host *mmc; 2037 struct mmc_host *mmc;
2023 struct omap_hsmmc_host *host = NULL; 2038 struct omap_hsmmc_host *host = NULL;
2024 struct resource *res; 2039 struct resource *res;
@@ -2048,11 +2063,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
2048 return -ENXIO; 2063 return -ENXIO;
2049 } 2064 }
2050 2065
2051 if (pdata->nr_slots == 0) {
2052 dev_err(&pdev->dev, "No Slots\n");
2053 return -ENXIO;
2054 }
2055
2056 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2066 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2057 irq = platform_get_irq(pdev, 0); 2067 irq = platform_get_irq(pdev, 0);
2058 if (res == NULL || irq < 0) 2068 if (res == NULL || irq < 0)
@@ -2062,14 +2072,10 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
2062 if (IS_ERR(base)) 2072 if (IS_ERR(base))
2063 return PTR_ERR(base); 2073 return PTR_ERR(base);
2064 2074
2065 ret = omap_hsmmc_gpio_init(pdata);
2066 if (ret)
2067 goto err;
2068
2069 mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 2075 mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev);
2070 if (!mmc) { 2076 if (!mmc) {
2071 ret = -ENOMEM; 2077 ret = -ENOMEM;
2072 goto err_alloc; 2078 goto err;
2073 } 2079 }
2074 2080
2075 host = mmc_priv(mmc); 2081 host = mmc_priv(mmc);
@@ -2079,13 +2085,16 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
2079 host->use_dma = 1; 2085 host->use_dma = 1;
2080 host->dma_ch = -1; 2086 host->dma_ch = -1;
2081 host->irq = irq; 2087 host->irq = irq;
2082 host->slot_id = 0;
2083 host->mapbase = res->start + pdata->reg_offset; 2088 host->mapbase = res->start + pdata->reg_offset;
2084 host->base = base + pdata->reg_offset; 2089 host->base = base + pdata->reg_offset;
2085 host->power_mode = MMC_POWER_OFF; 2090 host->power_mode = MMC_POWER_OFF;
2086 host->next_data.cookie = 1; 2091 host->next_data.cookie = 1;
2087 host->pbias_enabled = 0; 2092 host->pbias_enabled = 0;
2088 2093
2094 ret = omap_hsmmc_gpio_init(host, pdata);
2095 if (ret)
2096 goto err_gpio;
2097
2089 platform_set_drvdata(pdev, host); 2098 platform_set_drvdata(pdev, host);
2090 2099
2091 if (pdev->dev.of_node) 2100 if (pdev->dev.of_node)
@@ -2144,14 +2153,14 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
2144 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 2153 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
2145 MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; 2154 MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE;
2146 2155
2147 mmc->caps |= mmc_slot(host).caps; 2156 mmc->caps |= mmc_pdata(host)->caps;
2148 if (mmc->caps & MMC_CAP_8_BIT_DATA) 2157 if (mmc->caps & MMC_CAP_8_BIT_DATA)
2149 mmc->caps |= MMC_CAP_4_BIT_DATA; 2158 mmc->caps |= MMC_CAP_4_BIT_DATA;
2150 2159
2151 if (mmc_slot(host).nonremovable) 2160 if (mmc_pdata(host)->nonremovable)
2152 mmc->caps |= MMC_CAP_NONREMOVABLE; 2161 mmc->caps |= MMC_CAP_NONREMOVABLE;
2153 2162
2154 mmc->pm_caps = mmc_slot(host).pm_caps; 2163 mmc->pm_caps = mmc_pdata(host)->pm_caps;
2155 2164
2156 omap_hsmmc_conf_bus_power(host); 2165 omap_hsmmc_conf_bus_power(host);
2157 2166
@@ -2204,27 +2213,19 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
2204 goto err_irq; 2213 goto err_irq;
2205 } 2214 }
2206 2215
2207 if (pdata->init != NULL) { 2216 if (omap_hsmmc_have_reg() && !mmc_pdata(host)->set_power) {
2208 if (pdata->init(&pdev->dev) != 0) {
2209 dev_err(mmc_dev(host->mmc),
2210 "Unable to configure MMC IRQs\n");
2211 goto err_irq;
2212 }
2213 }
2214
2215 if (omap_hsmmc_have_reg() && !mmc_slot(host).set_power) {
2216 ret = omap_hsmmc_reg_get(host); 2217 ret = omap_hsmmc_reg_get(host);
2217 if (ret) 2218 if (ret)
2218 goto err_reg; 2219 goto err_irq;
2219 host->use_reg = 1; 2220 host->use_reg = 1;
2220 } 2221 }
2221 2222
2222 mmc->ocr_avail = mmc_slot(host).ocr_mask; 2223 mmc->ocr_avail = mmc_pdata(host)->ocr_mask;
2223 2224
2224 /* Request IRQ for card detect */ 2225 /* Request IRQ for card detect */
2225 if ((mmc_slot(host).card_detect_irq)) { 2226 if (host->card_detect_irq) {
2226 ret = devm_request_threaded_irq(&pdev->dev, 2227 ret = devm_request_threaded_irq(&pdev->dev,
2227 mmc_slot(host).card_detect_irq, 2228 host->card_detect_irq,
2228 NULL, omap_hsmmc_detect, 2229 NULL, omap_hsmmc_detect,
2229 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 2230 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
2230 mmc_hostname(mmc), host); 2231 mmc_hostname(mmc), host);
@@ -2233,8 +2234,8 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
2233 "Unable to grab MMC CD IRQ\n"); 2234 "Unable to grab MMC CD IRQ\n");
2234 goto err_irq_cd; 2235 goto err_irq_cd;
2235 } 2236 }
2236 pdata->suspend = omap_hsmmc_suspend_cdirq; 2237 host->suspend = omap_hsmmc_suspend_cdirq;
2237 pdata->resume = omap_hsmmc_resume_cdirq; 2238 host->resume = omap_hsmmc_resume_cdirq;
2238 } 2239 }
2239 2240
2240 omap_hsmmc_disable_irq(host); 2241 omap_hsmmc_disable_irq(host);
@@ -2255,12 +2256,12 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
2255 2256
2256 mmc_add_host(mmc); 2257 mmc_add_host(mmc);
2257 2258
2258 if (mmc_slot(host).name != NULL) { 2259 if (mmc_pdata(host)->name != NULL) {
2259 ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 2260 ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name);
2260 if (ret < 0) 2261 if (ret < 0)
2261 goto err_slot_name; 2262 goto err_slot_name;
2262 } 2263 }
2263 if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 2264 if (host->card_detect_irq && host->get_cover_state) {
2264 ret = device_create_file(&mmc->class_dev, 2265 ret = device_create_file(&mmc->class_dev,
2265 &dev_attr_cover_switch); 2266 &dev_attr_cover_switch);
2266 if (ret < 0) 2267 if (ret < 0)
@@ -2278,9 +2279,6 @@ err_slot_name:
2278err_irq_cd: 2279err_irq_cd:
2279 if (host->use_reg) 2280 if (host->use_reg)
2280 omap_hsmmc_reg_put(host); 2281 omap_hsmmc_reg_put(host);
2281err_reg:
2282 if (host->pdata->cleanup)
2283 host->pdata->cleanup(&pdev->dev);
2284err_irq: 2282err_irq:
2285 if (host->tx_chan) 2283 if (host->tx_chan)
2286 dma_release_channel(host->tx_chan); 2284 dma_release_channel(host->tx_chan);
@@ -2291,9 +2289,9 @@ err_irq:
2291 if (host->dbclk) 2289 if (host->dbclk)
2292 clk_disable_unprepare(host->dbclk); 2290 clk_disable_unprepare(host->dbclk);
2293err1: 2291err1:
2292 omap_hsmmc_gpio_free(host, pdata);
2293err_gpio:
2294 mmc_free_host(mmc); 2294 mmc_free_host(mmc);
2295err_alloc:
2296 omap_hsmmc_gpio_free(pdata);
2297err: 2295err:
2298 return ret; 2296 return ret;
2299} 2297}
@@ -2306,8 +2304,6 @@ static int omap_hsmmc_remove(struct platform_device *pdev)
2306 mmc_remove_host(host->mmc); 2304 mmc_remove_host(host->mmc);
2307 if (host->use_reg) 2305 if (host->use_reg)
2308 omap_hsmmc_reg_put(host); 2306 omap_hsmmc_reg_put(host);
2309 if (host->pdata->cleanup)
2310 host->pdata->cleanup(&pdev->dev);
2311 2307
2312 if (host->tx_chan) 2308 if (host->tx_chan)
2313 dma_release_channel(host->tx_chan); 2309 dma_release_channel(host->tx_chan);
@@ -2319,7 +2315,7 @@ static int omap_hsmmc_remove(struct platform_device *pdev)
2319 if (host->dbclk) 2315 if (host->dbclk)
2320 clk_disable_unprepare(host->dbclk); 2316 clk_disable_unprepare(host->dbclk);
2321 2317
2322 omap_hsmmc_gpio_free(host->pdata); 2318 omap_hsmmc_gpio_free(host, host->pdata);
2323 mmc_free_host(host->mmc); 2319 mmc_free_host(host->mmc);
2324 2320
2325 return 0; 2321 return 0;
@@ -2330,8 +2326,8 @@ static int omap_hsmmc_prepare(struct device *dev)
2330{ 2326{
2331 struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2327 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
2332 2328
2333 if (host->pdata->suspend) 2329 if (host->suspend)
2334 return host->pdata->suspend(dev, host->slot_id); 2330 return host->suspend(dev);
2335 2331
2336 return 0; 2332 return 0;
2337} 2333}
@@ -2340,8 +2336,8 @@ static void omap_hsmmc_complete(struct device *dev)
2340{ 2336{
2341 struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2337 struct omap_hsmmc_host *host = dev_get_drvdata(dev);
2342 2338
2343 if (host->pdata->resume) 2339 if (host->resume)
2344 host->pdata->resume(dev, host->slot_id); 2340 host->resume(dev);
2345 2341
2346} 2342}
2347 2343
diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
index 9cccc0e89b04..daba49ac1242 100644
--- a/drivers/mmc/host/sdhci-acpi.c
+++ b/drivers/mmc/host/sdhci-acpi.c
@@ -76,6 +76,7 @@ struct sdhci_acpi_host {
76 const struct sdhci_acpi_slot *slot; 76 const struct sdhci_acpi_slot *slot;
77 struct platform_device *pdev; 77 struct platform_device *pdev;
78 bool use_runtime_pm; 78 bool use_runtime_pm;
79 bool dma_setup;
79}; 80};
80 81
81static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag) 82static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
@@ -85,7 +86,29 @@ static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
85 86
86static int sdhci_acpi_enable_dma(struct sdhci_host *host) 87static int sdhci_acpi_enable_dma(struct sdhci_host *host)
87{ 88{
88 return 0; 89 struct sdhci_acpi_host *c = sdhci_priv(host);
90 struct device *dev = &c->pdev->dev;
91 int err = -1;
92
93 if (c->dma_setup)
94 return 0;
95
96 if (host->flags & SDHCI_USE_64_BIT_DMA) {
97 if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA) {
98 host->flags &= ~SDHCI_USE_64_BIT_DMA;
99 } else {
100 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
101 if (err)
102 dev_warn(dev, "Failed to set 64-bit DMA mask\n");
103 }
104 }
105
106 if (err)
107 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
108
109 c->dma_setup = !err;
110
111 return err;
89} 112}
90 113
91static void sdhci_acpi_int_hw_reset(struct sdhci_host *host) 114static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
@@ -180,17 +203,21 @@ static int sdhci_acpi_sd_probe_slot(struct platform_device *pdev,
180static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = { 203static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
181 .chip = &sdhci_acpi_chip_int, 204 .chip = &sdhci_acpi_chip_int,
182 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 205 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
183 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR, 206 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
207 MMC_CAP_BUS_WIDTH_TEST | MMC_CAP_WAIT_WHILE_BUSY,
184 .caps2 = MMC_CAP2_HC_ERASE_SZ, 208 .caps2 = MMC_CAP2_HC_ERASE_SZ,
185 .flags = SDHCI_ACPI_RUNTIME_PM, 209 .flags = SDHCI_ACPI_RUNTIME_PM,
210 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
186 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | SDHCI_QUIRK2_STOP_WITH_TC, 211 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | SDHCI_QUIRK2_STOP_WITH_TC,
187 .probe_slot = sdhci_acpi_emmc_probe_slot, 212 .probe_slot = sdhci_acpi_emmc_probe_slot,
188}; 213};
189 214
190static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = { 215static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
191 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION, 216 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
217 SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
192 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, 218 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
193 .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD, 219 .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
220 MMC_CAP_BUS_WIDTH_TEST | MMC_CAP_WAIT_WHILE_BUSY,
194 .flags = SDHCI_ACPI_RUNTIME_PM, 221 .flags = SDHCI_ACPI_RUNTIME_PM,
195 .pm_caps = MMC_PM_KEEP_POWER, 222 .pm_caps = MMC_PM_KEEP_POWER,
196 .probe_slot = sdhci_acpi_sdio_probe_slot, 223 .probe_slot = sdhci_acpi_sdio_probe_slot,
@@ -199,8 +226,10 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
199static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = { 226static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
200 .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL | 227 .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
201 SDHCI_ACPI_RUNTIME_PM, 228 SDHCI_ACPI_RUNTIME_PM,
229 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
202 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | 230 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
203 SDHCI_QUIRK2_STOP_WITH_TC, 231 SDHCI_QUIRK2_STOP_WITH_TC,
232 .caps = MMC_CAP_BUS_WIDTH_TEST | MMC_CAP_WAIT_WHILE_BUSY,
204 .probe_slot = sdhci_acpi_sd_probe_slot, 233 .probe_slot = sdhci_acpi_sd_probe_slot,
205}; 234};
206 235
@@ -305,21 +334,6 @@ static int sdhci_acpi_probe(struct platform_device *pdev)
305 goto err_free; 334 goto err_free;
306 } 335 }
307 336
308 if (!dev->dma_mask) {
309 u64 dma_mask;
310
311 if (sdhci_readl(host, SDHCI_CAPABILITIES) & SDHCI_CAN_64BIT) {
312 /* 64-bit DMA is not supported at present */
313 dma_mask = DMA_BIT_MASK(32);
314 } else {
315 dma_mask = DMA_BIT_MASK(32);
316 }
317
318 err = dma_coerce_mask_and_coherent(dev, dma_mask);
319 if (err)
320 goto err_free;
321 }
322
323 if (c->slot) { 337 if (c->slot) {
324 if (c->slot->probe_slot) { 338 if (c->slot->probe_slot) {
325 err = c->slot->probe_slot(pdev, hid, uid); 339 err = c->slot->probe_slot(pdev, hid, uid);
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 587ee0edeb57..12711ab51aed 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -65,8 +65,6 @@
65/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ 65/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
66#define ESDHC_TUNING_START_TAP 0x1 66#define ESDHC_TUNING_START_TAP 0x1
67 67
68#define ESDHC_TUNING_BLOCK_PATTERN_LEN 64
69
70/* pinctrl state */ 68/* pinctrl state */
71#define ESDHC_PINCTRL_STATE_100MHZ "state_100mhz" 69#define ESDHC_PINCTRL_STATE_100MHZ "state_100mhz"
72#define ESDHC_PINCTRL_STATE_200MHZ "state_200mhz" 70#define ESDHC_PINCTRL_STATE_200MHZ "state_200mhz"
@@ -692,8 +690,6 @@ static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val)
692 /* FIXME: delay a bit for card to be ready for next tuning due to errors */ 690 /* FIXME: delay a bit for card to be ready for next tuning due to errors */
693 mdelay(1); 691 mdelay(1);
694 692
695 /* This is balanced by the runtime put in sdhci_tasklet_finish */
696 pm_runtime_get_sync(host->mmc->parent);
697 reg = readl(host->ioaddr + ESDHC_MIX_CTRL); 693 reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
698 reg |= ESDHC_MIX_CTRL_EXE_TUNE | ESDHC_MIX_CTRL_SMPCLK_SEL | 694 reg |= ESDHC_MIX_CTRL_EXE_TUNE | ESDHC_MIX_CTRL_SMPCLK_SEL |
699 ESDHC_MIX_CTRL_FBCLK_SEL; 695 ESDHC_MIX_CTRL_FBCLK_SEL;
@@ -704,54 +700,6 @@ static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val)
704 val, readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS)); 700 val, readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS));
705} 701}
706 702
707static void esdhc_request_done(struct mmc_request *mrq)
708{
709 complete(&mrq->completion);
710}
711
712static int esdhc_send_tuning_cmd(struct sdhci_host *host, u32 opcode,
713 struct scatterlist *sg)
714{
715 struct mmc_command cmd = {0};
716 struct mmc_request mrq = {NULL};
717 struct mmc_data data = {0};
718
719 cmd.opcode = opcode;
720 cmd.arg = 0;
721 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
722
723 data.blksz = ESDHC_TUNING_BLOCK_PATTERN_LEN;
724 data.blocks = 1;
725 data.flags = MMC_DATA_READ;
726 data.sg = sg;
727 data.sg_len = 1;
728
729 mrq.cmd = &cmd;
730 mrq.cmd->mrq = &mrq;
731 mrq.data = &data;
732 mrq.data->mrq = &mrq;
733 mrq.cmd->data = mrq.data;
734
735 mrq.done = esdhc_request_done;
736 init_completion(&(mrq.completion));
737
738 spin_lock_irq(&host->lock);
739 host->mrq = &mrq;
740
741 sdhci_send_command(host, mrq.cmd);
742
743 spin_unlock_irq(&host->lock);
744
745 wait_for_completion(&mrq.completion);
746
747 if (cmd.error)
748 return cmd.error;
749 if (data.error)
750 return data.error;
751
752 return 0;
753}
754
755static void esdhc_post_tuning(struct sdhci_host *host) 703static void esdhc_post_tuning(struct sdhci_host *host)
756{ 704{
757 u32 reg; 705 u32 reg;
@@ -763,21 +711,13 @@ static void esdhc_post_tuning(struct sdhci_host *host)
763 711
764static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode) 712static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
765{ 713{
766 struct scatterlist sg;
767 char *tuning_pattern;
768 int min, max, avg, ret; 714 int min, max, avg, ret;
769 715
770 tuning_pattern = kmalloc(ESDHC_TUNING_BLOCK_PATTERN_LEN, GFP_KERNEL);
771 if (!tuning_pattern)
772 return -ENOMEM;
773
774 sg_init_one(&sg, tuning_pattern, ESDHC_TUNING_BLOCK_PATTERN_LEN);
775
776 /* find the mininum delay first which can pass tuning */ 716 /* find the mininum delay first which can pass tuning */
777 min = ESDHC_TUNE_CTRL_MIN; 717 min = ESDHC_TUNE_CTRL_MIN;
778 while (min < ESDHC_TUNE_CTRL_MAX) { 718 while (min < ESDHC_TUNE_CTRL_MAX) {
779 esdhc_prepare_tuning(host, min); 719 esdhc_prepare_tuning(host, min);
780 if (!esdhc_send_tuning_cmd(host, opcode, &sg)) 720 if (!mmc_send_tuning(host->mmc))
781 break; 721 break;
782 min += ESDHC_TUNE_CTRL_STEP; 722 min += ESDHC_TUNE_CTRL_STEP;
783 } 723 }
@@ -786,7 +726,7 @@ static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
786 max = min + ESDHC_TUNE_CTRL_STEP; 726 max = min + ESDHC_TUNE_CTRL_STEP;
787 while (max < ESDHC_TUNE_CTRL_MAX) { 727 while (max < ESDHC_TUNE_CTRL_MAX) {
788 esdhc_prepare_tuning(host, max); 728 esdhc_prepare_tuning(host, max);
789 if (esdhc_send_tuning_cmd(host, opcode, &sg)) { 729 if (mmc_send_tuning(host->mmc)) {
790 max -= ESDHC_TUNE_CTRL_STEP; 730 max -= ESDHC_TUNE_CTRL_STEP;
791 break; 731 break;
792 } 732 }
@@ -796,11 +736,9 @@ static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
796 /* use average delay to get the best timing */ 736 /* use average delay to get the best timing */
797 avg = (min + max) / 2; 737 avg = (min + max) / 2;
798 esdhc_prepare_tuning(host, avg); 738 esdhc_prepare_tuning(host, avg);
799 ret = esdhc_send_tuning_cmd(host, opcode, &sg); 739 ret = mmc_send_tuning(host->mmc);
800 esdhc_post_tuning(host); 740 esdhc_post_tuning(host);
801 741
802 kfree(tuning_pattern);
803
804 dev_dbg(mmc_dev(host->mmc), "tunning %s at 0x%x ret %d\n", 742 dev_dbg(mmc_dev(host->mmc), "tunning %s at 0x%x ret %d\n",
805 ret ? "failed" : "passed", avg, ret); 743 ret ? "failed" : "passed", avg, ret);
806 744
@@ -1031,11 +969,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
1031 969
1032 imx_data->pins_default = pinctrl_lookup_state(imx_data->pinctrl, 970 imx_data->pins_default = pinctrl_lookup_state(imx_data->pinctrl,
1033 PINCTRL_STATE_DEFAULT); 971 PINCTRL_STATE_DEFAULT);
1034 if (IS_ERR(imx_data->pins_default)) { 972 if (IS_ERR(imx_data->pins_default))
1035 err = PTR_ERR(imx_data->pins_default); 973 dev_warn(mmc_dev(host->mmc), "could not get default state\n");
1036 dev_err(mmc_dev(host->mmc), "could not get default state\n");
1037 goto disable_clk;
1038 }
1039 974
1040 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; 975 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
1041 976
@@ -1123,7 +1058,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
1123 } 1058 }
1124 1059
1125 /* sdr50 and sdr104 needs work on 1.8v signal voltage */ 1060 /* sdr50 and sdr104 needs work on 1.8v signal voltage */
1126 if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data)) { 1061 if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) &&
1062 !IS_ERR(imx_data->pins_default)) {
1127 imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl, 1063 imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl,
1128 ESDHC_PINCTRL_STATE_100MHZ); 1064 ESDHC_PINCTRL_STATE_100MHZ);
1129 imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl, 1065 imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl,
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 30804385af6d..3d32ce896b09 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -339,9 +339,7 @@ static int msm_init_cm_dll(struct sdhci_host *host)
339static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode) 339static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
340{ 340{
341 int tuning_seq_cnt = 3; 341 int tuning_seq_cnt = 3;
342 u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0; 342 u8 phase, tuned_phases[16], tuned_phase_cnt = 0;
343 const u8 *tuning_block_pattern = tuning_blk_pattern_4bit;
344 int size = sizeof(tuning_blk_pattern_4bit);
345 int rc; 343 int rc;
346 struct mmc_host *mmc = host->mmc; 344 struct mmc_host *mmc = host->mmc;
347 struct mmc_ios ios = host->mmc->ios; 345 struct mmc_ios ios = host->mmc->ios;
@@ -355,53 +353,21 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
355 (ios.timing == MMC_TIMING_UHS_SDR104))) 353 (ios.timing == MMC_TIMING_UHS_SDR104)))
356 return 0; 354 return 0;
357 355
358 if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) &&
359 (mmc->ios.bus_width == MMC_BUS_WIDTH_8)) {
360 tuning_block_pattern = tuning_blk_pattern_8bit;
361 size = sizeof(tuning_blk_pattern_8bit);
362 }
363
364 data_buf = kmalloc(size, GFP_KERNEL);
365 if (!data_buf)
366 return -ENOMEM;
367
368retry: 356retry:
369 /* First of all reset the tuning block */ 357 /* First of all reset the tuning block */
370 rc = msm_init_cm_dll(host); 358 rc = msm_init_cm_dll(host);
371 if (rc) 359 if (rc)
372 goto out; 360 return rc;
373 361
374 phase = 0; 362 phase = 0;
375 do { 363 do {
376 struct mmc_command cmd = { 0 };
377 struct mmc_data data = { 0 };
378 struct mmc_request mrq = {
379 .cmd = &cmd,
380 .data = &data
381 };
382 struct scatterlist sg;
383
384 /* Set the phase in delay line hw block */ 364 /* Set the phase in delay line hw block */
385 rc = msm_config_cm_dll_phase(host, phase); 365 rc = msm_config_cm_dll_phase(host, phase);
386 if (rc) 366 if (rc)
387 goto out; 367 return rc;
388 368
389 cmd.opcode = opcode; 369 rc = mmc_send_tuning(mmc);
390 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 370 if (!rc) {
391
392 data.blksz = size;
393 data.blocks = 1;
394 data.flags = MMC_DATA_READ;
395 data.timeout_ns = NSEC_PER_SEC; /* 1 second */
396
397 data.sg = &sg;
398 data.sg_len = 1;
399 sg_init_one(&sg, data_buf, size);
400 memset(data_buf, 0, size);
401 mmc_wait_for_req(mmc, &mrq);
402
403 if (!cmd.error && !data.error &&
404 !memcmp(data_buf, tuning_block_pattern, size)) {
405 /* Tuning is successful at this tuning point */ 371 /* Tuning is successful at this tuning point */
406 tuned_phases[tuned_phase_cnt++] = phase; 372 tuned_phases[tuned_phase_cnt++] = phase;
407 dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n", 373 dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n",
@@ -413,7 +379,7 @@ retry:
413 rc = msm_find_most_appropriate_phase(host, tuned_phases, 379 rc = msm_find_most_appropriate_phase(host, tuned_phases,
414 tuned_phase_cnt); 380 tuned_phase_cnt);
415 if (rc < 0) 381 if (rc < 0)
416 goto out; 382 return rc;
417 else 383 else
418 phase = rc; 384 phase = rc;
419 385
@@ -423,7 +389,7 @@ retry:
423 */ 389 */
424 rc = msm_config_cm_dll_phase(host, phase); 390 rc = msm_config_cm_dll_phase(host, phase);
425 if (rc) 391 if (rc)
426 goto out; 392 return rc;
427 dev_dbg(mmc_dev(mmc), "%s: Setting the tuning phase to %d\n", 393 dev_dbg(mmc_dev(mmc), "%s: Setting the tuning phase to %d\n",
428 mmc_hostname(mmc), phase); 394 mmc_hostname(mmc), phase);
429 } else { 395 } else {
@@ -435,8 +401,6 @@ retry:
435 rc = -EIO; 401 rc = -EIO;
436 } 402 }
437 403
438out:
439 kfree(data_buf);
440 return rc; 404 return rc;
441} 405}
442 406
diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index 981d66e5c023..bcb51e9dfdcd 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -165,7 +165,6 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
165 host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata, 0); 165 host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata, 0);
166 if (IS_ERR(host)) { 166 if (IS_ERR(host)) {
167 ret = PTR_ERR(host); 167 ret = PTR_ERR(host);
168 dev_err(&pdev->dev, "platform init failed (%u)\n", ret);
169 goto clk_disable_all; 168 goto clk_disable_all;
170 } 169 }
171 170
@@ -175,10 +174,8 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
175 pltfm_host->clk = clk_xin; 174 pltfm_host->clk = clk_xin;
176 175
177 ret = sdhci_add_host(host); 176 ret = sdhci_add_host(host);
178 if (ret) { 177 if (ret)
179 dev_err(&pdev->dev, "platform register failed (%u)\n", ret);
180 goto err_pltfm_free; 178 goto err_pltfm_free;
181 }
182 179
183 return 0; 180 return 0;
184 181
diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c
index 5670e381b0cf..e2ec108dba0e 100644
--- a/drivers/mmc/host/sdhci-pci-o2micro.c
+++ b/drivers/mmc/host/sdhci-pci-o2micro.c
@@ -127,8 +127,6 @@ void sdhci_pci_o2_fujin2_pci_init(struct sdhci_pci_chip *chip)
127 return; 127 return;
128 scratch_32 &= ~((1 << 21) | (1 << 30)); 128 scratch_32 &= ~((1 << 21) | (1 << 30));
129 129
130 /* Set RTD3 function disabled */
131 scratch_32 |= ((1 << 29) | (1 << 28));
132 pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG3, scratch_32); 130 pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG3, scratch_32);
133 131
134 /* Set L1 Entrance Timer */ 132 /* Set L1 Entrance Timer */
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index 61192973e7cb..95f73007fccf 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -269,7 +269,9 @@ static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
269static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot) 269static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
270{ 270{
271 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 271 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
272 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR; 272 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
273 MMC_CAP_BUS_WIDTH_TEST |
274 MMC_CAP_WAIT_WHILE_BUSY;
273 slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ; 275 slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
274 slot->hw_reset = sdhci_pci_int_hw_reset; 276 slot->hw_reset = sdhci_pci_int_hw_reset;
275 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC) 277 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC)
@@ -279,12 +281,16 @@ static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
279 281
280static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 282static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
281{ 283{
282 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE; 284 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
285 MMC_CAP_BUS_WIDTH_TEST |
286 MMC_CAP_WAIT_WHILE_BUSY;
283 return 0; 287 return 0;
284} 288}
285 289
286static int byt_sd_probe_slot(struct sdhci_pci_slot *slot) 290static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
287{ 291{
292 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST |
293 MMC_CAP_WAIT_WHILE_BUSY;
288 slot->cd_con_id = NULL; 294 slot->cd_con_id = NULL;
289 slot->cd_idx = 0; 295 slot->cd_idx = 0;
290 slot->cd_override_level = true; 296 slot->cd_override_level = true;
@@ -294,11 +300,13 @@ static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
294static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { 300static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
295 .allow_runtime_pm = true, 301 .allow_runtime_pm = true,
296 .probe_slot = byt_emmc_probe_slot, 302 .probe_slot = byt_emmc_probe_slot,
303 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
297 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 304 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
298 SDHCI_QUIRK2_STOP_WITH_TC, 305 SDHCI_QUIRK2_STOP_WITH_TC,
299}; 306};
300 307
301static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { 308static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
309 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
302 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 310 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON |
303 SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 311 SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
304 .allow_runtime_pm = true, 312 .allow_runtime_pm = true,
@@ -306,6 +314,7 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
306}; 314};
307 315
308static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { 316static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
317 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
309 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | 318 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
310 SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 319 SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
311 SDHCI_QUIRK2_STOP_WITH_TC, 320 SDHCI_QUIRK2_STOP_WITH_TC,
@@ -645,6 +654,25 @@ static const struct sdhci_pci_fixes sdhci_rtsx = {
645 .probe_slot = rtsx_probe_slot, 654 .probe_slot = rtsx_probe_slot,
646}; 655};
647 656
657static int amd_probe(struct sdhci_pci_chip *chip)
658{
659 struct pci_dev *smbus_dev;
660
661 smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
662 PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
663
664 if (smbus_dev && (smbus_dev->revision < 0x51)) {
665 chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
666 chip->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
667 }
668
669 return 0;
670}
671
672static const struct sdhci_pci_fixes sdhci_amd = {
673 .probe = amd_probe,
674};
675
648static const struct pci_device_id pci_ids[] = { 676static const struct pci_device_id pci_ids[] = {
649 { 677 {
650 .vendor = PCI_VENDOR_ID_RICOH, 678 .vendor = PCI_VENDOR_ID_RICOH,
@@ -1044,7 +1072,15 @@ static const struct pci_device_id pci_ids[] = {
1044 .subdevice = PCI_ANY_ID, 1072 .subdevice = PCI_ANY_ID,
1045 .driver_data = (kernel_ulong_t)&sdhci_o2, 1073 .driver_data = (kernel_ulong_t)&sdhci_o2,
1046 }, 1074 },
1047 1075 {
1076 .vendor = PCI_VENDOR_ID_AMD,
1077 .device = PCI_ANY_ID,
1078 .class = PCI_CLASS_SYSTEM_SDHCI << 8,
1079 .class_mask = 0xFFFF00,
1080 .subvendor = PCI_ANY_ID,
1081 .subdevice = PCI_ANY_ID,
1082 .driver_data = (kernel_ulong_t)&sdhci_amd,
1083 },
1048 { /* Generic SD host controller */ 1084 { /* Generic SD host controller */
1049 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00) 1085 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
1050 }, 1086 },
@@ -1064,7 +1100,7 @@ static int sdhci_pci_enable_dma(struct sdhci_host *host)
1064{ 1100{
1065 struct sdhci_pci_slot *slot; 1101 struct sdhci_pci_slot *slot;
1066 struct pci_dev *pdev; 1102 struct pci_dev *pdev;
1067 int ret; 1103 int ret = -1;
1068 1104
1069 slot = sdhci_priv(host); 1105 slot = sdhci_priv(host);
1070 pdev = slot->chip->pdev; 1106 pdev = slot->chip->pdev;
@@ -1076,7 +1112,17 @@ static int sdhci_pci_enable_dma(struct sdhci_host *host)
1076 "doesn't fully claim to support it.\n"); 1112 "doesn't fully claim to support it.\n");
1077 } 1113 }
1078 1114
1079 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 1115 if (host->flags & SDHCI_USE_64_BIT_DMA) {
1116 if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA) {
1117 host->flags &= ~SDHCI_USE_64_BIT_DMA;
1118 } else {
1119 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1120 if (ret)
1121 dev_warn(&pdev->dev, "Failed to set 64-bit DMA mask\n");
1122 }
1123 }
1124 if (ret)
1125 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1080 if (ret) 1126 if (ret)
1081 return ret; 1127 return ret;
1082 1128
diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c
index b4c23e983baf..f98008b5ea77 100644
--- a/drivers/mmc/host/sdhci-pxav2.c
+++ b/drivers/mmc/host/sdhci-pxav2.c
@@ -167,23 +167,17 @@ static int sdhci_pxav2_probe(struct platform_device *pdev)
167 struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; 167 struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data;
168 struct device *dev = &pdev->dev; 168 struct device *dev = &pdev->dev;
169 struct sdhci_host *host = NULL; 169 struct sdhci_host *host = NULL;
170 struct sdhci_pxa *pxa = NULL;
171 const struct of_device_id *match; 170 const struct of_device_id *match;
172 171
173 int ret; 172 int ret;
174 struct clk *clk; 173 struct clk *clk;
175 174
176 pxa = kzalloc(sizeof(struct sdhci_pxa), GFP_KERNEL);
177 if (!pxa)
178 return -ENOMEM;
179
180 host = sdhci_pltfm_init(pdev, NULL, 0); 175 host = sdhci_pltfm_init(pdev, NULL, 0);
181 if (IS_ERR(host)) { 176 if (IS_ERR(host))
182 kfree(pxa);
183 return PTR_ERR(host); 177 return PTR_ERR(host);
184 } 178
185 pltfm_host = sdhci_priv(host); 179 pltfm_host = sdhci_priv(host);
186 pltfm_host->priv = pxa; 180 pltfm_host->priv = NULL;
187 181
188 clk = clk_get(dev, "PXA-SDHCLK"); 182 clk = clk_get(dev, "PXA-SDHCLK");
189 if (IS_ERR(clk)) { 183 if (IS_ERR(clk)) {
@@ -238,7 +232,6 @@ err_add_host:
238 clk_put(clk); 232 clk_put(clk);
239err_clk_get: 233err_clk_get:
240 sdhci_pltfm_free(pdev); 234 sdhci_pltfm_free(pdev);
241 kfree(pxa);
242 return ret; 235 return ret;
243} 236}
244 237
@@ -246,14 +239,12 @@ static int sdhci_pxav2_remove(struct platform_device *pdev)
246{ 239{
247 struct sdhci_host *host = platform_get_drvdata(pdev); 240 struct sdhci_host *host = platform_get_drvdata(pdev);
248 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 241 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
249 struct sdhci_pxa *pxa = pltfm_host->priv;
250 242
251 sdhci_remove_host(host, 1); 243 sdhci_remove_host(host, 1);
252 244
253 clk_disable_unprepare(pltfm_host->clk); 245 clk_disable_unprepare(pltfm_host->clk);
254 clk_put(pltfm_host->clk); 246 clk_put(pltfm_host->clk);
255 sdhci_pltfm_free(pdev); 247 sdhci_pltfm_free(pdev);
256 kfree(pxa);
257 248
258 return 0; 249 return 0;
259} 250}
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
index 5036d7d39529..ad0badad0ebc 100644
--- a/drivers/mmc/host/sdhci-pxav3.c
+++ b/drivers/mmc/host/sdhci-pxav3.c
@@ -58,6 +58,12 @@
58#define SDCE_MISC_INT (1<<2) 58#define SDCE_MISC_INT (1<<2)
59#define SDCE_MISC_INT_EN (1<<1) 59#define SDCE_MISC_INT_EN (1<<1)
60 60
61struct sdhci_pxa {
62 struct clk *clk_core;
63 struct clk *clk_io;
64 u8 power_mode;
65};
66
61/* 67/*
62 * These registers are relative to the second register region, for the 68 * These registers are relative to the second register region, for the
63 * MBus bridge. 69 * MBus bridge.
@@ -211,6 +217,7 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
211 case MMC_TIMING_UHS_SDR104: 217 case MMC_TIMING_UHS_SDR104:
212 ctrl_2 |= SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_VDD_180; 218 ctrl_2 |= SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_VDD_180;
213 break; 219 break;
220 case MMC_TIMING_MMC_DDR52:
214 case MMC_TIMING_UHS_DDR50: 221 case MMC_TIMING_UHS_DDR50:
215 ctrl_2 |= SDHCI_CTRL_UHS_DDR50 | SDHCI_CTRL_VDD_180; 222 ctrl_2 |= SDHCI_CTRL_UHS_DDR50 | SDHCI_CTRL_VDD_180;
216 break; 223 break;
@@ -283,9 +290,7 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
283 struct sdhci_host *host = NULL; 290 struct sdhci_host *host = NULL;
284 struct sdhci_pxa *pxa = NULL; 291 struct sdhci_pxa *pxa = NULL;
285 const struct of_device_id *match; 292 const struct of_device_id *match;
286
287 int ret; 293 int ret;
288 struct clk *clk;
289 294
290 pxa = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_pxa), GFP_KERNEL); 295 pxa = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_pxa), GFP_KERNEL);
291 if (!pxa) 296 if (!pxa)
@@ -305,14 +310,20 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
305 pltfm_host = sdhci_priv(host); 310 pltfm_host = sdhci_priv(host);
306 pltfm_host->priv = pxa; 311 pltfm_host->priv = pxa;
307 312
308 clk = devm_clk_get(dev, NULL); 313 pxa->clk_io = devm_clk_get(dev, "io");
309 if (IS_ERR(clk)) { 314 if (IS_ERR(pxa->clk_io))
315 pxa->clk_io = devm_clk_get(dev, NULL);
316 if (IS_ERR(pxa->clk_io)) {
310 dev_err(dev, "failed to get io clock\n"); 317 dev_err(dev, "failed to get io clock\n");
311 ret = PTR_ERR(clk); 318 ret = PTR_ERR(pxa->clk_io);
312 goto err_clk_get; 319 goto err_clk_get;
313 } 320 }
314 pltfm_host->clk = clk; 321 pltfm_host->clk = pxa->clk_io;
315 clk_prepare_enable(clk); 322 clk_prepare_enable(pxa->clk_io);
323
324 pxa->clk_core = devm_clk_get(dev, "core");
325 if (!IS_ERR(pxa->clk_core))
326 clk_prepare_enable(pxa->clk_core);
316 327
317 /* enable 1/8V DDR capable */ 328 /* enable 1/8V DDR capable */
318 host->mmc->caps |= MMC_CAP_1_8V_DDR; 329 host->mmc->caps |= MMC_CAP_1_8V_DDR;
@@ -385,7 +396,9 @@ err_add_host:
385 pm_runtime_disable(&pdev->dev); 396 pm_runtime_disable(&pdev->dev);
386err_of_parse: 397err_of_parse:
387err_cd_req: 398err_cd_req:
388 clk_disable_unprepare(clk); 399 clk_disable_unprepare(pxa->clk_io);
400 if (!IS_ERR(pxa->clk_core))
401 clk_disable_unprepare(pxa->clk_core);
389err_clk_get: 402err_clk_get:
390err_mbus_win: 403err_mbus_win:
391 sdhci_pltfm_free(pdev); 404 sdhci_pltfm_free(pdev);
@@ -396,12 +409,15 @@ static int sdhci_pxav3_remove(struct platform_device *pdev)
396{ 409{
397 struct sdhci_host *host = platform_get_drvdata(pdev); 410 struct sdhci_host *host = platform_get_drvdata(pdev);
398 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 411 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
412 struct sdhci_pxa *pxa = pltfm_host->priv;
399 413
400 pm_runtime_get_sync(&pdev->dev); 414 pm_runtime_get_sync(&pdev->dev);
401 sdhci_remove_host(host, 1); 415 sdhci_remove_host(host, 1);
402 pm_runtime_disable(&pdev->dev); 416 pm_runtime_disable(&pdev->dev);
403 417
404 clk_disable_unprepare(pltfm_host->clk); 418 clk_disable_unprepare(pxa->clk_io);
419 if (!IS_ERR(pxa->clk_core))
420 clk_disable_unprepare(pxa->clk_core);
405 421
406 sdhci_pltfm_free(pdev); 422 sdhci_pltfm_free(pdev);
407 423
@@ -441,15 +457,16 @@ static int sdhci_pxav3_runtime_suspend(struct device *dev)
441{ 457{
442 struct sdhci_host *host = dev_get_drvdata(dev); 458 struct sdhci_host *host = dev_get_drvdata(dev);
443 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 459 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
460 struct sdhci_pxa *pxa = pltfm_host->priv;
444 unsigned long flags; 461 unsigned long flags;
445 462
446 if (pltfm_host->clk) { 463 spin_lock_irqsave(&host->lock, flags);
447 spin_lock_irqsave(&host->lock, flags); 464 host->runtime_suspended = true;
448 host->runtime_suspended = true; 465 spin_unlock_irqrestore(&host->lock, flags);
449 spin_unlock_irqrestore(&host->lock, flags);
450 466
451 clk_disable_unprepare(pltfm_host->clk); 467 clk_disable_unprepare(pxa->clk_io);
452 } 468 if (!IS_ERR(pxa->clk_core))
469 clk_disable_unprepare(pxa->clk_core);
453 470
454 return 0; 471 return 0;
455} 472}
@@ -458,15 +475,16 @@ static int sdhci_pxav3_runtime_resume(struct device *dev)
458{ 475{
459 struct sdhci_host *host = dev_get_drvdata(dev); 476 struct sdhci_host *host = dev_get_drvdata(dev);
460 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 477 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
478 struct sdhci_pxa *pxa = pltfm_host->priv;
461 unsigned long flags; 479 unsigned long flags;
462 480
463 if (pltfm_host->clk) { 481 clk_prepare_enable(pxa->clk_io);
464 clk_prepare_enable(pltfm_host->clk); 482 if (!IS_ERR(pxa->clk_core))
483 clk_prepare_enable(pxa->clk_core);
465 484
466 spin_lock_irqsave(&host->lock, flags); 485 spin_lock_irqsave(&host->lock, flags);
467 host->runtime_suspended = false; 486 host->runtime_suspended = false;
468 spin_unlock_irqrestore(&host->lock, flags); 487 spin_unlock_irqrestore(&host->lock, flags);
469 }
470 488
471 return 0; 489 return 0;
472} 490}
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 0ce6eb17deaf..4f7a63213b33 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -300,6 +300,7 @@ static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
300 struct device *dev = &ourhost->pdev->dev; 300 struct device *dev = &ourhost->pdev->dev;
301 unsigned long timeout; 301 unsigned long timeout;
302 u16 clk = 0; 302 u16 clk = 0;
303 int ret;
303 304
304 host->mmc->actual_clock = 0; 305 host->mmc->actual_clock = 0;
305 306
@@ -311,7 +312,12 @@ static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
311 312
312 sdhci_s3c_set_clock(host, clock); 313 sdhci_s3c_set_clock(host, clock);
313 314
314 clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock); 315 ret = clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);
316 if (ret != 0) {
317 dev_err(dev, "%s: failed to set clock rate %uHz\n",
318 mmc_hostname(host->mmc), clock);
319 return;
320 }
315 321
316 clk = SDHCI_CLOCK_INT_EN; 322 clk = SDHCI_CLOCK_INT_EN;
317 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 323 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index ada1a3ea3a87..73de62a58d70 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -44,8 +44,6 @@
44 44
45#define MAX_TUNING_LOOP 40 45#define MAX_TUNING_LOOP 40
46 46
47#define ADMA_SIZE ((128 * 2 + 1) * 4)
48
49static unsigned int debug_quirks = 0; 47static unsigned int debug_quirks = 0;
50static unsigned int debug_quirks2; 48static unsigned int debug_quirks2;
51 49
@@ -119,10 +117,17 @@ static void sdhci_dumpregs(struct sdhci_host *host)
119 pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n", 117 pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n",
120 sdhci_readw(host, SDHCI_HOST_CONTROL2)); 118 sdhci_readw(host, SDHCI_HOST_CONTROL2));
121 119
122 if (host->flags & SDHCI_USE_ADMA) 120 if (host->flags & SDHCI_USE_ADMA) {
123 pr_debug(DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n", 121 if (host->flags & SDHCI_USE_64_BIT_DMA)
124 readl(host->ioaddr + SDHCI_ADMA_ERROR), 122 pr_debug(DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x%08x\n",
125 readl(host->ioaddr + SDHCI_ADMA_ADDRESS)); 123 readl(host->ioaddr + SDHCI_ADMA_ERROR),
124 readl(host->ioaddr + SDHCI_ADMA_ADDRESS_HI),
125 readl(host->ioaddr + SDHCI_ADMA_ADDRESS));
126 else
127 pr_debug(DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n",
128 readl(host->ioaddr + SDHCI_ADMA_ERROR),
129 readl(host->ioaddr + SDHCI_ADMA_ADDRESS));
130 }
126 131
127 pr_debug(DRIVER_NAME ": ===========================================\n"); 132 pr_debug(DRIVER_NAME ": ===========================================\n");
128} 133}
@@ -448,18 +453,26 @@ static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
448 local_irq_restore(*flags); 453 local_irq_restore(*flags);
449} 454}
450 455
451static void sdhci_set_adma_desc(u8 *desc, u32 addr, int len, unsigned cmd) 456static void sdhci_adma_write_desc(struct sdhci_host *host, void *desc,
457 dma_addr_t addr, int len, unsigned cmd)
452{ 458{
453 __le32 *dataddr = (__le32 __force *)(desc + 4); 459 struct sdhci_adma2_64_desc *dma_desc = desc;
454 __le16 *cmdlen = (__le16 __force *)desc; 460
461 /* 32-bit and 64-bit descriptors have these members in same position */
462 dma_desc->cmd = cpu_to_le16(cmd);
463 dma_desc->len = cpu_to_le16(len);
464 dma_desc->addr_lo = cpu_to_le32((u32)addr);
455 465
456 /* SDHCI specification says ADMA descriptors should be 4 byte 466 if (host->flags & SDHCI_USE_64_BIT_DMA)
457 * aligned, so using 16 or 32bit operations should be safe. */ 467 dma_desc->addr_hi = cpu_to_le32((u64)addr >> 32);
468}
458 469
459 cmdlen[0] = cpu_to_le16(cmd); 470static void sdhci_adma_mark_end(void *desc)
460 cmdlen[1] = cpu_to_le16(len); 471{
472 struct sdhci_adma2_64_desc *dma_desc = desc;
461 473
462 dataddr[0] = cpu_to_le32(addr); 474 /* 32-bit and 64-bit descriptors have 'cmd' in same position */
475 dma_desc->cmd |= cpu_to_le16(ADMA2_END);
463} 476}
464 477
465static int sdhci_adma_table_pre(struct sdhci_host *host, 478static int sdhci_adma_table_pre(struct sdhci_host *host,
@@ -467,8 +480,8 @@ static int sdhci_adma_table_pre(struct sdhci_host *host,
467{ 480{
468 int direction; 481 int direction;
469 482
470 u8 *desc; 483 void *desc;
471 u8 *align; 484 void *align;
472 dma_addr_t addr; 485 dma_addr_t addr;
473 dma_addr_t align_addr; 486 dma_addr_t align_addr;
474 int len, offset; 487 int len, offset;
@@ -489,17 +502,17 @@ static int sdhci_adma_table_pre(struct sdhci_host *host,
489 direction = DMA_TO_DEVICE; 502 direction = DMA_TO_DEVICE;
490 503
491 host->align_addr = dma_map_single(mmc_dev(host->mmc), 504 host->align_addr = dma_map_single(mmc_dev(host->mmc),
492 host->align_buffer, 128 * 4, direction); 505 host->align_buffer, host->align_buffer_sz, direction);
493 if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr)) 506 if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr))
494 goto fail; 507 goto fail;
495 BUG_ON(host->align_addr & 0x3); 508 BUG_ON(host->align_addr & host->align_mask);
496 509
497 host->sg_count = dma_map_sg(mmc_dev(host->mmc), 510 host->sg_count = dma_map_sg(mmc_dev(host->mmc),
498 data->sg, data->sg_len, direction); 511 data->sg, data->sg_len, direction);
499 if (host->sg_count == 0) 512 if (host->sg_count == 0)
500 goto unmap_align; 513 goto unmap_align;
501 514
502 desc = host->adma_desc; 515 desc = host->adma_table;
503 align = host->align_buffer; 516 align = host->align_buffer;
504 517
505 align_addr = host->align_addr; 518 align_addr = host->align_addr;
@@ -515,24 +528,27 @@ static int sdhci_adma_table_pre(struct sdhci_host *host,
515 * the (up to three) bytes that screw up the 528 * the (up to three) bytes that screw up the
516 * alignment. 529 * alignment.
517 */ 530 */
518 offset = (4 - (addr & 0x3)) & 0x3; 531 offset = (host->align_sz - (addr & host->align_mask)) &
532 host->align_mask;
519 if (offset) { 533 if (offset) {
520 if (data->flags & MMC_DATA_WRITE) { 534 if (data->flags & MMC_DATA_WRITE) {
521 buffer = sdhci_kmap_atomic(sg, &flags); 535 buffer = sdhci_kmap_atomic(sg, &flags);
522 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 536 WARN_ON(((long)buffer & (PAGE_SIZE - 1)) >
537 (PAGE_SIZE - offset));
523 memcpy(align, buffer, offset); 538 memcpy(align, buffer, offset);
524 sdhci_kunmap_atomic(buffer, &flags); 539 sdhci_kunmap_atomic(buffer, &flags);
525 } 540 }
526 541
527 /* tran, valid */ 542 /* tran, valid */
528 sdhci_set_adma_desc(desc, align_addr, offset, 0x21); 543 sdhci_adma_write_desc(host, desc, align_addr, offset,
544 ADMA2_TRAN_VALID);
529 545
530 BUG_ON(offset > 65536); 546 BUG_ON(offset > 65536);
531 547
532 align += 4; 548 align += host->align_sz;
533 align_addr += 4; 549 align_addr += host->align_sz;
534 550
535 desc += 8; 551 desc += host->desc_sz;
536 552
537 addr += offset; 553 addr += offset;
538 len -= offset; 554 len -= offset;
@@ -541,23 +557,23 @@ static int sdhci_adma_table_pre(struct sdhci_host *host,
541 BUG_ON(len > 65536); 557 BUG_ON(len > 65536);
542 558
543 /* tran, valid */ 559 /* tran, valid */
544 sdhci_set_adma_desc(desc, addr, len, 0x21); 560 sdhci_adma_write_desc(host, desc, addr, len, ADMA2_TRAN_VALID);
545 desc += 8; 561 desc += host->desc_sz;
546 562
547 /* 563 /*
548 * If this triggers then we have a calculation bug 564 * If this triggers then we have a calculation bug
549 * somewhere. :/ 565 * somewhere. :/
550 */ 566 */
551 WARN_ON((desc - host->adma_desc) > ADMA_SIZE); 567 WARN_ON((desc - host->adma_table) >= host->adma_table_sz);
552 } 568 }
553 569
554 if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) { 570 if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) {
555 /* 571 /*
556 * Mark the last descriptor as the terminating descriptor 572 * Mark the last descriptor as the terminating descriptor
557 */ 573 */
558 if (desc != host->adma_desc) { 574 if (desc != host->adma_table) {
559 desc -= 8; 575 desc -= host->desc_sz;
560 desc[0] |= 0x2; /* end */ 576 sdhci_adma_mark_end(desc);
561 } 577 }
562 } else { 578 } else {
563 /* 579 /*
@@ -565,7 +581,7 @@ static int sdhci_adma_table_pre(struct sdhci_host *host,
565 */ 581 */
566 582
567 /* nop, end, valid */ 583 /* nop, end, valid */
568 sdhci_set_adma_desc(desc, 0, 0, 0x3); 584 sdhci_adma_write_desc(host, desc, 0, 0, ADMA2_NOP_END_VALID);
569 } 585 }
570 586
571 /* 587 /*
@@ -573,14 +589,14 @@ static int sdhci_adma_table_pre(struct sdhci_host *host,
573 */ 589 */
574 if (data->flags & MMC_DATA_WRITE) { 590 if (data->flags & MMC_DATA_WRITE) {
575 dma_sync_single_for_device(mmc_dev(host->mmc), 591 dma_sync_single_for_device(mmc_dev(host->mmc),
576 host->align_addr, 128 * 4, direction); 592 host->align_addr, host->align_buffer_sz, direction);
577 } 593 }
578 594
579 return 0; 595 return 0;
580 596
581unmap_align: 597unmap_align:
582 dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 598 dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
583 128 * 4, direction); 599 host->align_buffer_sz, direction);
584fail: 600fail:
585 return -EINVAL; 601 return -EINVAL;
586} 602}
@@ -592,7 +608,7 @@ static void sdhci_adma_table_post(struct sdhci_host *host,
592 608
593 struct scatterlist *sg; 609 struct scatterlist *sg;
594 int i, size; 610 int i, size;
595 u8 *align; 611 void *align;
596 char *buffer; 612 char *buffer;
597 unsigned long flags; 613 unsigned long flags;
598 bool has_unaligned; 614 bool has_unaligned;
@@ -603,12 +619,12 @@ static void sdhci_adma_table_post(struct sdhci_host *host,
603 direction = DMA_TO_DEVICE; 619 direction = DMA_TO_DEVICE;
604 620
605 dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 621 dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
606 128 * 4, direction); 622 host->align_buffer_sz, direction);
607 623
608 /* Do a quick scan of the SG list for any unaligned mappings */ 624 /* Do a quick scan of the SG list for any unaligned mappings */
609 has_unaligned = false; 625 has_unaligned = false;
610 for_each_sg(data->sg, sg, host->sg_count, i) 626 for_each_sg(data->sg, sg, host->sg_count, i)
611 if (sg_dma_address(sg) & 3) { 627 if (sg_dma_address(sg) & host->align_mask) {
612 has_unaligned = true; 628 has_unaligned = true;
613 break; 629 break;
614 } 630 }
@@ -620,15 +636,17 @@ static void sdhci_adma_table_post(struct sdhci_host *host,
620 align = host->align_buffer; 636 align = host->align_buffer;
621 637
622 for_each_sg(data->sg, sg, host->sg_count, i) { 638 for_each_sg(data->sg, sg, host->sg_count, i) {
623 if (sg_dma_address(sg) & 0x3) { 639 if (sg_dma_address(sg) & host->align_mask) {
624 size = 4 - (sg_dma_address(sg) & 0x3); 640 size = host->align_sz -
641 (sg_dma_address(sg) & host->align_mask);
625 642
626 buffer = sdhci_kmap_atomic(sg, &flags); 643 buffer = sdhci_kmap_atomic(sg, &flags);
627 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 644 WARN_ON(((long)buffer & (PAGE_SIZE - 1)) >
645 (PAGE_SIZE - size));
628 memcpy(buffer, align, size); 646 memcpy(buffer, align, size);
629 sdhci_kunmap_atomic(buffer, &flags); 647 sdhci_kunmap_atomic(buffer, &flags);
630 648
631 align += 4; 649 align += host->align_sz;
632 } 650 }
633 } 651 }
634 } 652 }
@@ -822,6 +840,10 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd)
822 } else { 840 } else {
823 sdhci_writel(host, host->adma_addr, 841 sdhci_writel(host, host->adma_addr,
824 SDHCI_ADMA_ADDRESS); 842 SDHCI_ADMA_ADDRESS);
843 if (host->flags & SDHCI_USE_64_BIT_DMA)
844 sdhci_writel(host,
845 (u64)host->adma_addr >> 32,
846 SDHCI_ADMA_ADDRESS_HI);
825 } 847 }
826 } else { 848 } else {
827 int sg_cnt; 849 int sg_cnt;
@@ -855,10 +877,14 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd)
855 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 877 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
856 ctrl &= ~SDHCI_CTRL_DMA_MASK; 878 ctrl &= ~SDHCI_CTRL_DMA_MASK;
857 if ((host->flags & SDHCI_REQ_USE_DMA) && 879 if ((host->flags & SDHCI_REQ_USE_DMA) &&
858 (host->flags & SDHCI_USE_ADMA)) 880 (host->flags & SDHCI_USE_ADMA)) {
859 ctrl |= SDHCI_CTRL_ADMA32; 881 if (host->flags & SDHCI_USE_64_BIT_DMA)
860 else 882 ctrl |= SDHCI_CTRL_ADMA64;
883 else
884 ctrl |= SDHCI_CTRL_ADMA32;
885 } else {
861 ctrl |= SDHCI_CTRL_SDMA; 886 ctrl |= SDHCI_CTRL_SDMA;
887 }
862 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 888 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
863 } 889 }
864 890
@@ -889,10 +915,15 @@ static void sdhci_set_transfer_mode(struct sdhci_host *host,
889 struct mmc_data *data = cmd->data; 915 struct mmc_data *data = cmd->data;
890 916
891 if (data == NULL) { 917 if (data == NULL) {
918 if (host->quirks2 &
919 SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD) {
920 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);
921 } else {
892 /* clear Auto CMD settings for no data CMDs */ 922 /* clear Auto CMD settings for no data CMDs */
893 mode = sdhci_readw(host, SDHCI_TRANSFER_MODE); 923 mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);
894 sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 | 924 sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
895 SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE); 925 SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE);
926 }
896 return; 927 return;
897 } 928 }
898 929
@@ -1117,6 +1148,9 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host)
1117 case MMC_TIMING_UHS_DDR50: 1148 case MMC_TIMING_UHS_DDR50:
1118 preset = sdhci_readw(host, SDHCI_PRESET_FOR_DDR50); 1149 preset = sdhci_readw(host, SDHCI_PRESET_FOR_DDR50);
1119 break; 1150 break;
1151 case MMC_TIMING_MMC_HS400:
1152 preset = sdhci_readw(host, SDHCI_PRESET_FOR_HS400);
1153 break;
1120 default: 1154 default:
1121 pr_warn("%s: Invalid UHS-I mode selected\n", 1155 pr_warn("%s: Invalid UHS-I mode selected\n",
1122 mmc_hostname(host->mmc)); 1156 mmc_hostname(host->mmc));
@@ -1444,6 +1478,8 @@ void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing)
1444 else if ((timing == MMC_TIMING_UHS_DDR50) || 1478 else if ((timing == MMC_TIMING_UHS_DDR50) ||
1445 (timing == MMC_TIMING_MMC_DDR52)) 1479 (timing == MMC_TIMING_MMC_DDR52))
1446 ctrl_2 |= SDHCI_CTRL_UHS_DDR50; 1480 ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
1481 else if (timing == MMC_TIMING_MMC_HS400)
1482 ctrl_2 |= SDHCI_CTRL_HS400; /* Non-standard */
1447 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); 1483 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
1448} 1484}
1449EXPORT_SYMBOL_GPL(sdhci_set_uhs_signaling); 1485EXPORT_SYMBOL_GPL(sdhci_set_uhs_signaling);
@@ -1515,7 +1551,8 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
1515 u16 clk, ctrl_2; 1551 u16 clk, ctrl_2;
1516 1552
1517 /* In case of UHS-I modes, set High Speed Enable */ 1553 /* In case of UHS-I modes, set High Speed Enable */
1518 if ((ios->timing == MMC_TIMING_MMC_HS200) || 1554 if ((ios->timing == MMC_TIMING_MMC_HS400) ||
1555 (ios->timing == MMC_TIMING_MMC_HS200) ||
1519 (ios->timing == MMC_TIMING_MMC_DDR52) || 1556 (ios->timing == MMC_TIMING_MMC_DDR52) ||
1520 (ios->timing == MMC_TIMING_UHS_SDR50) || 1557 (ios->timing == MMC_TIMING_UHS_SDR50) ||
1521 (ios->timing == MMC_TIMING_UHS_SDR104) || 1558 (ios->timing == MMC_TIMING_UHS_SDR104) ||
@@ -1862,6 +1899,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
1862 * tuning function has to be executed. 1899 * tuning function has to be executed.
1863 */ 1900 */
1864 switch (host->timing) { 1901 switch (host->timing) {
1902 case MMC_TIMING_MMC_HS400:
1865 case MMC_TIMING_MMC_HS200: 1903 case MMC_TIMING_MMC_HS200:
1866 case MMC_TIMING_UHS_SDR104: 1904 case MMC_TIMING_UHS_SDR104:
1867 break; 1905 break;
@@ -2144,9 +2182,10 @@ static void sdhci_tasklet_finish(unsigned long param)
2144 */ 2182 */
2145 if (!(host->flags & SDHCI_DEVICE_DEAD) && 2183 if (!(host->flags & SDHCI_DEVICE_DEAD) &&
2146 ((mrq->cmd && mrq->cmd->error) || 2184 ((mrq->cmd && mrq->cmd->error) ||
2147 (mrq->data && (mrq->data->error || 2185 (mrq->sbc && mrq->sbc->error) ||
2148 (mrq->data->stop && mrq->data->stop->error))) || 2186 (mrq->data && ((mrq->data->error && !mrq->data->stop) ||
2149 (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) { 2187 (mrq->data->stop && mrq->data->stop->error))) ||
2188 (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
2150 2189
2151 /* Some controllers need this kick or reset won't work here */ 2190 /* Some controllers need this kick or reset won't work here */
2152 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) 2191 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET)
@@ -2282,32 +2321,36 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask, u32 *mask)
2282} 2321}
2283 2322
2284#ifdef CONFIG_MMC_DEBUG 2323#ifdef CONFIG_MMC_DEBUG
2285static void sdhci_show_adma_error(struct sdhci_host *host) 2324static void sdhci_adma_show_error(struct sdhci_host *host)
2286{ 2325{
2287 const char *name = mmc_hostname(host->mmc); 2326 const char *name = mmc_hostname(host->mmc);
2288 u8 *desc = host->adma_desc; 2327 void *desc = host->adma_table;
2289 __le32 *dma;
2290 __le16 *len;
2291 u8 attr;
2292 2328
2293 sdhci_dumpregs(host); 2329 sdhci_dumpregs(host);
2294 2330
2295 while (true) { 2331 while (true) {
2296 dma = (__le32 *)(desc + 4); 2332 struct sdhci_adma2_64_desc *dma_desc = desc;
2297 len = (__le16 *)(desc + 2); 2333
2298 attr = *desc; 2334 if (host->flags & SDHCI_USE_64_BIT_DMA)
2299 2335 DBG("%s: %p: DMA 0x%08x%08x, LEN 0x%04x, Attr=0x%02x\n",
2300 DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n", 2336 name, desc, le32_to_cpu(dma_desc->addr_hi),
2301 name, desc, le32_to_cpu(*dma), le16_to_cpu(*len), attr); 2337 le32_to_cpu(dma_desc->addr_lo),
2338 le16_to_cpu(dma_desc->len),
2339 le16_to_cpu(dma_desc->cmd));
2340 else
2341 DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n",
2342 name, desc, le32_to_cpu(dma_desc->addr_lo),
2343 le16_to_cpu(dma_desc->len),
2344 le16_to_cpu(dma_desc->cmd));
2302 2345
2303 desc += 8; 2346 desc += host->desc_sz;
2304 2347
2305 if (attr & 2) 2348 if (dma_desc->cmd & cpu_to_le16(ADMA2_END))
2306 break; 2349 break;
2307 } 2350 }
2308} 2351}
2309#else 2352#else
2310static void sdhci_show_adma_error(struct sdhci_host *host) { } 2353static void sdhci_adma_show_error(struct sdhci_host *host) { }
2311#endif 2354#endif
2312 2355
2313static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) 2356static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
@@ -2370,7 +2413,7 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
2370 host->data->error = -EILSEQ; 2413 host->data->error = -EILSEQ;
2371 else if (intmask & SDHCI_INT_ADMA_ERROR) { 2414 else if (intmask & SDHCI_INT_ADMA_ERROR) {
2372 pr_err("%s: ADMA error\n", mmc_hostname(host->mmc)); 2415 pr_err("%s: ADMA error\n", mmc_hostname(host->mmc));
2373 sdhci_show_adma_error(host); 2416 sdhci_adma_show_error(host);
2374 host->data->error = -EIO; 2417 host->data->error = -EIO;
2375 if (host->ops->adma_workaround) 2418 if (host->ops->adma_workaround)
2376 host->ops->adma_workaround(host, intmask); 2419 host->ops->adma_workaround(host, intmask);
@@ -2849,6 +2892,16 @@ int sdhci_add_host(struct sdhci_host *host)
2849 host->flags &= ~SDHCI_USE_ADMA; 2892 host->flags &= ~SDHCI_USE_ADMA;
2850 } 2893 }
2851 2894
2895 /*
2896 * It is assumed that a 64-bit capable device has set a 64-bit DMA mask
2897 * and *must* do 64-bit DMA. A driver has the opportunity to change
2898 * that during the first call to ->enable_dma(). Similarly
2899 * SDHCI_QUIRK2_BROKEN_64_BIT_DMA must be left to the drivers to
2900 * implement.
2901 */
2902 if (sdhci_readl(host, SDHCI_CAPABILITIES) & SDHCI_CAN_64BIT)
2903 host->flags |= SDHCI_USE_64_BIT_DMA;
2904
2852 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 2905 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) {
2853 if (host->ops->enable_dma) { 2906 if (host->ops->enable_dma) {
2854 if (host->ops->enable_dma(host)) { 2907 if (host->ops->enable_dma(host)) {
@@ -2860,33 +2913,56 @@ int sdhci_add_host(struct sdhci_host *host)
2860 } 2913 }
2861 } 2914 }
2862 2915
2916 /* SDMA does not support 64-bit DMA */
2917 if (host->flags & SDHCI_USE_64_BIT_DMA)
2918 host->flags &= ~SDHCI_USE_SDMA;
2919
2863 if (host->flags & SDHCI_USE_ADMA) { 2920 if (host->flags & SDHCI_USE_ADMA) {
2864 /* 2921 /*
2865 * We need to allocate descriptors for all sg entries 2922 * The DMA descriptor table size is calculated as the maximum
2866 * (128) and potentially one alignment transfer for 2923 * number of segments times 2, to allow for an alignment
2867 * each of those entries. 2924 * descriptor for each segment, plus 1 for a nop end descriptor,
2925 * all multipled by the descriptor size.
2868 */ 2926 */
2869 host->adma_desc = dma_alloc_coherent(mmc_dev(mmc), 2927 if (host->flags & SDHCI_USE_64_BIT_DMA) {
2870 ADMA_SIZE, &host->adma_addr, 2928 host->adma_table_sz = (SDHCI_MAX_SEGS * 2 + 1) *
2871 GFP_KERNEL); 2929 SDHCI_ADMA2_64_DESC_SZ;
2872 host->align_buffer = kmalloc(128 * 4, GFP_KERNEL); 2930 host->align_buffer_sz = SDHCI_MAX_SEGS *
2873 if (!host->adma_desc || !host->align_buffer) { 2931 SDHCI_ADMA2_64_ALIGN;
2874 dma_free_coherent(mmc_dev(mmc), ADMA_SIZE, 2932 host->desc_sz = SDHCI_ADMA2_64_DESC_SZ;
2875 host->adma_desc, host->adma_addr); 2933 host->align_sz = SDHCI_ADMA2_64_ALIGN;
2934 host->align_mask = SDHCI_ADMA2_64_ALIGN - 1;
2935 } else {
2936 host->adma_table_sz = (SDHCI_MAX_SEGS * 2 + 1) *
2937 SDHCI_ADMA2_32_DESC_SZ;
2938 host->align_buffer_sz = SDHCI_MAX_SEGS *
2939 SDHCI_ADMA2_32_ALIGN;
2940 host->desc_sz = SDHCI_ADMA2_32_DESC_SZ;
2941 host->align_sz = SDHCI_ADMA2_32_ALIGN;
2942 host->align_mask = SDHCI_ADMA2_32_ALIGN - 1;
2943 }
2944 host->adma_table = dma_alloc_coherent(mmc_dev(mmc),
2945 host->adma_table_sz,
2946 &host->adma_addr,
2947 GFP_KERNEL);
2948 host->align_buffer = kmalloc(host->align_buffer_sz, GFP_KERNEL);
2949 if (!host->adma_table || !host->align_buffer) {
2950 dma_free_coherent(mmc_dev(mmc), host->adma_table_sz,
2951 host->adma_table, host->adma_addr);
2876 kfree(host->align_buffer); 2952 kfree(host->align_buffer);
2877 pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n", 2953 pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n",
2878 mmc_hostname(mmc)); 2954 mmc_hostname(mmc));
2879 host->flags &= ~SDHCI_USE_ADMA; 2955 host->flags &= ~SDHCI_USE_ADMA;
2880 host->adma_desc = NULL; 2956 host->adma_table = NULL;
2881 host->align_buffer = NULL; 2957 host->align_buffer = NULL;
2882 } else if (host->adma_addr & 3) { 2958 } else if (host->adma_addr & host->align_mask) {
2883 pr_warn("%s: unable to allocate aligned ADMA descriptor\n", 2959 pr_warn("%s: unable to allocate aligned ADMA descriptor\n",
2884 mmc_hostname(mmc)); 2960 mmc_hostname(mmc));
2885 host->flags &= ~SDHCI_USE_ADMA; 2961 host->flags &= ~SDHCI_USE_ADMA;
2886 dma_free_coherent(mmc_dev(mmc), ADMA_SIZE, 2962 dma_free_coherent(mmc_dev(mmc), host->adma_table_sz,
2887 host->adma_desc, host->adma_addr); 2963 host->adma_table, host->adma_addr);
2888 kfree(host->align_buffer); 2964 kfree(host->align_buffer);
2889 host->adma_desc = NULL; 2965 host->adma_table = NULL;
2890 host->align_buffer = NULL; 2966 host->align_buffer = NULL;
2891 } 2967 }
2892 } 2968 }
@@ -3027,7 +3103,7 @@ int sdhci_add_host(struct sdhci_host *host)
3027 if (ret) { 3103 if (ret) {
3028 pr_warn("%s: Failed to enable vqmmc regulator: %d\n", 3104 pr_warn("%s: Failed to enable vqmmc regulator: %d\n",
3029 mmc_hostname(mmc), ret); 3105 mmc_hostname(mmc), ret);
3030 mmc->supply.vqmmc = NULL; 3106 mmc->supply.vqmmc = ERR_PTR(-EINVAL);
3031 } 3107 }
3032 } 3108 }
3033 3109
@@ -3046,16 +3122,21 @@ int sdhci_add_host(struct sdhci_host *host)
3046 /* SD3.0: SDR104 is supported so (for eMMC) the caps2 3122 /* SD3.0: SDR104 is supported so (for eMMC) the caps2
3047 * field can be promoted to support HS200. 3123 * field can be promoted to support HS200.
3048 */ 3124 */
3049 if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200)) { 3125 if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200))
3050 mmc->caps2 |= MMC_CAP2_HS200; 3126 mmc->caps2 |= MMC_CAP2_HS200;
3051 if (IS_ERR(mmc->supply.vqmmc) ||
3052 !regulator_is_supported_voltage
3053 (mmc->supply.vqmmc, 1100000, 1300000))
3054 mmc->caps2 &= ~MMC_CAP2_HS200_1_2V_SDR;
3055 }
3056 } else if (caps[1] & SDHCI_SUPPORT_SDR50) 3127 } else if (caps[1] & SDHCI_SUPPORT_SDR50)
3057 mmc->caps |= MMC_CAP_UHS_SDR50; 3128 mmc->caps |= MMC_CAP_UHS_SDR50;
3058 3129
3130 if (host->quirks2 & SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 &&
3131 (caps[1] & SDHCI_SUPPORT_HS400))
3132 mmc->caps2 |= MMC_CAP2_HS400;
3133
3134 if ((mmc->caps2 & MMC_CAP2_HSX00_1_2V) &&
3135 (IS_ERR(mmc->supply.vqmmc) ||
3136 !regulator_is_supported_voltage(mmc->supply.vqmmc, 1100000,
3137 1300000)))
3138 mmc->caps2 &= ~MMC_CAP2_HSX00_1_2V;
3139
3059 if ((caps[1] & SDHCI_SUPPORT_DDR50) && 3140 if ((caps[1] & SDHCI_SUPPORT_DDR50) &&
3060 !(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50)) 3141 !(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50))
3061 mmc->caps |= MMC_CAP_UHS_DDR50; 3142 mmc->caps |= MMC_CAP_UHS_DDR50;
@@ -3175,11 +3256,11 @@ int sdhci_add_host(struct sdhci_host *host)
3175 * can do scatter/gather or not. 3256 * can do scatter/gather or not.
3176 */ 3257 */
3177 if (host->flags & SDHCI_USE_ADMA) 3258 if (host->flags & SDHCI_USE_ADMA)
3178 mmc->max_segs = 128; 3259 mmc->max_segs = SDHCI_MAX_SEGS;
3179 else if (host->flags & SDHCI_USE_SDMA) 3260 else if (host->flags & SDHCI_USE_SDMA)
3180 mmc->max_segs = 1; 3261 mmc->max_segs = 1;
3181 else /* PIO */ 3262 else /* PIO */
3182 mmc->max_segs = 128; 3263 mmc->max_segs = SDHCI_MAX_SEGS;
3183 3264
3184 /* 3265 /*
3185 * Maximum number of sectors in one transfer. Limited by DMA boundary 3266 * Maximum number of sectors in one transfer. Limited by DMA boundary
@@ -3277,7 +3358,8 @@ int sdhci_add_host(struct sdhci_host *host)
3277 3358
3278 pr_info("%s: SDHCI controller on %s [%s] using %s\n", 3359 pr_info("%s: SDHCI controller on %s [%s] using %s\n",
3279 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), 3360 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)),
3280 (host->flags & SDHCI_USE_ADMA) ? "ADMA" : 3361 (host->flags & SDHCI_USE_ADMA) ?
3362 (host->flags & SDHCI_USE_64_BIT_DMA) ? "ADMA 64-bit" : "ADMA" :
3281 (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); 3363 (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO");
3282 3364
3283 sdhci_enable_card_detection(host); 3365 sdhci_enable_card_detection(host);
@@ -3339,18 +3421,15 @@ void sdhci_remove_host(struct sdhci_host *host, int dead)
3339 3421
3340 tasklet_kill(&host->finish_tasklet); 3422 tasklet_kill(&host->finish_tasklet);
3341 3423
3342 if (!IS_ERR(mmc->supply.vmmc))
3343 regulator_disable(mmc->supply.vmmc);
3344
3345 if (!IS_ERR(mmc->supply.vqmmc)) 3424 if (!IS_ERR(mmc->supply.vqmmc))
3346 regulator_disable(mmc->supply.vqmmc); 3425 regulator_disable(mmc->supply.vqmmc);
3347 3426
3348 if (host->adma_desc) 3427 if (host->adma_table)
3349 dma_free_coherent(mmc_dev(mmc), ADMA_SIZE, 3428 dma_free_coherent(mmc_dev(mmc), host->adma_table_sz,
3350 host->adma_desc, host->adma_addr); 3429 host->adma_table, host->adma_addr);
3351 kfree(host->align_buffer); 3430 kfree(host->align_buffer);
3352 3431
3353 host->adma_desc = NULL; 3432 host->adma_table = NULL;
3354 host->align_buffer = NULL; 3433 host->align_buffer = NULL;
3355} 3434}
3356 3435
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 31896a779d4e..ddd31cda2370 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -161,7 +161,7 @@
161#define SDHCI_CTRL_UHS_SDR50 0x0002 161#define SDHCI_CTRL_UHS_SDR50 0x0002
162#define SDHCI_CTRL_UHS_SDR104 0x0003 162#define SDHCI_CTRL_UHS_SDR104 0x0003
163#define SDHCI_CTRL_UHS_DDR50 0x0004 163#define SDHCI_CTRL_UHS_DDR50 0x0004
164#define SDHCI_CTRL_HS_SDR200 0x0005 /* reserved value in SDIO spec */ 164#define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
165#define SDHCI_CTRL_VDD_180 0x0008 165#define SDHCI_CTRL_VDD_180 0x0008
166#define SDHCI_CTRL_DRV_TYPE_MASK 0x0030 166#define SDHCI_CTRL_DRV_TYPE_MASK 0x0030
167#define SDHCI_CTRL_DRV_TYPE_B 0x0000 167#define SDHCI_CTRL_DRV_TYPE_B 0x0000
@@ -204,6 +204,7 @@
204#define SDHCI_RETUNING_MODE_SHIFT 14 204#define SDHCI_RETUNING_MODE_SHIFT 14
205#define SDHCI_CLOCK_MUL_MASK 0x00FF0000 205#define SDHCI_CLOCK_MUL_MASK 0x00FF0000
206#define SDHCI_CLOCK_MUL_SHIFT 16 206#define SDHCI_CLOCK_MUL_SHIFT 16
207#define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
207 208
208#define SDHCI_CAPABILITIES_1 0x44 209#define SDHCI_CAPABILITIES_1 0x44
209 210
@@ -227,6 +228,7 @@
227/* 55-57 reserved */ 228/* 55-57 reserved */
228 229
229#define SDHCI_ADMA_ADDRESS 0x58 230#define SDHCI_ADMA_ADDRESS 0x58
231#define SDHCI_ADMA_ADDRESS_HI 0x5C
230 232
231/* 60-FB reserved */ 233/* 60-FB reserved */
232 234
@@ -235,6 +237,7 @@
235#define SDHCI_PRESET_FOR_SDR50 0x6A 237#define SDHCI_PRESET_FOR_SDR50 0x6A
236#define SDHCI_PRESET_FOR_SDR104 0x6C 238#define SDHCI_PRESET_FOR_SDR104 0x6C
237#define SDHCI_PRESET_FOR_DDR50 0x6E 239#define SDHCI_PRESET_FOR_DDR50 0x6E
240#define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */
238#define SDHCI_PRESET_DRV_MASK 0xC000 241#define SDHCI_PRESET_DRV_MASK 0xC000
239#define SDHCI_PRESET_DRV_SHIFT 14 242#define SDHCI_PRESET_DRV_SHIFT 14
240#define SDHCI_PRESET_CLKGEN_SEL_MASK 0x400 243#define SDHCI_PRESET_CLKGEN_SEL_MASK 0x400
@@ -266,6 +269,46 @@
266#define SDHCI_DEFAULT_BOUNDARY_SIZE (512 * 1024) 269#define SDHCI_DEFAULT_BOUNDARY_SIZE (512 * 1024)
267#define SDHCI_DEFAULT_BOUNDARY_ARG (ilog2(SDHCI_DEFAULT_BOUNDARY_SIZE) - 12) 270#define SDHCI_DEFAULT_BOUNDARY_ARG (ilog2(SDHCI_DEFAULT_BOUNDARY_SIZE) - 12)
268 271
272/* ADMA2 32-bit DMA descriptor size */
273#define SDHCI_ADMA2_32_DESC_SZ 8
274
275/* ADMA2 32-bit DMA alignment */
276#define SDHCI_ADMA2_32_ALIGN 4
277
278/* ADMA2 32-bit descriptor */
279struct sdhci_adma2_32_desc {
280 __le16 cmd;
281 __le16 len;
282 __le32 addr;
283} __packed __aligned(SDHCI_ADMA2_32_ALIGN);
284
285/* ADMA2 64-bit DMA descriptor size */
286#define SDHCI_ADMA2_64_DESC_SZ 12
287
288/* ADMA2 64-bit DMA alignment */
289#define SDHCI_ADMA2_64_ALIGN 8
290
291/*
292 * ADMA2 64-bit descriptor. Note 12-byte descriptor can't always be 8-byte
293 * aligned.
294 */
295struct sdhci_adma2_64_desc {
296 __le16 cmd;
297 __le16 len;
298 __le32 addr_lo;
299 __le32 addr_hi;
300} __packed __aligned(4);
301
302#define ADMA2_TRAN_VALID 0x21
303#define ADMA2_NOP_END_VALID 0x3
304#define ADMA2_END 0x2
305
306/*
307 * Maximum segments assuming a 512KiB maximum requisition size and a minimum
308 * 4KiB page size.
309 */
310#define SDHCI_MAX_SEGS 128
311
269struct sdhci_ops { 312struct sdhci_ops {
270#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS 313#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
271 u32 (*read_l)(struct sdhci_host *host, int reg); 314 u32 (*read_l)(struct sdhci_host *host, int reg);
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index d1663b3c4143..15cb8b7ffc34 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -21,7 +21,6 @@
21#include <linux/err.h> 21#include <linux/err.h>
22 22
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/clk-private.h>
25#include <linux/clk/sunxi.h> 24#include <linux/clk/sunxi.h>
26 25
27#include <linux/gpio.h> 26#include <linux/gpio.h>
diff --git a/drivers/mmc/host/toshsd.c b/drivers/mmc/host/toshsd.c
new file mode 100644
index 000000000000..4666262edaca
--- /dev/null
+++ b/drivers/mmc/host/toshsd.c
@@ -0,0 +1,717 @@
1/*
2 * Toshiba PCI Secure Digital Host Controller Interface driver
3 *
4 * Copyright (C) 2014 Ondrej Zary
5 * Copyright (C) 2007 Richard Betts, All Rights Reserved.
6 *
7 * Based on asic3_mmc.c, copyright (c) 2005 SDG Systems, LLC and,
8 * sdhci.c, copyright (C) 2005-2006 Pierre Ossman
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 */
15
16#include <linux/delay.h>
17#include <linux/device.h>
18#include <linux/module.h>
19#include <linux/pci.h>
20#include <linux/scatterlist.h>
21#include <linux/interrupt.h>
22#include <linux/io.h>
23#include <linux/pm.h>
24#include <linux/mmc/host.h>
25#include <linux/mmc/mmc.h>
26
27#include "toshsd.h"
28
29#define DRIVER_NAME "toshsd"
30
31static const struct pci_device_id pci_ids[] = {
32 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA, 0x0805) },
33 { /* end: all zeroes */ },
34};
35
36MODULE_DEVICE_TABLE(pci, pci_ids);
37
38static void toshsd_init(struct toshsd_host *host)
39{
40 /* enable clock */
41 pci_write_config_byte(host->pdev, SD_PCICFG_CLKSTOP,
42 SD_PCICFG_CLKSTOP_ENABLE_ALL);
43 pci_write_config_byte(host->pdev, SD_PCICFG_CARDDETECT, 2);
44
45 /* reset */
46 iowrite16(0, host->ioaddr + SD_SOFTWARERESET); /* assert */
47 mdelay(2);
48 iowrite16(1, host->ioaddr + SD_SOFTWARERESET); /* deassert */
49 mdelay(2);
50
51 /* Clear card registers */
52 iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
53 iowrite32(0, host->ioaddr + SD_CARDSTATUS);
54 iowrite32(0, host->ioaddr + SD_ERRORSTATUS0);
55 iowrite16(0, host->ioaddr + SD_STOPINTERNAL);
56
57 /* SDIO clock? */
58 iowrite16(0x100, host->ioaddr + SDIO_BASE + SDIO_CLOCKNWAITCTRL);
59
60 /* enable LED */
61 pci_write_config_byte(host->pdev, SD_PCICFG_SDLED_ENABLE1,
62 SD_PCICFG_LED_ENABLE1_START);
63 pci_write_config_byte(host->pdev, SD_PCICFG_SDLED_ENABLE2,
64 SD_PCICFG_LED_ENABLE2_START);
65
66 /* set interrupt masks */
67 iowrite32(~(u32)(SD_CARD_RESP_END | SD_CARD_RW_END
68 | SD_CARD_CARD_REMOVED_0 | SD_CARD_CARD_INSERTED_0
69 | SD_BUF_READ_ENABLE | SD_BUF_WRITE_ENABLE
70 | SD_BUF_CMD_TIMEOUT),
71 host->ioaddr + SD_INTMASKCARD);
72
73 iowrite16(0x1000, host->ioaddr + SD_TRANSACTIONCTRL);
74}
75
76/* Set MMC clock / power.
77 * Note: This controller uses a simple divider scheme therefore it cannot run
78 * SD/MMC cards at full speed (24/20MHz). HCLK (=33MHz PCI clock?) is too high
79 * and the next slowest is 16MHz (div=2).
80 */
81static void __toshsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
82{
83 struct toshsd_host *host = mmc_priv(mmc);
84
85 if (ios->clock) {
86 u16 clk;
87 int div = 1;
88
89 while (ios->clock < HCLK / div)
90 div *= 2;
91
92 clk = div >> 2;
93
94 if (div == 1) { /* disable the divider */
95 pci_write_config_byte(host->pdev, SD_PCICFG_CLKMODE,
96 SD_PCICFG_CLKMODE_DIV_DISABLE);
97 clk |= SD_CARDCLK_DIV_DISABLE;
98 } else
99 pci_write_config_byte(host->pdev, SD_PCICFG_CLKMODE, 0);
100
101 clk |= SD_CARDCLK_ENABLE_CLOCK;
102 iowrite16(clk, host->ioaddr + SD_CARDCLOCKCTRL);
103
104 mdelay(10);
105 } else
106 iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
107
108 switch (ios->power_mode) {
109 case MMC_POWER_OFF:
110 pci_write_config_byte(host->pdev, SD_PCICFG_POWER1,
111 SD_PCICFG_PWR1_OFF);
112 mdelay(1);
113 break;
114 case MMC_POWER_UP:
115 break;
116 case MMC_POWER_ON:
117 pci_write_config_byte(host->pdev, SD_PCICFG_POWER1,
118 SD_PCICFG_PWR1_33V);
119 pci_write_config_byte(host->pdev, SD_PCICFG_POWER2,
120 SD_PCICFG_PWR2_AUTO);
121 mdelay(20);
122 break;
123 }
124
125 switch (ios->bus_width) {
126 case MMC_BUS_WIDTH_1:
127 iowrite16(SD_CARDOPT_REQUIRED | SD_CARDOPT_DATA_RESP_TIMEOUT(14)
128 | SD_CARDOPT_C2_MODULE_ABSENT
129 | SD_CARDOPT_DATA_XFR_WIDTH_1,
130 host->ioaddr + SD_CARDOPTIONSETUP);
131 break;
132 case MMC_BUS_WIDTH_4:
133 iowrite16(SD_CARDOPT_REQUIRED | SD_CARDOPT_DATA_RESP_TIMEOUT(14)
134 | SD_CARDOPT_C2_MODULE_ABSENT
135 | SD_CARDOPT_DATA_XFR_WIDTH_4,
136 host->ioaddr + SD_CARDOPTIONSETUP);
137 break;
138 }
139}
140
141static void toshsd_set_led(struct toshsd_host *host, unsigned char state)
142{
143 iowrite16(state, host->ioaddr + SDIO_BASE + SDIO_LEDCTRL);
144}
145
146static void toshsd_finish_request(struct toshsd_host *host)
147{
148 struct mmc_request *mrq = host->mrq;
149
150 /* Write something to end the command */
151 host->mrq = NULL;
152 host->cmd = NULL;
153 host->data = NULL;
154
155 toshsd_set_led(host, 0);
156 mmc_request_done(host->mmc, mrq);
157}
158
159static irqreturn_t toshsd_thread_irq(int irq, void *dev_id)
160{
161 struct toshsd_host *host = dev_id;
162 struct mmc_data *data = host->data;
163 struct sg_mapping_iter *sg_miter = &host->sg_miter;
164 unsigned short *buf;
165 int count;
166 unsigned long flags;
167
168 if (!data) {
169 dev_warn(&host->pdev->dev, "Spurious Data IRQ\n");
170 if (host->cmd) {
171 host->cmd->error = -EIO;
172 toshsd_finish_request(host);
173 }
174 return IRQ_NONE;
175 }
176 spin_lock_irqsave(&host->lock, flags);
177
178 if (!sg_miter_next(sg_miter))
179 return IRQ_HANDLED;
180 buf = sg_miter->addr;
181
182 /* Ensure we dont read more than one block. The chip will interrupt us
183 * When the next block is available.
184 */
185 count = sg_miter->length;
186 if (count > data->blksz)
187 count = data->blksz;
188
189 dev_dbg(&host->pdev->dev, "count: %08x, flags %08x\n", count,
190 data->flags);
191
192 /* Transfer the data */
193 if (data->flags & MMC_DATA_READ)
194 ioread32_rep(host->ioaddr + SD_DATAPORT, buf, count >> 2);
195 else
196 iowrite32_rep(host->ioaddr + SD_DATAPORT, buf, count >> 2);
197
198 sg_miter->consumed = count;
199 sg_miter_stop(sg_miter);
200
201 spin_unlock_irqrestore(&host->lock, flags);
202
203 return IRQ_HANDLED;
204}
205
206static void toshsd_cmd_irq(struct toshsd_host *host)
207{
208 struct mmc_command *cmd = host->cmd;
209 u8 *buf;
210 u16 data;
211
212 if (!host->cmd) {
213 dev_warn(&host->pdev->dev, "Spurious CMD irq\n");
214 return;
215 }
216 buf = (u8 *)cmd->resp;
217 host->cmd = NULL;
218
219 if (cmd->flags & MMC_RSP_PRESENT && cmd->flags & MMC_RSP_136) {
220 /* R2 */
221 buf[12] = 0xff;
222 data = ioread16(host->ioaddr + SD_RESPONSE0);
223 buf[13] = data & 0xff;
224 buf[14] = data >> 8;
225 data = ioread16(host->ioaddr + SD_RESPONSE1);
226 buf[15] = data & 0xff;
227 buf[8] = data >> 8;
228 data = ioread16(host->ioaddr + SD_RESPONSE2);
229 buf[9] = data & 0xff;
230 buf[10] = data >> 8;
231 data = ioread16(host->ioaddr + SD_RESPONSE3);
232 buf[11] = data & 0xff;
233 buf[4] = data >> 8;
234 data = ioread16(host->ioaddr + SD_RESPONSE4);
235 buf[5] = data & 0xff;
236 buf[6] = data >> 8;
237 data = ioread16(host->ioaddr + SD_RESPONSE5);
238 buf[7] = data & 0xff;
239 buf[0] = data >> 8;
240 data = ioread16(host->ioaddr + SD_RESPONSE6);
241 buf[1] = data & 0xff;
242 buf[2] = data >> 8;
243 data = ioread16(host->ioaddr + SD_RESPONSE7);
244 buf[3] = data & 0xff;
245 } else if (cmd->flags & MMC_RSP_PRESENT) {
246 /* R1, R1B, R3, R6, R7 */
247 data = ioread16(host->ioaddr + SD_RESPONSE0);
248 buf[0] = data & 0xff;
249 buf[1] = data >> 8;
250 data = ioread16(host->ioaddr + SD_RESPONSE1);
251 buf[2] = data & 0xff;
252 buf[3] = data >> 8;
253 }
254
255 dev_dbg(&host->pdev->dev, "Command IRQ complete %d %d %x\n",
256 cmd->opcode, cmd->error, cmd->flags);
257
258 /* If there is data to handle we will
259 * finish the request in the mmc_data_end_irq handler.*/
260 if (host->data)
261 return;
262
263 toshsd_finish_request(host);
264}
265
266static void toshsd_data_end_irq(struct toshsd_host *host)
267{
268 struct mmc_data *data = host->data;
269
270 host->data = NULL;
271
272 if (!data) {
273 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
274 return;
275 }
276
277 if (data->error == 0)
278 data->bytes_xfered = data->blocks * data->blksz;
279 else
280 data->bytes_xfered = 0;
281
282 dev_dbg(&host->pdev->dev, "Completed data request xfr=%d\n",
283 data->bytes_xfered);
284
285 iowrite16(0, host->ioaddr + SD_STOPINTERNAL);
286
287 toshsd_finish_request(host);
288}
289
290static irqreturn_t toshsd_irq(int irq, void *dev_id)
291{
292 struct toshsd_host *host = dev_id;
293 u32 int_reg, int_mask, int_status, detail;
294 int error = 0, ret = IRQ_HANDLED;
295
296 spin_lock(&host->lock);
297 int_status = ioread32(host->ioaddr + SD_CARDSTATUS);
298 int_mask = ioread32(host->ioaddr + SD_INTMASKCARD);
299 int_reg = int_status & ~int_mask & ~IRQ_DONT_CARE_BITS;
300
301 dev_dbg(&host->pdev->dev, "IRQ status:%x mask:%x\n",
302 int_status, int_mask);
303
304 /* nothing to do: it's not our IRQ */
305 if (!int_reg) {
306 ret = IRQ_NONE;
307 goto irq_end;
308 }
309
310 if (int_reg & SD_BUF_CMD_TIMEOUT) {
311 error = -ETIMEDOUT;
312 dev_dbg(&host->pdev->dev, "Timeout\n");
313 } else if (int_reg & SD_BUF_CRC_ERR) {
314 error = -EILSEQ;
315 dev_err(&host->pdev->dev, "BadCRC\n");
316 } else if (int_reg & (SD_BUF_ILLEGAL_ACCESS
317 | SD_BUF_CMD_INDEX_ERR
318 | SD_BUF_STOP_BIT_END_ERR
319 | SD_BUF_OVERFLOW
320 | SD_BUF_UNDERFLOW
321 | SD_BUF_DATA_TIMEOUT)) {
322 dev_err(&host->pdev->dev, "Buffer status error: { %s%s%s%s%s%s}\n",
323 int_reg & SD_BUF_ILLEGAL_ACCESS ? "ILLEGAL_ACC " : "",
324 int_reg & SD_BUF_CMD_INDEX_ERR ? "CMD_INDEX " : "",
325 int_reg & SD_BUF_STOP_BIT_END_ERR ? "STOPBIT_END " : "",
326 int_reg & SD_BUF_OVERFLOW ? "OVERFLOW " : "",
327 int_reg & SD_BUF_UNDERFLOW ? "UNDERFLOW " : "",
328 int_reg & SD_BUF_DATA_TIMEOUT ? "DATA_TIMEOUT " : "");
329
330 detail = ioread32(host->ioaddr + SD_ERRORSTATUS0);
331 dev_err(&host->pdev->dev, "detail error status { %s%s%s%s%s%s%s%s%s%s%s%s%s}\n",
332 detail & SD_ERR0_RESP_CMD_ERR ? "RESP_CMD " : "",
333 detail & SD_ERR0_RESP_NON_CMD12_END_BIT_ERR ? "RESP_END_BIT " : "",
334 detail & SD_ERR0_RESP_CMD12_END_BIT_ERR ? "RESP_END_BIT " : "",
335 detail & SD_ERR0_READ_DATA_END_BIT_ERR ? "READ_DATA_END_BIT " : "",
336 detail & SD_ERR0_WRITE_CRC_STATUS_END_BIT_ERR ? "WRITE_CMD_END_BIT " : "",
337 detail & SD_ERR0_RESP_NON_CMD12_CRC_ERR ? "RESP_CRC " : "",
338 detail & SD_ERR0_RESP_CMD12_CRC_ERR ? "RESP_CRC " : "",
339 detail & SD_ERR0_READ_DATA_CRC_ERR ? "READ_DATA_CRC " : "",
340 detail & SD_ERR0_WRITE_CMD_CRC_ERR ? "WRITE_CMD_CRC " : "",
341 detail & SD_ERR1_NO_CMD_RESP ? "NO_CMD_RESP " : "",
342 detail & SD_ERR1_TIMEOUT_READ_DATA ? "READ_DATA_TIMEOUT " : "",
343 detail & SD_ERR1_TIMEOUT_CRS_STATUS ? "CRS_STATUS_TIMEOUT " : "",
344 detail & SD_ERR1_TIMEOUT_CRC_BUSY ? "CRC_BUSY_TIMEOUT " : "");
345 error = -EIO;
346 }
347
348 if (error) {
349 if (host->cmd)
350 host->cmd->error = error;
351
352 if (error == -ETIMEDOUT) {
353 iowrite32(int_status &
354 ~(SD_BUF_CMD_TIMEOUT | SD_CARD_RESP_END),
355 host->ioaddr + SD_CARDSTATUS);
356 } else {
357 toshsd_init(host);
358 __toshsd_set_ios(host->mmc, &host->mmc->ios);
359 goto irq_end;
360 }
361 }
362
363 /* Card insert/remove. The mmc controlling code is stateless. */
364 if (int_reg & (SD_CARD_CARD_INSERTED_0 | SD_CARD_CARD_REMOVED_0)) {
365 iowrite32(int_status &
366 ~(SD_CARD_CARD_REMOVED_0 | SD_CARD_CARD_INSERTED_0),
367 host->ioaddr + SD_CARDSTATUS);
368
369 if (int_reg & SD_CARD_CARD_INSERTED_0)
370 toshsd_init(host);
371
372 mmc_detect_change(host->mmc, 1);
373 }
374
375 /* Data transfer */
376 if (int_reg & (SD_BUF_READ_ENABLE | SD_BUF_WRITE_ENABLE)) {
377 iowrite32(int_status &
378 ~(SD_BUF_WRITE_ENABLE | SD_BUF_READ_ENABLE),
379 host->ioaddr + SD_CARDSTATUS);
380
381 ret = IRQ_WAKE_THREAD;
382 goto irq_end;
383 }
384
385 /* Command completion */
386 if (int_reg & SD_CARD_RESP_END) {
387 iowrite32(int_status & ~(SD_CARD_RESP_END),
388 host->ioaddr + SD_CARDSTATUS);
389 toshsd_cmd_irq(host);
390 }
391
392 /* Data transfer completion */
393 if (int_reg & SD_CARD_RW_END) {
394 iowrite32(int_status & ~(SD_CARD_RW_END),
395 host->ioaddr + SD_CARDSTATUS);
396 toshsd_data_end_irq(host);
397 }
398irq_end:
399 spin_unlock(&host->lock);
400 return ret;
401}
402
403static void toshsd_start_cmd(struct toshsd_host *host, struct mmc_command *cmd)
404{
405 struct mmc_data *data = host->data;
406 int c = cmd->opcode;
407
408 dev_dbg(&host->pdev->dev, "Command opcode: %d\n", cmd->opcode);
409
410 if (cmd->opcode == MMC_STOP_TRANSMISSION) {
411 iowrite16(SD_STOPINT_ISSUE_CMD12,
412 host->ioaddr + SD_STOPINTERNAL);
413
414 cmd->resp[0] = cmd->opcode;
415 cmd->resp[1] = 0;
416 cmd->resp[2] = 0;
417 cmd->resp[3] = 0;
418
419 toshsd_finish_request(host);
420 return;
421 }
422
423 switch (mmc_resp_type(cmd)) {
424 case MMC_RSP_NONE:
425 c |= SD_CMD_RESP_TYPE_NONE;
426 break;
427
428 case MMC_RSP_R1:
429 c |= SD_CMD_RESP_TYPE_EXT_R1;
430 break;
431 case MMC_RSP_R1B:
432 c |= SD_CMD_RESP_TYPE_EXT_R1B;
433 break;
434 case MMC_RSP_R2:
435 c |= SD_CMD_RESP_TYPE_EXT_R2;
436 break;
437 case MMC_RSP_R3:
438 c |= SD_CMD_RESP_TYPE_EXT_R3;
439 break;
440
441 default:
442 dev_err(&host->pdev->dev, "Unknown response type %d\n",
443 mmc_resp_type(cmd));
444 break;
445 }
446
447 host->cmd = cmd;
448
449 if (cmd->opcode == MMC_APP_CMD)
450 c |= SD_CMD_TYPE_ACMD;
451
452 if (cmd->opcode == MMC_GO_IDLE_STATE)
453 c |= (3 << 8); /* removed from ipaq-asic3.h for some reason */
454
455 if (data) {
456 c |= SD_CMD_DATA_PRESENT;
457
458 if (data->blocks > 1) {
459 iowrite16(SD_STOPINT_AUTO_ISSUE_CMD12,
460 host->ioaddr + SD_STOPINTERNAL);
461 c |= SD_CMD_MULTI_BLOCK;
462 }
463
464 if (data->flags & MMC_DATA_READ)
465 c |= SD_CMD_TRANSFER_READ;
466
467 /* MMC_DATA_WRITE does not require a bit to be set */
468 }
469
470 /* Send the command */
471 iowrite32(cmd->arg, host->ioaddr + SD_ARG0);
472 iowrite16(c, host->ioaddr + SD_CMD);
473}
474
475static void toshsd_start_data(struct toshsd_host *host, struct mmc_data *data)
476{
477 unsigned int flags = SG_MITER_ATOMIC;
478
479 dev_dbg(&host->pdev->dev, "setup data transfer: blocksize %08x nr_blocks %d, offset: %08x\n",
480 data->blksz, data->blocks, data->sg->offset);
481
482 host->data = data;
483
484 if (data->flags & MMC_DATA_READ)
485 flags |= SG_MITER_TO_SG;
486 else
487 flags |= SG_MITER_FROM_SG;
488
489 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
490
491 /* Set transfer length and blocksize */
492 iowrite16(data->blocks, host->ioaddr + SD_BLOCKCOUNT);
493 iowrite16(data->blksz, host->ioaddr + SD_CARDXFERDATALEN);
494}
495
496/* Process requests from the MMC layer */
497static void toshsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
498{
499 struct toshsd_host *host = mmc_priv(mmc);
500 unsigned long flags;
501
502 /* abort if card not present */
503 if (!(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_PRESENT_0)) {
504 mrq->cmd->error = -ENOMEDIUM;
505 mmc_request_done(mmc, mrq);
506 return;
507 }
508
509 spin_lock_irqsave(&host->lock, flags);
510
511 WARN_ON(host->mrq != NULL);
512
513 host->mrq = mrq;
514
515 if (mrq->data)
516 toshsd_start_data(host, mrq->data);
517
518 toshsd_set_led(host, 1);
519
520 toshsd_start_cmd(host, mrq->cmd);
521
522 spin_unlock_irqrestore(&host->lock, flags);
523}
524
525static void toshsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
526{
527 struct toshsd_host *host = mmc_priv(mmc);
528 unsigned long flags;
529
530 spin_lock_irqsave(&host->lock, flags);
531 __toshsd_set_ios(mmc, ios);
532 spin_unlock_irqrestore(&host->lock, flags);
533}
534
535static int toshsd_get_ro(struct mmc_host *mmc)
536{
537 struct toshsd_host *host = mmc_priv(mmc);
538
539 /* active low */
540 return !(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_WRITE_PROTECT);
541}
542
543static int toshsd_get_cd(struct mmc_host *mmc)
544{
545 struct toshsd_host *host = mmc_priv(mmc);
546
547 return !!(ioread16(host->ioaddr + SD_CARDSTATUS) & SD_CARD_PRESENT_0);
548}
549
550static struct mmc_host_ops toshsd_ops = {
551 .request = toshsd_request,
552 .set_ios = toshsd_set_ios,
553 .get_ro = toshsd_get_ro,
554 .get_cd = toshsd_get_cd,
555};
556
557
558static void toshsd_powerdown(struct toshsd_host *host)
559{
560 /* mask all interrupts */
561 iowrite32(0xffffffff, host->ioaddr + SD_INTMASKCARD);
562 /* disable card clock */
563 iowrite16(0x000, host->ioaddr + SDIO_BASE + SDIO_CLOCKNWAITCTRL);
564 iowrite16(0, host->ioaddr + SD_CARDCLOCKCTRL);
565 /* power down card */
566 pci_write_config_byte(host->pdev, SD_PCICFG_POWER1, SD_PCICFG_PWR1_OFF);
567 /* disable clock */
568 pci_write_config_byte(host->pdev, SD_PCICFG_CLKSTOP, 0);
569}
570
571#ifdef CONFIG_PM_SLEEP
572static int toshsd_pm_suspend(struct device *dev)
573{
574 struct pci_dev *pdev = to_pci_dev(dev);
575 struct toshsd_host *host = pci_get_drvdata(pdev);
576
577 toshsd_powerdown(host);
578
579 pci_save_state(pdev);
580 pci_enable_wake(pdev, PCI_D3hot, 0);
581 pci_disable_device(pdev);
582 pci_set_power_state(pdev, PCI_D3hot);
583
584 return 0;
585}
586
587static int toshsd_pm_resume(struct device *dev)
588{
589 struct pci_dev *pdev = to_pci_dev(dev);
590 struct toshsd_host *host = pci_get_drvdata(pdev);
591 int ret;
592
593 pci_set_power_state(pdev, PCI_D0);
594 pci_restore_state(pdev);
595 ret = pci_enable_device(pdev);
596 if (ret)
597 return ret;
598
599 toshsd_init(host);
600
601 return 0;
602}
603#endif /* CONFIG_PM_SLEEP */
604
605static int toshsd_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
606{
607 int ret;
608 struct toshsd_host *host;
609 struct mmc_host *mmc;
610 resource_size_t base;
611
612 ret = pci_enable_device(pdev);
613 if (ret)
614 return ret;
615
616 mmc = mmc_alloc_host(sizeof(struct toshsd_host), &pdev->dev);
617 if (!mmc) {
618 ret = -ENOMEM;
619 goto err;
620 }
621
622 host = mmc_priv(mmc);
623 host->mmc = mmc;
624
625 host->pdev = pdev;
626 pci_set_drvdata(pdev, host);
627
628 ret = pci_request_regions(pdev, DRIVER_NAME);
629 if (ret)
630 goto free;
631
632 host->ioaddr = pci_iomap(pdev, 0, 0);
633 if (!host->ioaddr) {
634 ret = -ENOMEM;
635 goto release;
636 }
637
638 /* Set MMC host parameters */
639 mmc->ops = &toshsd_ops;
640 mmc->caps = MMC_CAP_4_BIT_DATA;
641 mmc->ocr_avail = MMC_VDD_32_33;
642
643 mmc->f_min = HCLK / 512;
644 mmc->f_max = HCLK;
645
646 spin_lock_init(&host->lock);
647
648 toshsd_init(host);
649
650 ret = request_threaded_irq(pdev->irq, toshsd_irq, toshsd_thread_irq,
651 IRQF_SHARED, DRIVER_NAME, host);
652 if (ret)
653 goto unmap;
654
655 mmc_add_host(mmc);
656
657 base = pci_resource_start(pdev, 0);
658 dev_dbg(&pdev->dev, "MMIO %pa, IRQ %d\n", &base, pdev->irq);
659
660 pm_suspend_ignore_children(&pdev->dev, 1);
661
662 return 0;
663
664unmap:
665 pci_iounmap(pdev, host->ioaddr);
666release:
667 pci_release_regions(pdev);
668free:
669 mmc_free_host(mmc);
670 pci_set_drvdata(pdev, NULL);
671err:
672 pci_disable_device(pdev);
673 return ret;
674}
675
676static void toshsd_remove(struct pci_dev *pdev)
677{
678 struct toshsd_host *host = pci_get_drvdata(pdev);
679
680 mmc_remove_host(host->mmc);
681 toshsd_powerdown(host);
682 free_irq(pdev->irq, host);
683 pci_iounmap(pdev, host->ioaddr);
684 pci_release_regions(pdev);
685 mmc_free_host(host->mmc);
686 pci_set_drvdata(pdev, NULL);
687 pci_disable_device(pdev);
688}
689
690static const struct dev_pm_ops toshsd_pm_ops = {
691 SET_SYSTEM_SLEEP_PM_OPS(toshsd_pm_suspend, toshsd_pm_resume)
692};
693
694static struct pci_driver toshsd_driver = {
695 .name = DRIVER_NAME,
696 .id_table = pci_ids,
697 .probe = toshsd_probe,
698 .remove = toshsd_remove,
699 .driver.pm = &toshsd_pm_ops,
700};
701
702static int __init toshsd_drv_init(void)
703{
704 return pci_register_driver(&toshsd_driver);
705}
706
707static void __exit toshsd_drv_exit(void)
708{
709 pci_unregister_driver(&toshsd_driver);
710}
711
712module_init(toshsd_drv_init);
713module_exit(toshsd_drv_exit);
714
715MODULE_AUTHOR("Ondrej Zary, Richard Betts");
716MODULE_DESCRIPTION("Toshiba PCI Secure Digital Host Controller Interface driver");
717MODULE_LICENSE("GPL");
diff --git a/drivers/mmc/host/toshsd.h b/drivers/mmc/host/toshsd.h
new file mode 100644
index 000000000000..b6c0d89e53a6
--- /dev/null
+++ b/drivers/mmc/host/toshsd.h
@@ -0,0 +1,176 @@
1/*
2 * Toshiba PCI Secure Digital Host Controller Interface driver
3 *
4 * Copyright (C) 2014 Ondrej Zary
5 * Copyright (C) 2007 Richard Betts, All Rights Reserved.
6 *
7 * Based on asic3_mmc.c Copyright (c) 2005 SDG Systems, LLC
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or (at
12 * your option) any later version.
13 */
14
15#define HCLK 33000000 /* 33 MHz (PCI clock) */
16
17#define SD_PCICFG_CLKSTOP 0x40 /* 0x1f = clock controller, 0 = stop */
18#define SD_PCICFG_GATEDCLK 0x41 /* Gated clock */
19#define SD_PCICFG_CLKMODE 0x42 /* Control clock of SD controller */
20#define SD_PCICFG_PINSTATUS 0x44 /* R/O: read status of SD pins */
21#define SD_PCICFG_POWER1 0x48
22#define SD_PCICFG_POWER2 0x49
23#define SD_PCICFG_POWER3 0x4a
24#define SD_PCICFG_CARDDETECT 0x4c
25#define SD_PCICFG_SLOTS 0x50 /* R/O: define support slot number */
26#define SD_PCICFG_EXTGATECLK1 0xf0 /* Could be used for gated clock */
27#define SD_PCICFG_EXTGATECLK2 0xf1 /* Could be used for gated clock */
28#define SD_PCICFG_EXTGATECLK3 0xf9 /* Bit 1: double buffer/single buffer */
29#define SD_PCICFG_SDLED_ENABLE1 0xfa
30#define SD_PCICFG_SDLED_ENABLE2 0xfe
31
32#define SD_PCICFG_CLKMODE_DIV_DISABLE BIT(0)
33#define SD_PCICFG_CLKSTOP_ENABLE_ALL 0x1f
34#define SD_PCICFG_LED_ENABLE1_START 0x12
35#define SD_PCICFG_LED_ENABLE2_START 0x80
36
37#define SD_PCICFG_PWR1_33V 0x08 /* Set for 3.3 volts */
38#define SD_PCICFG_PWR1_OFF 0x00 /* Turn off power */
39#define SD_PCICFG_PWR2_AUTO 0x02
40
41#define SD_CMD 0x00 /* also for SDIO */
42#define SD_ARG0 0x04 /* also for SDIO */
43#define SD_ARG1 0x06 /* also for SDIO */
44#define SD_STOPINTERNAL 0x08
45#define SD_BLOCKCOUNT 0x0a /* also for SDIO */
46#define SD_RESPONSE0 0x0c /* also for SDIO */
47#define SD_RESPONSE1 0x0e /* also for SDIO */
48#define SD_RESPONSE2 0x10 /* also for SDIO */
49#define SD_RESPONSE3 0x12 /* also for SDIO */
50#define SD_RESPONSE4 0x14 /* also for SDIO */
51#define SD_RESPONSE5 0x16 /* also for SDIO */
52#define SD_RESPONSE6 0x18 /* also for SDIO */
53#define SD_RESPONSE7 0x1a /* also for SDIO */
54#define SD_CARDSTATUS 0x1c /* also for SDIO */
55#define SD_BUFFERCTRL 0x1e /* also for SDIO */
56#define SD_INTMASKCARD 0x20 /* also for SDIO */
57#define SD_INTMASKBUFFER 0x22 /* also for SDIO */
58#define SD_CARDCLOCKCTRL 0x24
59#define SD_CARDXFERDATALEN 0x26 /* also for SDIO */
60#define SD_CARDOPTIONSETUP 0x28 /* also for SDIO */
61#define SD_ERRORSTATUS0 0x2c /* also for SDIO */
62#define SD_ERRORSTATUS1 0x2e /* also for SDIO */
63#define SD_DATAPORT 0x30 /* also for SDIO */
64#define SD_TRANSACTIONCTRL 0x34 /* also for SDIO */
65#define SD_SOFTWARERESET 0xe0 /* also for SDIO */
66
67/* registers above marked "also for SDIO" and all SDIO registers below can be
68 * accessed at SDIO_BASE + reg address */
69#define SDIO_BASE 0x100
70
71#define SDIO_CARDPORTSEL 0x02
72#define SDIO_CARDINTCTRL 0x36
73#define SDIO_CLOCKNWAITCTRL 0x38
74#define SDIO_HOSTINFORMATION 0x3a
75#define SDIO_ERRORCTRL 0x3c
76#define SDIO_LEDCTRL 0x3e
77
78#define SD_TRANSCTL_SET BIT(8)
79
80#define SD_CARDCLK_DIV_DISABLE BIT(15)
81#define SD_CARDCLK_ENABLE_CLOCK BIT(8)
82#define SD_CARDCLK_CLK_DIV_512 BIT(7)
83#define SD_CARDCLK_CLK_DIV_256 BIT(6)
84#define SD_CARDCLK_CLK_DIV_128 BIT(5)
85#define SD_CARDCLK_CLK_DIV_64 BIT(4)
86#define SD_CARDCLK_CLK_DIV_32 BIT(3)
87#define SD_CARDCLK_CLK_DIV_16 BIT(2)
88#define SD_CARDCLK_CLK_DIV_8 BIT(1)
89#define SD_CARDCLK_CLK_DIV_4 BIT(0)
90#define SD_CARDCLK_CLK_DIV_2 0
91
92#define SD_CARDOPT_REQUIRED 0x000e
93#define SD_CARDOPT_DATA_RESP_TIMEOUT(x) (((x) & 0x0f) << 4) /* 4 bits */
94#define SD_CARDOPT_C2_MODULE_ABSENT BIT(14)
95#define SD_CARDOPT_DATA_XFR_WIDTH_1 (1 << 15)
96#define SD_CARDOPT_DATA_XFR_WIDTH_4 (0 << 15)
97
98#define SD_CMD_TYPE_CMD (0 << 6)
99#define SD_CMD_TYPE_ACMD (1 << 6)
100#define SD_CMD_TYPE_AUTHEN (2 << 6)
101#define SD_CMD_RESP_TYPE_NONE (3 << 8)
102#define SD_CMD_RESP_TYPE_EXT_R1 (4 << 8)
103#define SD_CMD_RESP_TYPE_EXT_R1B (5 << 8)
104#define SD_CMD_RESP_TYPE_EXT_R2 (6 << 8)
105#define SD_CMD_RESP_TYPE_EXT_R3 (7 << 8)
106#define SD_CMD_RESP_TYPE_EXT_R6 (4 << 8)
107#define SD_CMD_RESP_TYPE_EXT_R7 (4 << 8)
108#define SD_CMD_DATA_PRESENT BIT(11)
109#define SD_CMD_TRANSFER_READ BIT(12)
110#define SD_CMD_MULTI_BLOCK BIT(13)
111#define SD_CMD_SECURITY_CMD BIT(14)
112
113#define SD_STOPINT_ISSUE_CMD12 BIT(0)
114#define SD_STOPINT_AUTO_ISSUE_CMD12 BIT(8)
115
116#define SD_CARD_RESP_END BIT(0)
117#define SD_CARD_RW_END BIT(2)
118#define SD_CARD_CARD_REMOVED_0 BIT(3)
119#define SD_CARD_CARD_INSERTED_0 BIT(4)
120#define SD_CARD_PRESENT_0 BIT(5)
121#define SD_CARD_UNK6 BIT(6)
122#define SD_CARD_WRITE_PROTECT BIT(7)
123#define SD_CARD_CARD_REMOVED_3 BIT(8)
124#define SD_CARD_CARD_INSERTED_3 BIT(9)
125#define SD_CARD_PRESENT_3 BIT(10)
126
127#define SD_BUF_CMD_INDEX_ERR BIT(16)
128#define SD_BUF_CRC_ERR BIT(17)
129#define SD_BUF_STOP_BIT_END_ERR BIT(18)
130#define SD_BUF_DATA_TIMEOUT BIT(19)
131#define SD_BUF_OVERFLOW BIT(20)
132#define SD_BUF_UNDERFLOW BIT(21)
133#define SD_BUF_CMD_TIMEOUT BIT(22)
134#define SD_BUF_UNK7 BIT(23)
135#define SD_BUF_READ_ENABLE BIT(24)
136#define SD_BUF_WRITE_ENABLE BIT(25)
137#define SD_BUF_ILLEGAL_FUNCTION BIT(29)
138#define SD_BUF_CMD_BUSY BIT(30)
139#define SD_BUF_ILLEGAL_ACCESS BIT(31)
140
141#define SD_ERR0_RESP_CMD_ERR BIT(0)
142#define SD_ERR0_RESP_NON_CMD12_END_BIT_ERR BIT(2)
143#define SD_ERR0_RESP_CMD12_END_BIT_ERR BIT(3)
144#define SD_ERR0_READ_DATA_END_BIT_ERR BIT(4)
145#define SD_ERR0_WRITE_CRC_STATUS_END_BIT_ERR BIT(5)
146#define SD_ERR0_RESP_NON_CMD12_CRC_ERR BIT(8)
147#define SD_ERR0_RESP_CMD12_CRC_ERR BIT(9)
148#define SD_ERR0_READ_DATA_CRC_ERR BIT(10)
149#define SD_ERR0_WRITE_CMD_CRC_ERR BIT(11)
150
151#define SD_ERR1_NO_CMD_RESP BIT(16)
152#define SD_ERR1_TIMEOUT_READ_DATA BIT(20)
153#define SD_ERR1_TIMEOUT_CRS_STATUS BIT(21)
154#define SD_ERR1_TIMEOUT_CRC_BUSY BIT(22)
155
156#define IRQ_DONT_CARE_BITS (SD_CARD_PRESENT_3 \
157 | SD_CARD_WRITE_PROTECT \
158 | SD_CARD_UNK6 \
159 | SD_CARD_PRESENT_0 \
160 | SD_BUF_UNK7 \
161 | SD_BUF_CMD_BUSY)
162
163struct toshsd_host {
164 struct pci_dev *pdev;
165 struct mmc_host *mmc;
166
167 spinlock_t lock;
168
169 struct mmc_request *mrq;/* Current request */
170 struct mmc_command *cmd;/* Current command */
171 struct mmc_data *data; /* Current data request */
172
173 struct sg_mapping_iter sg_miter; /* for PIO */
174
175 void __iomem *ioaddr; /* mapped address */
176};
diff --git a/include/linux/atmel-mci.h b/include/linux/atmel-mci.h
index 91b77f8d495d..9177947bf032 100644
--- a/include/linux/atmel-mci.h
+++ b/include/linux/atmel-mci.h
@@ -11,6 +11,7 @@
11 * @detect_pin: GPIO pin wired to the card detect switch 11 * @detect_pin: GPIO pin wired to the card detect switch
12 * @wp_pin: GPIO pin wired to the write protect sensor 12 * @wp_pin: GPIO pin wired to the write protect sensor
13 * @detect_is_active_high: The state of the detect pin when it is active 13 * @detect_is_active_high: The state of the detect pin when it is active
14 * @non_removable: The slot is not removable, only detect once
14 * 15 *
15 * If a given slot is not present on the board, @bus_width should be 16 * If a given slot is not present on the board, @bus_width should be
16 * set to 0. The other fields are ignored in this case. 17 * set to 0. The other fields are ignored in this case.
@@ -26,6 +27,7 @@ struct mci_slot_pdata {
26 int detect_pin; 27 int detect_pin;
27 int wp_pin; 28 int wp_pin;
28 bool detect_is_active_high; 29 bool detect_is_active_high;
30 bool non_removable;
29}; 31};
30 32
31/** 33/**
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index b0692d28f8e6..4d69c00497bd 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -88,6 +88,9 @@ struct mmc_ext_csd {
88 unsigned int data_tag_unit_size; /* DATA TAG UNIT size */ 88 unsigned int data_tag_unit_size; /* DATA TAG UNIT size */
89 unsigned int boot_ro_lock; /* ro lock support */ 89 unsigned int boot_ro_lock; /* ro lock support */
90 bool boot_ro_lockable; 90 bool boot_ro_lockable;
91 bool ffu_capable; /* Firmware upgrade support */
92#define MMC_FIRMWARE_LEN 8
93 u8 fwrev[MMC_FIRMWARE_LEN]; /* FW version */
91 u8 raw_exception_status; /* 54 */ 94 u8 raw_exception_status; /* 54 */
92 u8 raw_partition_support; /* 160 */ 95 u8 raw_partition_support; /* 160 */
93 u8 raw_rpmb_size_mult; /* 168 */ 96 u8 raw_rpmb_size_mult; /* 168 */
@@ -509,24 +512,8 @@ static inline int mmc_card_broken_irq_polling(const struct mmc_card *c)
509 512
510#define mmc_dev_to_card(d) container_of(d, struct mmc_card, dev) 513#define mmc_dev_to_card(d) container_of(d, struct mmc_card, dev)
511 514
512#define mmc_list_to_card(l) container_of(l, struct mmc_card, node) 515extern int mmc_register_driver(struct device_driver *);
513#define mmc_get_drvdata(c) dev_get_drvdata(&(c)->dev) 516extern void mmc_unregister_driver(struct device_driver *);
514#define mmc_set_drvdata(c,d) dev_set_drvdata(&(c)->dev, d)
515
516/*
517 * MMC device driver (e.g., Flash card, I/O card...)
518 */
519struct mmc_driver {
520 struct device_driver drv;
521 int (*probe)(struct mmc_card *);
522 void (*remove)(struct mmc_card *);
523 int (*suspend)(struct mmc_card *);
524 int (*resume)(struct mmc_card *);
525 void (*shutdown)(struct mmc_card *);
526};
527
528extern int mmc_register_driver(struct mmc_driver *);
529extern void mmc_unregister_driver(struct mmc_driver *);
530 517
531extern void mmc_fixup_device(struct mmc_card *card, 518extern void mmc_fixup_device(struct mmc_card *card,
532 const struct mmc_fixup *table); 519 const struct mmc_fixup *table);
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index f206e29f94d7..cb2b0400d284 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -154,7 +154,8 @@ extern void mmc_start_bkops(struct mmc_card *card, bool from_exception);
154extern int __mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int, bool, 154extern int __mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int, bool,
155 bool, bool); 155 bool, bool);
156extern int mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int); 156extern int mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int);
157extern int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd); 157extern int mmc_send_tuning(struct mmc_host *host);
158extern int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd);
158 159
159#define MMC_ERASE_ARG 0x00000000 160#define MMC_ERASE_ARG 0x00000000
160#define MMC_SECURE_ERASE_ARG 0x80000000 161#define MMC_SECURE_ERASE_ARG 0x80000000
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 001366927cf4..42b724e8d503 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -54,6 +54,7 @@ struct mmc_data;
54 * transfer is in progress. 54 * transfer is in progress.
55 * @use_dma: Whether DMA channel is initialized or not. 55 * @use_dma: Whether DMA channel is initialized or not.
56 * @using_dma: Whether DMA is in use for the current transfer. 56 * @using_dma: Whether DMA is in use for the current transfer.
57 * @dma_64bit_address: Whether DMA supports 64-bit address mode or not.
57 * @sg_dma: Bus address of DMA buffer. 58 * @sg_dma: Bus address of DMA buffer.
58 * @sg_cpu: Virtual address of DMA buffer. 59 * @sg_cpu: Virtual address of DMA buffer.
59 * @dma_ops: Pointer to platform-specific DMA callbacks. 60 * @dma_ops: Pointer to platform-specific DMA callbacks.
@@ -96,6 +97,7 @@ struct mmc_data;
96 * @quirks: Set of quirks that apply to specific versions of the IP. 97 * @quirks: Set of quirks that apply to specific versions of the IP.
97 * @irq_flags: The flags to be passed to request_irq. 98 * @irq_flags: The flags to be passed to request_irq.
98 * @irq: The irq value to be passed to request_irq. 99 * @irq: The irq value to be passed to request_irq.
100 * @sdio_id0: Number of slot0 in the SDIO interrupt registers.
99 * 101 *
100 * Locking 102 * Locking
101 * ======= 103 * =======
@@ -135,11 +137,11 @@ struct dw_mci {
135 struct mmc_command stop_abort; 137 struct mmc_command stop_abort;
136 unsigned int prev_blksz; 138 unsigned int prev_blksz;
137 unsigned char timing; 139 unsigned char timing;
138 struct workqueue_struct *card_workqueue;
139 140
140 /* DMA interface members*/ 141 /* DMA interface members*/
141 int use_dma; 142 int use_dma;
142 int using_dma; 143 int using_dma;
144 int dma_64bit_address;
143 145
144 dma_addr_t sg_dma; 146 dma_addr_t sg_dma;
145 void *sg_cpu; 147 void *sg_cpu;
@@ -154,7 +156,6 @@ struct dw_mci {
154 u32 stop_cmdr; 156 u32 stop_cmdr;
155 u32 dir_status; 157 u32 dir_status;
156 struct tasklet_struct tasklet; 158 struct tasklet_struct tasklet;
157 struct work_struct card_work;
158 unsigned long pending_events; 159 unsigned long pending_events;
159 unsigned long completed_events; 160 unsigned long completed_events;
160 enum dw_mci_state state; 161 enum dw_mci_state state;
@@ -193,6 +194,8 @@ struct dw_mci {
193 bool vqmmc_enabled; 194 bool vqmmc_enabled;
194 unsigned long irq_flags; /* IRQ flags */ 195 unsigned long irq_flags; /* IRQ flags */
195 int irq; 196 int irq;
197
198 int sdio_id0;
196}; 199};
197 200
198/* DMA ops for Internal/External DMAC interface */ 201/* DMA ops for Internal/External DMAC interface */
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index df0c15396bbf..9f322706f7cb 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -289,6 +289,7 @@ struct mmc_host {
289#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */ 289#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
290#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \ 290#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
291 MMC_CAP2_HS400_1_2V) 291 MMC_CAP2_HS400_1_2V)
292#define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
292#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17) 293#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
293 294
294 mmc_pm_flag_t pm_caps; /* supported pm features */ 295 mmc_pm_flag_t pm_caps; /* supported pm features */
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 1cd00b3a75b9..49ad7a943638 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -296,6 +296,7 @@ struct _mmc_csd {
296#define EXT_CSD_SANITIZE_START 165 /* W */ 296#define EXT_CSD_SANITIZE_START 165 /* W */
297#define EXT_CSD_WR_REL_PARAM 166 /* RO */ 297#define EXT_CSD_WR_REL_PARAM 166 /* RO */
298#define EXT_CSD_RPMB_MULT 168 /* RO */ 298#define EXT_CSD_RPMB_MULT 168 /* RO */
299#define EXT_CSD_FW_CONFIG 169 /* R/W */
299#define EXT_CSD_BOOT_WP 173 /* R/W */ 300#define EXT_CSD_BOOT_WP 173 /* R/W */
300#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ 301#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
301#define EXT_CSD_PART_CONFIG 179 /* R/W */ 302#define EXT_CSD_PART_CONFIG 179 /* R/W */
@@ -332,6 +333,8 @@ struct _mmc_csd {
332#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */ 333#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
333#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */ 334#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
334#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */ 335#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */
336#define EXT_CSD_FIRMWARE_VERSION 254 /* RO, 8 bytes */
337#define EXT_CSD_SUPPORTED_MODE 493 /* RO */
335#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */ 338#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */
336#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */ 339#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */
337#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */ 340#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index dba793e3a331..375af80bde7d 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -100,6 +100,12 @@ struct sdhci_host {
100#define SDHCI_QUIRK2_BROKEN_DDR50 (1<<7) 100#define SDHCI_QUIRK2_BROKEN_DDR50 (1<<7)
101/* Stop command (CMD12) can set Transfer Complete when not using MMC_RSP_BUSY */ 101/* Stop command (CMD12) can set Transfer Complete when not using MMC_RSP_BUSY */
102#define SDHCI_QUIRK2_STOP_WITH_TC (1<<8) 102#define SDHCI_QUIRK2_STOP_WITH_TC (1<<8)
103/* Controller does not support 64-bit DMA */
104#define SDHCI_QUIRK2_BROKEN_64_BIT_DMA (1<<9)
105/* need clear transfer mode register before send cmd */
106#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD (1<<10)
107/* Capability register bit-63 indicates HS400 support */
108#define SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 (1<<11)
103 109
104 int irq; /* Device IRQ */ 110 int irq; /* Device IRQ */
105 void __iomem *ioaddr; /* Mapped address */ 111 void __iomem *ioaddr; /* Mapped address */
@@ -130,6 +136,7 @@ struct sdhci_host {
130#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */ 136#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */
131#define SDHCI_SDR104_NEEDS_TUNING (1<<10) /* SDR104/HS200 needs tuning */ 137#define SDHCI_SDR104_NEEDS_TUNING (1<<10) /* SDR104/HS200 needs tuning */
132#define SDHCI_USING_RETUNING_TIMER (1<<11) /* Host is using a retuning timer for the card */ 138#define SDHCI_USING_RETUNING_TIMER (1<<11) /* Host is using a retuning timer for the card */
139#define SDHCI_USE_64_BIT_DMA (1<<12) /* Use 64-bit DMA */
133 140
134 unsigned int version; /* SDHCI spec. version */ 141 unsigned int version; /* SDHCI spec. version */
135 142
@@ -155,12 +162,19 @@ struct sdhci_host {
155 162
156 int sg_count; /* Mapped sg entries */ 163 int sg_count; /* Mapped sg entries */
157 164
158 u8 *adma_desc; /* ADMA descriptor table */ 165 void *adma_table; /* ADMA descriptor table */
159 u8 *align_buffer; /* Bounce buffer */ 166 void *align_buffer; /* Bounce buffer */
167
168 size_t adma_table_sz; /* ADMA descriptor table size */
169 size_t align_buffer_sz; /* Bounce buffer size */
160 170
161 dma_addr_t adma_addr; /* Mapped ADMA descr. table */ 171 dma_addr_t adma_addr; /* Mapped ADMA descr. table */
162 dma_addr_t align_addr; /* Mapped bounce buffer */ 172 dma_addr_t align_addr; /* Mapped bounce buffer */
163 173
174 unsigned int desc_sz; /* ADMA descriptor size */
175 unsigned int align_sz; /* ADMA alignment */
176 unsigned int align_mask; /* ADMA alignment mask */
177
164 struct tasklet_struct finish_tasklet; /* Tasklet structures */ 178 struct tasklet_struct finish_tasklet; /* Tasklet structures */
165 179
166 struct timer_list timer; /* Timer for timeouts */ 180 struct timer_list timer; /* Timer for timeouts */
diff --git a/include/linux/mmc/sdio_func.h b/include/linux/mmc/sdio_func.h
index 50f0bc952328..aab032a6ae61 100644
--- a/include/linux/mmc/sdio_func.h
+++ b/include/linux/mmc/sdio_func.h
@@ -84,8 +84,6 @@ struct sdio_driver {
84 struct device_driver drv; 84 struct device_driver drv;
85}; 85};
86 86
87#define to_sdio_driver(d) container_of(d, struct sdio_driver, drv)
88
89/** 87/**
90 * SDIO_DEVICE - macro used to describe a specific SDIO device 88 * SDIO_DEVICE - macro used to describe a specific SDIO device
91 * @vend: the 16 bit manufacturer code 89 * @vend: the 16 bit manufacturer code
diff --git a/include/linux/platform_data/hsmmc-omap.h b/include/linux/platform_data/hsmmc-omap.h
new file mode 100644
index 000000000000..67bbcf0785f6
--- /dev/null
+++ b/include/linux/platform_data/hsmmc-omap.h
@@ -0,0 +1,90 @@
1/*
2 * MMC definitions for OMAP2
3 *
4 * Copyright (C) 2006 Nokia Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11/*
12 * struct omap_hsmmc_dev_attr.flags possibilities
13 *
14 * OMAP_HSMMC_SUPPORTS_DUAL_VOLT: Some HSMMC controller instances can
15 * operate with either 1.8Vdc or 3.0Vdc card voltages; this flag
16 * should be set if this is the case. See for example Section 22.5.3
17 * "MMC/SD/SDIO1 Bus Voltage Selection" of the OMAP34xx Multimedia
18 * Device Silicon Revision 3.1.x Revision ZR (July 2011) (SWPU223R).
19 *
20 * OMAP_HSMMC_BROKEN_MULTIBLOCK_READ: Multiple-block read transfers
21 * don't work correctly on some MMC controller instances on some
22 * OMAP3 SoCs; this flag should be set if this is the case. See
23 * for example Advisory 2.1.1.128 "MMC: Multiple Block Read
24 * Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_
25 * Revision F (October 2010) (SPRZ278F).
26 */
27#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0)
28#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1)
29#define OMAP_HSMMC_SWAKEUP_MISSING BIT(2)
30
31struct omap_hsmmc_dev_attr {
32 u8 flags;
33};
34
35struct mmc_card;
36
37struct omap_hsmmc_platform_data {
38 /* back-link to device */
39 struct device *dev;
40
41 /* set if your board has components or wiring that limits the
42 * maximum frequency on the MMC bus */
43 unsigned int max_freq;
44
45 /* Integrating attributes from the omap_hwmod layer */
46 u8 controller_flags;
47
48 /* Register offset deviation */
49 u16 reg_offset;
50
51 /*
52 * 4/8 wires and any additional host capabilities
53 * need to OR'd all capabilities (ref. linux/mmc/host.h)
54 */
55 u32 caps; /* Used for the MMC driver on 2430 and later */
56 u32 pm_caps; /* PM capabilities of the mmc */
57
58 /* switch pin can be for card detect (default) or card cover */
59 unsigned cover:1;
60
61 /* use the internal clock */
62 unsigned internal_clock:1;
63
64 /* nonremovable e.g. eMMC */
65 unsigned nonremovable:1;
66
67 /* eMMC does not handle power off when not in sleep state */
68 unsigned no_regulator_off_init:1;
69
70 /* we can put the features above into this variable */
71#define HSMMC_HAS_PBIAS (1 << 0)
72#define HSMMC_HAS_UPDATED_RESET (1 << 1)
73#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
74 unsigned features;
75
76 int switch_pin; /* gpio (card detect) */
77 int gpio_wp; /* gpio (write protect) */
78
79 int (*set_power)(struct device *dev, int power_on, int vdd);
80 void (*remux)(struct device *dev, int power_on);
81 /* Call back before enabling / disabling regulators */
82 void (*before_set_reg)(struct device *dev, int power_on, int vdd);
83 /* Call back after enabling / disabling regulators */
84 void (*after_set_reg)(struct device *dev, int power_on, int vdd);
85 /* if we have special card, init it using this callback */
86 void (*init_card)(struct mmc_card *card);
87
88 const char *name;
89 u32 ocr_mask;
90};
diff --git a/arch/arm/mach-at91/include/mach/atmel-mci.h b/include/linux/platform_data/mmc-atmel-mci.h
index 3069e4135573..399a2d5a14bd 100644
--- a/arch/arm/mach-at91/include/mach/atmel-mci.h
+++ b/include/linux/platform_data/mmc-atmel-mci.h
@@ -1,17 +1,22 @@
1#ifndef __MACH_ATMEL_MCI_H 1#ifndef __MMC_ATMEL_MCI_H
2#define __MACH_ATMEL_MCI_H 2#define __MMC_ATMEL_MCI_H
3 3
4#include <linux/platform_data/dma-atmel.h> 4#include <linux/platform_data/dma-atmel.h>
5#include <linux/platform_data/dma-dw.h>
5 6
6/** 7/**
7 * struct mci_dma_data - DMA data for MCI interface 8 * struct mci_dma_data - DMA data for MCI interface
8 */ 9 */
9struct mci_dma_data { 10struct mci_dma_data {
10 struct at_dma_slave sdata; 11#ifdef CONFIG_ARM
12 struct at_dma_slave sdata;
13#else
14 struct dw_dma_slave sdata;
15#endif
11}; 16};
12 17
13/* accessor macros */ 18/* accessor macros */
14#define slave_data_ptr(s) (&(s)->sdata) 19#define slave_data_ptr(s) (&(s)->sdata)
15#define find_slave_dev(s) ((s)->sdata.dma_dev) 20#define find_slave_dev(s) ((s)->sdata.dma_dev)
16 21
17#endif /* __MACH_ATMEL_MCI_H */ 22#endif /* __MMC_ATMEL_MCI_H */
diff --git a/include/linux/platform_data/mmc-omap.h b/include/linux/platform_data/mmc-omap.h
index 51e70cf25cbc..5c188f4e9bec 100644
--- a/include/linux/platform_data/mmc-omap.h
+++ b/include/linux/platform_data/mmc-omap.h
@@ -10,32 +10,8 @@
10 10
11#define OMAP_MMC_MAX_SLOTS 2 11#define OMAP_MMC_MAX_SLOTS 2
12 12
13/*
14 * struct omap_mmc_dev_attr.flags possibilities
15 *
16 * OMAP_HSMMC_SUPPORTS_DUAL_VOLT: Some HSMMC controller instances can
17 * operate with either 1.8Vdc or 3.0Vdc card voltages; this flag
18 * should be set if this is the case. See for example Section 22.5.3
19 * "MMC/SD/SDIO1 Bus Voltage Selection" of the OMAP34xx Multimedia
20 * Device Silicon Revision 3.1.x Revision ZR (July 2011) (SWPU223R).
21 *
22 * OMAP_HSMMC_BROKEN_MULTIBLOCK_READ: Multiple-block read transfers
23 * don't work correctly on some MMC controller instances on some
24 * OMAP3 SoCs; this flag should be set if this is the case. See
25 * for example Advisory 2.1.1.128 "MMC: Multiple Block Read
26 * Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_
27 * Revision F (October 2010) (SPRZ278F).
28 */
29#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0)
30#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1)
31#define OMAP_HSMMC_SWAKEUP_MISSING BIT(2)
32
33struct mmc_card; 13struct mmc_card;
34 14
35struct omap_mmc_dev_attr {
36 u8 flags;
37};
38
39struct omap_mmc_platform_data { 15struct omap_mmc_platform_data {
40 /* back-link to device */ 16 /* back-link to device */
41 struct device *dev; 17 struct device *dev;
@@ -106,9 +82,6 @@ struct omap_mmc_platform_data {
106 unsigned vcc_aux_disable_is_sleep:1; 82 unsigned vcc_aux_disable_is_sleep:1;
107 83
108 /* we can put the features above into this variable */ 84 /* we can put the features above into this variable */
109#define HSMMC_HAS_PBIAS (1 << 0)
110#define HSMMC_HAS_UPDATED_RESET (1 << 1)
111#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
112#define MMC_OMAP7XX (1 << 3) 85#define MMC_OMAP7XX (1 << 3)
113#define MMC_OMAP15XX (1 << 4) 86#define MMC_OMAP15XX (1 << 4)
114#define MMC_OMAP16XX (1 << 5) 87#define MMC_OMAP16XX (1 << 5)
diff --git a/include/linux/platform_data/pxa_sdhci.h b/include/linux/platform_data/pxa_sdhci.h
index 27d3156d093a..9e20c2fb4ffd 100644
--- a/include/linux/platform_data/pxa_sdhci.h
+++ b/include/linux/platform_data/pxa_sdhci.h
@@ -55,9 +55,4 @@ struct sdhci_pxa_platdata {
55 unsigned int quirks2; 55 unsigned int quirks2;
56 unsigned int pm_caps; 56 unsigned int pm_caps;
57}; 57};
58
59struct sdhci_pxa {
60 u8 clk_enable;
61 u8 power_mode;
62};
63#endif /* _PXA_SDHCI_H_ */ 58#endif /* _PXA_SDHCI_H_ */