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authorPaul Burton <paul.burton@imgtec.com>2015-01-30 07:09:31 -0500
committerRalf Baechle <ralf@linux-mips.org>2015-03-27 14:42:43 -0400
commitf23ce3883a30743a5b779dc6fb90ca8620688a23 (patch)
tree312603296cd9b0d4e977ff3e0dcecdb353c4c5cb
parent631afc65e8f4f845945ef9e90236d10cee601498 (diff)
MIPS: assume at as source/dest of MSA copy/insert instructions
Assuming at ($1) as the source or destination register of copy or insert instructions: - Simplifies the macros providing those instructions for toolchains without MSA support. - Avoids an unnecessary move instruction when at is used as the source or destination register anyway. - Is sufficient for the uses to be introduced in the kernel by a subsequent patch. Note that due to a patch ordering snafu on my part this also fixes the currently broken build with MSA support enabled. The build has been broken since commit c9017757c532 "MIPS: init upper 64b of vector registers when MSA is first used", which this patch should have preceeded. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9161/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/asmmacro.h28
1 files changed, 12 insertions, 16 deletions
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 782dde7fed57..91df136ddce9 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -227,35 +227,35 @@
227 .set pop 227 .set pop
228 .endm 228 .endm
229 229
230 .macro copy_u_w rd, ws, n 230 .macro copy_u_w ws, n
231 .set push 231 .set push
232 .set mips32r2 232 .set mips32r2
233 .set msa 233 .set msa
234 copy_u.w \rd, $w\ws[\n] 234 copy_u.w $1, $w\ws[\n]
235 .set pop 235 .set pop
236 .endm 236 .endm
237 237
238 .macro copy_u_d rd, ws, n 238 .macro copy_u_d ws, n
239 .set push 239 .set push
240 .set mips64r2 240 .set mips64r2
241 .set msa 241 .set msa
242 copy_u.d \rd, $w\ws[\n] 242 copy_u.d $1, $w\ws[\n]
243 .set pop 243 .set pop
244 .endm 244 .endm
245 245
246 .macro insert_w wd, n, rs 246 .macro insert_w wd, n
247 .set push 247 .set push
248 .set mips32r2 248 .set mips32r2
249 .set msa 249 .set msa
250 insert.w $w\wd[\n], \rs 250 insert.w $w\wd[\n], $1
251 .set pop 251 .set pop
252 .endm 252 .endm
253 253
254 .macro insert_d wd, n, rs 254 .macro insert_d wd, n
255 .set push 255 .set push
256 .set mips64r2 256 .set mips64r2
257 .set msa 257 .set msa
258 insert.d $w\wd[\n], \rs 258 insert.d $w\wd[\n], $1
259 .set pop 259 .set pop
260 .endm 260 .endm
261#else 261#else
@@ -320,40 +320,36 @@
320 .set pop 320 .set pop
321 .endm 321 .endm
322 322
323 .macro copy_u_w rd, ws, n 323 .macro copy_u_w ws, n
324 .set push 324 .set push
325 .set noat 325 .set noat
326 SET_HARDFLOAT 326 SET_HARDFLOAT
327 .insn 327 .insn
328 .word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11) 328 .word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
329 move \rd, $1
330 .set pop 329 .set pop
331 .endm 330 .endm
332 331
333 .macro copy_u_d rd, ws, n 332 .macro copy_u_d ws, n
334 .set push 333 .set push
335 .set noat 334 .set noat
336 SET_HARDFLOAT 335 SET_HARDFLOAT
337 .insn 336 .insn
338 .word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11) 337 .word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
339 move \rd, $1
340 .set pop 338 .set pop
341 .endm 339 .endm
342 340
343 .macro insert_w wd, n, rs 341 .macro insert_w wd, n
344 .set push 342 .set push
345 .set noat 343 .set noat
346 SET_HARDFLOAT 344 SET_HARDFLOAT
347 move $1, \rs
348 .word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6) 345 .word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6)
349 .set pop 346 .set pop
350 .endm 347 .endm
351 348
352 .macro insert_d wd, n, rs 349 .macro insert_d wd, n
353 .set push 350 .set push
354 .set noat 351 .set noat
355 SET_HARDFLOAT 352 SET_HARDFLOAT
356 move $1, \rs
357 .word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6) 353 .word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6)
358 .set pop 354 .set pop
359 .endm 355 .endm