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authorIcenowy Zheng <icenowy@aosc.io>2017-05-14 12:30:35 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-05-15 05:12:25 -0400
commitf23c68a992def240fe46df8517f15171d7bd6ec2 (patch)
tree5b6ea873a573e70e2d67f38615aa2272563d3a38
parentcf80aeef958f2e5b0041c72b567ae949f5b2738d (diff)
dt-bindings: add bindings for DE2 on V3s SoC
Allwinner V3s SoC have a display engine which have a different pipeline with older SoCs. Add document for it (new compatibles and the new "mixer" part). Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt26
1 files changed, 24 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 7acdbf14ae1c..66b85a195ef2 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -41,6 +41,7 @@ Required properties:
41 * allwinner,sun6i-a31-tcon 41 * allwinner,sun6i-a31-tcon
42 * allwinner,sun6i-a31s-tcon 42 * allwinner,sun6i-a31s-tcon
43 * allwinner,sun8i-a33-tcon 43 * allwinner,sun8i-a33-tcon
44 * allwinner,sun8i-v3s-tcon
44 - reg: base address and size of memory-mapped region 45 - reg: base address and size of memory-mapped region
45 - interrupts: interrupt associated to this IP 46 - interrupts: interrupt associated to this IP
46 - clocks: phandles to the clocks feeding the TCON. Three are needed: 47 - clocks: phandles to the clocks feeding the TCON. Three are needed:
@@ -62,7 +63,7 @@ Required properties:
62 second the block connected to the TCON channel 1 (usually the TV 63 second the block connected to the TCON channel 1 (usually the TV
63 encoder) 64 encoder)
64 65
65On SoCs other than the A33, there is one more clock required: 66On SoCs other than the A33 and V3s, there is one more clock required:
66 - 'tcon-ch1': The clock driving the TCON channel 1 67 - 'tcon-ch1': The clock driving the TCON channel 1
67 68
68DRC 69DRC
@@ -148,6 +149,26 @@ Required properties:
148 Documentation/devicetree/bindings/media/video-interfaces.txt. The 149 Documentation/devicetree/bindings/media/video-interfaces.txt. The
149 first port should be the input endpoints, the second one the outputs 150 first port should be the input endpoints, the second one the outputs
150 151
152Display Engine 2.0 Mixer
153------------------------
154
155The DE2 mixer have many functionalities, currently only layer blending is
156supported.
157
158Required properties:
159 - compatible: value must be one of:
160 * allwinner,sun8i-v3s-de2-mixer
161 - reg: base address and size of the memory-mapped region.
162 - clocks: phandles to the clocks feeding the mixer
163 * bus: the mixer interface clock
164 * mod: the mixer module clock
165 - clock-names: the clock names mentioned above
166 - resets: phandles to the reset controllers driving the mixer
167
168- ports: A ports node with endpoint definitions as defined in
169 Documentation/devicetree/bindings/media/video-interfaces.txt. The
170 first port should be the input endpoints, the second one the output
171
151 172
152Display Engine Pipeline 173Display Engine Pipeline
153----------------------- 174-----------------------
@@ -162,9 +183,10 @@ Required properties:
162 * allwinner,sun6i-a31-display-engine 183 * allwinner,sun6i-a31-display-engine
163 * allwinner,sun6i-a31s-display-engine 184 * allwinner,sun6i-a31s-display-engine
164 * allwinner,sun8i-a33-display-engine 185 * allwinner,sun8i-a33-display-engine
186 * allwinner,sun8i-v3s-display-engine
165 187
166 - allwinner,pipelines: list of phandle to the display engine 188 - allwinner,pipelines: list of phandle to the display engine
167 frontends available. 189 frontends (DE 1.0) or mixers (DE 2.0) available.
168 190
169Example: 191Example:
170 192