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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2015-06-09 12:47:12 -0400
committerLinus Walleij <linus.walleij@linaro.org>2015-06-10 07:56:34 -0400
commitf1b2db90d0f1bd5227a48ffc479bbd65e97e4327 (patch)
tree9e572271f810216beee91bf632440f54e24333d1
parenta361cbc575d6ea778fe3fa6f13246bf34d995519 (diff)
pinctrl: mvebu: armada-xp: fix binding documentation of ge1 pins
There was an off-by-one in the documentation of the ge1(txd[0-3]) pins, which is fixed by this commit. Since the driver was correct, and the subnames are anyway not used in the DT binding itself, there is no need to push this documentation fix for stable. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt6
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
index 0bd7d2f662be..f2d2d40487bb 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
@@ -31,9 +31,9 @@ mpp9 9 gpio, ge0(rxd3), lcd(d9)
31mpp10 10 gpio, ge0(rxctl), lcd(d10) 31mpp10 10 gpio, ge0(rxctl), lcd(d10)
32mpp11 11 gpio, ge0(rxclk), lcd(d11) 32mpp11 11 gpio, ge0(rxclk), lcd(d11)
33mpp12 12 gpio, ge0(txd4), ge1(txclkout), lcd(d12) 33mpp12 12 gpio, ge0(txd4), ge1(txclkout), lcd(d12)
34mpp13 13 gpio, ge0(txd5), ge1(txd1), lcd(d13) 34mpp13 13 gpio, ge0(txd5), ge1(txd0), lcd(d13)
35mpp14 14 gpio, ge0(txd6), ge1(txd2), lcd(d15) 35mpp14 14 gpio, ge0(txd6), ge1(txd1), lcd(d15)
36mpp15 15 gpio, ge0(txd7), ge1(txd3), lcd(d16) 36mpp15 15 gpio, ge0(txd7), ge1(txd2), lcd(d16)
37mpp16 16 gpio, ge0(txd7), ge1(txd3), lcd(d16) 37mpp16 16 gpio, ge0(txd7), ge1(txd3), lcd(d16)
38mpp17 17 gpio, ge0(col), ge1(txctl), lcd(d17) 38mpp17 17 gpio, ge0(col), ge1(txctl), lcd(d17)
39mpp18 18 gpio, ge0(rxerr), ge1(rxd0), lcd(d18), ptp(trig) 39mpp18 18 gpio, ge0(rxerr), ge1(rxd0), lcd(d18), ptp(trig)