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authorRakesh Pillai <pillair@qti.qualcomm.com>2017-12-21 04:00:50 -0500
committerKalle Valo <kvalo@qca.qualcomm.com>2017-12-27 05:05:26 -0500
commitf13cc6bd68baf4fba2b92aaf4c1700da05d63043 (patch)
treeed2acd40db13842b2d0d466f0061fab23a08f656
parent203dab8395d9a6b195cbadfec59ae4899aea13f9 (diff)
ath10k: Add hw param for 64-bit address support
WCN3990 target supports 37-bit addressing mode. In order to accommodate extended address support, add hw param to indicate if the target supports addressing above 32-bits. Signed-off-by: Rakesh Pillai <pillair@qti.qualcomm.com> Signed-off-by: Govind Singh <govinds@qti.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
-rw-r--r--drivers/net/wireless/ath/ath10k/core.c13
-rw-r--r--drivers/net/wireless/ath/ath10k/hw.h3
2 files changed, 16 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
index 6d065f8d7f78..42b7c7d53c24 100644
--- a/drivers/net/wireless/ath/ath10k/core.c
+++ b/drivers/net/wireless/ath/ath10k/core.c
@@ -78,6 +78,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
78 .num_peers = TARGET_TLV_NUM_PEERS, 78 .num_peers = TARGET_TLV_NUM_PEERS,
79 .ast_skid_limit = 0x10, 79 .ast_skid_limit = 0x10,
80 .num_wds_entries = 0x20, 80 .num_wds_entries = 0x20,
81 .target_64bit = false,
81 }, 82 },
82 { 83 {
83 .id = QCA9887_HW_1_0_VERSION, 84 .id = QCA9887_HW_1_0_VERSION,
@@ -105,6 +106,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
105 .num_peers = TARGET_TLV_NUM_PEERS, 106 .num_peers = TARGET_TLV_NUM_PEERS,
106 .ast_skid_limit = 0x10, 107 .ast_skid_limit = 0x10,
107 .num_wds_entries = 0x20, 108 .num_wds_entries = 0x20,
109 .target_64bit = false,
108 }, 110 },
109 { 111 {
110 .id = QCA6174_HW_2_1_VERSION, 112 .id = QCA6174_HW_2_1_VERSION,
@@ -131,6 +133,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
131 .num_peers = TARGET_TLV_NUM_PEERS, 133 .num_peers = TARGET_TLV_NUM_PEERS,
132 .ast_skid_limit = 0x10, 134 .ast_skid_limit = 0x10,
133 .num_wds_entries = 0x20, 135 .num_wds_entries = 0x20,
136 .target_64bit = false,
134 }, 137 },
135 { 138 {
136 .id = QCA6174_HW_2_1_VERSION, 139 .id = QCA6174_HW_2_1_VERSION,
@@ -157,6 +160,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
157 .num_peers = TARGET_TLV_NUM_PEERS, 160 .num_peers = TARGET_TLV_NUM_PEERS,
158 .ast_skid_limit = 0x10, 161 .ast_skid_limit = 0x10,
159 .num_wds_entries = 0x20, 162 .num_wds_entries = 0x20,
163 .target_64bit = false,
160 }, 164 },
161 { 165 {
162 .id = QCA6174_HW_3_0_VERSION, 166 .id = QCA6174_HW_3_0_VERSION,
@@ -183,6 +187,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
183 .num_peers = TARGET_TLV_NUM_PEERS, 187 .num_peers = TARGET_TLV_NUM_PEERS,
184 .ast_skid_limit = 0x10, 188 .ast_skid_limit = 0x10,
185 .num_wds_entries = 0x20, 189 .num_wds_entries = 0x20,
190 .target_64bit = false,
186 }, 191 },
187 { 192 {
188 .id = QCA6174_HW_3_2_VERSION, 193 .id = QCA6174_HW_3_2_VERSION,
@@ -212,6 +217,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
212 .num_peers = TARGET_TLV_NUM_PEERS, 217 .num_peers = TARGET_TLV_NUM_PEERS,
213 .ast_skid_limit = 0x10, 218 .ast_skid_limit = 0x10,
214 .num_wds_entries = 0x20, 219 .num_wds_entries = 0x20,
220 .target_64bit = false,
215 }, 221 },
216 { 222 {
217 .id = QCA99X0_HW_2_0_DEV_VERSION, 223 .id = QCA99X0_HW_2_0_DEV_VERSION,
@@ -244,6 +250,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
244 .num_peers = TARGET_TLV_NUM_PEERS, 250 .num_peers = TARGET_TLV_NUM_PEERS,
245 .ast_skid_limit = 0x10, 251 .ast_skid_limit = 0x10,
246 .num_wds_entries = 0x20, 252 .num_wds_entries = 0x20,
253 .target_64bit = false,
247 }, 254 },
248 { 255 {
249 .id = QCA9984_HW_1_0_DEV_VERSION, 256 .id = QCA9984_HW_1_0_DEV_VERSION,
@@ -281,6 +288,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
281 .num_peers = TARGET_TLV_NUM_PEERS, 288 .num_peers = TARGET_TLV_NUM_PEERS,
282 .ast_skid_limit = 0x10, 289 .ast_skid_limit = 0x10,
283 .num_wds_entries = 0x20, 290 .num_wds_entries = 0x20,
291 .target_64bit = false,
284 }, 292 },
285 { 293 {
286 .id = QCA9888_HW_2_0_DEV_VERSION, 294 .id = QCA9888_HW_2_0_DEV_VERSION,
@@ -317,6 +325,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
317 .num_peers = TARGET_TLV_NUM_PEERS, 325 .num_peers = TARGET_TLV_NUM_PEERS,
318 .ast_skid_limit = 0x10, 326 .ast_skid_limit = 0x10,
319 .num_wds_entries = 0x20, 327 .num_wds_entries = 0x20,
328 .target_64bit = false,
320 }, 329 },
321 { 330 {
322 .id = QCA9377_HW_1_0_DEV_VERSION, 331 .id = QCA9377_HW_1_0_DEV_VERSION,
@@ -343,6 +352,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
343 .num_peers = TARGET_TLV_NUM_PEERS, 352 .num_peers = TARGET_TLV_NUM_PEERS,
344 .ast_skid_limit = 0x10, 353 .ast_skid_limit = 0x10,
345 .num_wds_entries = 0x20, 354 .num_wds_entries = 0x20,
355 .target_64bit = false,
346 }, 356 },
347 { 357 {
348 .id = QCA9377_HW_1_1_DEV_VERSION, 358 .id = QCA9377_HW_1_1_DEV_VERSION,
@@ -371,6 +381,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
371 .num_peers = TARGET_TLV_NUM_PEERS, 381 .num_peers = TARGET_TLV_NUM_PEERS,
372 .ast_skid_limit = 0x10, 382 .ast_skid_limit = 0x10,
373 .num_wds_entries = 0x20, 383 .num_wds_entries = 0x20,
384 .target_64bit = false,
374 }, 385 },
375 { 386 {
376 .id = QCA4019_HW_1_0_DEV_VERSION, 387 .id = QCA4019_HW_1_0_DEV_VERSION,
@@ -404,6 +415,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
404 .num_peers = TARGET_TLV_NUM_PEERS, 415 .num_peers = TARGET_TLV_NUM_PEERS,
405 .ast_skid_limit = 0x10, 416 .ast_skid_limit = 0x10,
406 .num_wds_entries = 0x20, 417 .num_wds_entries = 0x20,
418 .target_64bit = false,
407 }, 419 },
408 { 420 {
409 .id = WCN3990_HW_1_0_DEV_VERSION, 421 .id = WCN3990_HW_1_0_DEV_VERSION,
@@ -422,6 +434,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
422 .num_peers = TARGET_HL_10_TLV_NUM_PEERS, 434 .num_peers = TARGET_HL_10_TLV_NUM_PEERS,
423 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT, 435 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT,
424 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES, 436 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES,
437 .target_64bit = true,
425 }, 438 },
426}; 439};
427 440
diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h
index 90ad39bdeec4..5d243f3c3196 100644
--- a/drivers/net/wireless/ath/ath10k/hw.h
+++ b/drivers/net/wireless/ath/ath10k/hw.h
@@ -561,6 +561,9 @@ struct ath10k_hw_params {
561 u32 num_peers; 561 u32 num_peers;
562 u32 ast_skid_limit; 562 u32 ast_skid_limit;
563 u32 num_wds_entries; 563 u32 num_wds_entries;
564
565 /* Targets supporting physical addressing capability above 32-bits */
566 bool target_64bit;
564}; 567};
565 568
566struct htt_rx_desc; 569struct htt_rx_desc;