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authorDave Airlie <airlied@redhat.com>2019-01-24 16:44:53 -0500
committerDave Airlie <airlied@redhat.com>2019-01-24 16:45:00 -0500
commitf0e7ce1eef5854584dfb59b3824a67edee37580f (patch)
tree45d622c2588a7bd42430d7e7590617f13341670d
parent7325e4bd06b02c3aa14fb1066164aefcdee73115 (diff)
parenta840f690d3c6f2f27425ca7e7bd2d635cdec07d7 (diff)
Merge tag 'drm-msm-fixes-2019-01-24' of git://people.freedesktop.org/~robclark/linux into drm-fixes
A few fixes for v5.0.. the opp-level fix and removal of hard-coded irq name is partially to make things smoother in v5.1 merge window to avoid dependency on drm vs dt trees, but are otherwise sane changes. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsAEHd2tGRQxRTs+A-8y_tthPs2iUgCCCEwR5vDMXab4A@mail.gmail.com
-rw-r--r--Documentation/devicetree/bindings/display/msm/gpu.txt1
-rw-r--r--drivers/gpu/drm/msm/adreno/a6xx_gmu.c2
-rw-r--r--drivers/gpu/drm/msm/adreno/adreno_gpu.c1
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c26
-rw-r--r--drivers/gpu/drm/msm/msm_drv.h6
-rw-r--r--drivers/gpu/drm/msm/msm_gem.c8
-rw-r--r--drivers/gpu/drm/msm/msm_gem_vma.c5
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.c2
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.h3
-rw-r--r--drivers/gpu/drm/msm/msm_rd.c7
10 files changed, 36 insertions, 25 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index ac8df3b871f9..f8759145ce1a 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -27,7 +27,6 @@ Example:
27 reg = <0x04300000 0x20000>; 27 reg = <0x04300000 0x20000>;
28 reg-names = "kgsl_3d0_reg_memory"; 28 reg-names = "kgsl_3d0_reg_memory";
29 interrupts = <GIC_SPI 80 0>; 29 interrupts = <GIC_SPI 80 0>;
30 interrupt-names = "kgsl_3d0_irq";
31 clock-names = 30 clock-names =
32 "core", 31 "core",
33 "iface", 32 "iface",
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index 5beb83d1cf87..ce1b3cc4bf6d 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -944,7 +944,7 @@ static u32 a6xx_gmu_get_arc_level(struct device *dev, unsigned long freq)
944 np = dev_pm_opp_get_of_node(opp); 944 np = dev_pm_opp_get_of_node(opp);
945 945
946 if (np) { 946 if (np) {
947 of_property_read_u32(np, "qcom,level", &val); 947 of_property_read_u32(np, "opp-level", &val);
948 of_node_put(np); 948 of_node_put(np);
949 } 949 }
950 950
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 2e4372ef17a3..2cfee1a4fe0b 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -765,7 +765,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
765 adreno_gpu->rev = config->rev; 765 adreno_gpu->rev = config->rev;
766 766
767 adreno_gpu_config.ioname = "kgsl_3d0_reg_memory"; 767 adreno_gpu_config.ioname = "kgsl_3d0_reg_memory";
768 adreno_gpu_config.irqname = "kgsl_3d0_irq";
769 768
770 adreno_gpu_config.va_start = SZ_16M; 769 adreno_gpu_config.va_start = SZ_16M;
771 adreno_gpu_config.va_end = 0xffffffff; 770 adreno_gpu_config.va_end = 0xffffffff;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index fd75870eb17f..6aefcd6db46b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -365,19 +365,6 @@ static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
365 &pdpu->pipe_qos_cfg); 365 &pdpu->pipe_qos_cfg);
366} 366}
367 367
368static void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
369{
370 struct dpu_plane *pdpu = to_dpu_plane(plane);
371 struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
372
373 if (!pdpu->is_rt_pipe)
374 return;
375
376 pm_runtime_get_sync(&dpu_kms->pdev->dev);
377 _dpu_plane_set_qos_ctrl(plane, enable, DPU_PLANE_QOS_PANIC_CTRL);
378 pm_runtime_put_sync(&dpu_kms->pdev->dev);
379}
380
381/** 368/**
382 * _dpu_plane_set_ot_limit - set OT limit for the given plane 369 * _dpu_plane_set_ot_limit - set OT limit for the given plane
383 * @plane: Pointer to drm plane 370 * @plane: Pointer to drm plane
@@ -1248,6 +1235,19 @@ static void dpu_plane_reset(struct drm_plane *plane)
1248} 1235}
1249 1236
1250#ifdef CONFIG_DEBUG_FS 1237#ifdef CONFIG_DEBUG_FS
1238static void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
1239{
1240 struct dpu_plane *pdpu = to_dpu_plane(plane);
1241 struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane);
1242
1243 if (!pdpu->is_rt_pipe)
1244 return;
1245
1246 pm_runtime_get_sync(&dpu_kms->pdev->dev);
1247 _dpu_plane_set_qos_ctrl(plane, enable, DPU_PLANE_QOS_PANIC_CTRL);
1248 pm_runtime_put_sync(&dpu_kms->pdev->dev);
1249}
1250
1251static ssize_t _dpu_plane_danger_read(struct file *file, 1251static ssize_t _dpu_plane_danger_read(struct file *file,
1252 char __user *buff, size_t count, loff_t *ppos) 1252 char __user *buff, size_t count, loff_t *ppos)
1253{ 1253{
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 9cd6a96c6bf2..927e5d86f7c1 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -250,7 +250,8 @@ void msm_gem_purge_vma(struct msm_gem_address_space *aspace,
250void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, 250void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
251 struct msm_gem_vma *vma); 251 struct msm_gem_vma *vma);
252int msm_gem_map_vma(struct msm_gem_address_space *aspace, 252int msm_gem_map_vma(struct msm_gem_address_space *aspace,
253 struct msm_gem_vma *vma, struct sg_table *sgt, int npages); 253 struct msm_gem_vma *vma, int prot,
254 struct sg_table *sgt, int npages);
254void msm_gem_close_vma(struct msm_gem_address_space *aspace, 255void msm_gem_close_vma(struct msm_gem_address_space *aspace,
255 struct msm_gem_vma *vma); 256 struct msm_gem_vma *vma);
256 257
@@ -333,6 +334,7 @@ void msm_gem_kernel_put(struct drm_gem_object *bo,
333struct drm_gem_object *msm_gem_import(struct drm_device *dev, 334struct drm_gem_object *msm_gem_import(struct drm_device *dev,
334 struct dma_buf *dmabuf, struct sg_table *sgt); 335 struct dma_buf *dmabuf, struct sg_table *sgt);
335 336
337__printf(2, 3)
336void msm_gem_object_set_name(struct drm_gem_object *bo, const char *fmt, ...); 338void msm_gem_object_set_name(struct drm_gem_object *bo, const char *fmt, ...);
337 339
338int msm_framebuffer_prepare(struct drm_framebuffer *fb, 340int msm_framebuffer_prepare(struct drm_framebuffer *fb,
@@ -396,12 +398,14 @@ void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
396int msm_debugfs_late_init(struct drm_device *dev); 398int msm_debugfs_late_init(struct drm_device *dev);
397int msm_rd_debugfs_init(struct drm_minor *minor); 399int msm_rd_debugfs_init(struct drm_minor *minor);
398void msm_rd_debugfs_cleanup(struct msm_drm_private *priv); 400void msm_rd_debugfs_cleanup(struct msm_drm_private *priv);
401__printf(3, 4)
399void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, 402void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
400 const char *fmt, ...); 403 const char *fmt, ...);
401int msm_perf_debugfs_init(struct drm_minor *minor); 404int msm_perf_debugfs_init(struct drm_minor *minor);
402void msm_perf_debugfs_cleanup(struct msm_drm_private *priv); 405void msm_perf_debugfs_cleanup(struct msm_drm_private *priv);
403#else 406#else
404static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; } 407static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
408__printf(3, 4)
405static inline void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, 409static inline void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
406 const char *fmt, ...) {} 410 const char *fmt, ...) {}
407static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {} 411static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {}
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 51a95da694d8..c8886d3071fa 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -391,6 +391,10 @@ static int msm_gem_pin_iova(struct drm_gem_object *obj,
391 struct msm_gem_object *msm_obj = to_msm_bo(obj); 391 struct msm_gem_object *msm_obj = to_msm_bo(obj);
392 struct msm_gem_vma *vma; 392 struct msm_gem_vma *vma;
393 struct page **pages; 393 struct page **pages;
394 int prot = IOMMU_READ;
395
396 if (!(msm_obj->flags & MSM_BO_GPU_READONLY))
397 prot |= IOMMU_WRITE;
394 398
395 WARN_ON(!mutex_is_locked(&msm_obj->lock)); 399 WARN_ON(!mutex_is_locked(&msm_obj->lock));
396 400
@@ -405,8 +409,8 @@ static int msm_gem_pin_iova(struct drm_gem_object *obj,
405 if (IS_ERR(pages)) 409 if (IS_ERR(pages))
406 return PTR_ERR(pages); 410 return PTR_ERR(pages);
407 411
408 return msm_gem_map_vma(aspace, vma, msm_obj->sgt, 412 return msm_gem_map_vma(aspace, vma, prot,
409 obj->size >> PAGE_SHIFT); 413 msm_obj->sgt, obj->size >> PAGE_SHIFT);
410} 414}
411 415
412/* get iova and pin it. Should have a matching put */ 416/* get iova and pin it. Should have a matching put */
diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_gem_vma.c
index 557360788084..49c04829cf34 100644
--- a/drivers/gpu/drm/msm/msm_gem_vma.c
+++ b/drivers/gpu/drm/msm/msm_gem_vma.c
@@ -68,7 +68,8 @@ void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
68 68
69int 69int
70msm_gem_map_vma(struct msm_gem_address_space *aspace, 70msm_gem_map_vma(struct msm_gem_address_space *aspace,
71 struct msm_gem_vma *vma, struct sg_table *sgt, int npages) 71 struct msm_gem_vma *vma, int prot,
72 struct sg_table *sgt, int npages)
72{ 73{
73 unsigned size = npages << PAGE_SHIFT; 74 unsigned size = npages << PAGE_SHIFT;
74 int ret = 0; 75 int ret = 0;
@@ -86,7 +87,7 @@ msm_gem_map_vma(struct msm_gem_address_space *aspace,
86 87
87 if (aspace->mmu) 88 if (aspace->mmu)
88 ret = aspace->mmu->funcs->map(aspace->mmu, vma->iova, sgt, 89 ret = aspace->mmu->funcs->map(aspace->mmu, vma->iova, sgt,
89 size, IOMMU_READ | IOMMU_WRITE); 90 size, prot);
90 91
91 if (ret) 92 if (ret)
92 vma->mapped = false; 93 vma->mapped = false;
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index 5f3eff304355..10babd18e286 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -900,7 +900,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
900 } 900 }
901 901
902 /* Get Interrupt: */ 902 /* Get Interrupt: */
903 gpu->irq = platform_get_irq_byname(pdev, config->irqname); 903 gpu->irq = platform_get_irq(pdev, 0);
904 if (gpu->irq < 0) { 904 if (gpu->irq < 0) {
905 ret = gpu->irq; 905 ret = gpu->irq;
906 DRM_DEV_ERROR(drm->dev, "failed to get irq: %d\n", ret); 906 DRM_DEV_ERROR(drm->dev, "failed to get irq: %d\n", ret);
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index efb49bb64191..ca17086f72c9 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -31,7 +31,6 @@ struct msm_gpu_state;
31 31
32struct msm_gpu_config { 32struct msm_gpu_config {
33 const char *ioname; 33 const char *ioname;
34 const char *irqname;
35 uint64_t va_start; 34 uint64_t va_start;
36 uint64_t va_end; 35 uint64_t va_end;
37 unsigned int nr_rings; 36 unsigned int nr_rings;
@@ -63,7 +62,7 @@ struct msm_gpu_funcs {
63 struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu); 62 struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);
64 void (*recover)(struct msm_gpu *gpu); 63 void (*recover)(struct msm_gpu *gpu);
65 void (*destroy)(struct msm_gpu *gpu); 64 void (*destroy)(struct msm_gpu *gpu);
66#ifdef CONFIG_DEBUG_FS 65#if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP)
67 /* show GPU status in debugfs: */ 66 /* show GPU status in debugfs: */
68 void (*show)(struct msm_gpu *gpu, struct msm_gpu_state *state, 67 void (*show)(struct msm_gpu *gpu, struct msm_gpu_state *state,
69 struct drm_printer *p); 68 struct drm_printer *p);
diff --git a/drivers/gpu/drm/msm/msm_rd.c b/drivers/gpu/drm/msm/msm_rd.c
index 90e9d0a48dc0..d21172933d92 100644
--- a/drivers/gpu/drm/msm/msm_rd.c
+++ b/drivers/gpu/drm/msm/msm_rd.c
@@ -115,7 +115,9 @@ static void rd_write(struct msm_rd_state *rd, const void *buf, int sz)
115 char *fptr = &fifo->buf[fifo->head]; 115 char *fptr = &fifo->buf[fifo->head];
116 int n; 116 int n;
117 117
118 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0); 118 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0 || !rd->open);
119 if (!rd->open)
120 return;
119 121
120 /* Note that smp_load_acquire() is not strictly required 122 /* Note that smp_load_acquire() is not strictly required
121 * as CIRC_SPACE_TO_END() does not access the tail more 123 * as CIRC_SPACE_TO_END() does not access the tail more
@@ -213,7 +215,10 @@ out:
213static int rd_release(struct inode *inode, struct file *file) 215static int rd_release(struct inode *inode, struct file *file)
214{ 216{
215 struct msm_rd_state *rd = inode->i_private; 217 struct msm_rd_state *rd = inode->i_private;
218
216 rd->open = false; 219 rd->open = false;
220 wake_up_all(&rd->fifo_event);
221
217 return 0; 222 return 0;
218} 223}
219 224