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authorJim Qu <Jim.Qu@amd.com>2018-11-07 05:38:59 -0500
committerAlex Deucher <alexander.deucher@amd.com>2018-11-08 16:04:16 -0500
commitf0c9fabda1290432948e0b7f404512baed7d05d9 (patch)
tree195feb4d360d3cfaad1ef621aac132d8a28f5aa6
parent9e834d77692314dde984981040f04196ba52f9cc (diff)
drm/amd/powerplay: correct code style
Whitespace cleanup. Signed-off-by: Jim Qu <Jim.Qu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c135
1 files changed, 45 insertions, 90 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
index cb3c3d69c3d3..f2daf00cc911 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
@@ -3454,109 +3454,64 @@ static int vega20_get_thermal_temperature_range(struct pp_hwmgr *hwmgr,
3454 3454
3455static const struct pp_hwmgr_func vega20_hwmgr_funcs = { 3455static const struct pp_hwmgr_func vega20_hwmgr_funcs = {
3456 /* init/fini related */ 3456 /* init/fini related */
3457 .backend_init = 3457 .backend_init = vega20_hwmgr_backend_init,
3458 vega20_hwmgr_backend_init, 3458 .backend_fini = vega20_hwmgr_backend_fini,
3459 .backend_fini = 3459 .asic_setup = vega20_setup_asic_task,
3460 vega20_hwmgr_backend_fini, 3460 .power_off_asic = vega20_power_off_asic,
3461 .asic_setup = 3461 .dynamic_state_management_enable = vega20_enable_dpm_tasks,
3462 vega20_setup_asic_task, 3462 .dynamic_state_management_disable = vega20_disable_dpm_tasks,
3463 .power_off_asic =
3464 vega20_power_off_asic,
3465 .dynamic_state_management_enable =
3466 vega20_enable_dpm_tasks,
3467 .dynamic_state_management_disable =
3468 vega20_disable_dpm_tasks,
3469 /* power state related */ 3463 /* power state related */
3470 .apply_clocks_adjust_rules = 3464 .apply_clocks_adjust_rules = vega20_apply_clocks_adjust_rules,
3471 vega20_apply_clocks_adjust_rules, 3465 .pre_display_config_changed = vega20_pre_display_configuration_changed_task,
3472 .pre_display_config_changed = 3466 .display_config_changed = vega20_display_configuration_changed_task,
3473 vega20_pre_display_configuration_changed_task,
3474 .display_config_changed =
3475 vega20_display_configuration_changed_task,
3476 .check_smc_update_required_for_display_configuration = 3467 .check_smc_update_required_for_display_configuration =
3477 vega20_check_smc_update_required_for_display_configuration, 3468 vega20_check_smc_update_required_for_display_configuration,
3478 .notify_smc_display_config_after_ps_adjustment = 3469 .notify_smc_display_config_after_ps_adjustment =
3479 vega20_notify_smc_display_config_after_ps_adjustment, 3470 vega20_notify_smc_display_config_after_ps_adjustment,
3480 /* export to DAL */ 3471 /* export to DAL */
3481 .get_sclk = 3472 .get_sclk = vega20_dpm_get_sclk,
3482 vega20_dpm_get_sclk, 3473 .get_mclk = vega20_dpm_get_mclk,
3483 .get_mclk = 3474 .get_dal_power_level = vega20_get_dal_power_level,
3484 vega20_dpm_get_mclk, 3475 .get_clock_by_type_with_latency = vega20_get_clock_by_type_with_latency,
3485 .get_dal_power_level = 3476 .get_clock_by_type_with_voltage = vega20_get_clock_by_type_with_voltage,
3486 vega20_get_dal_power_level, 3477 .set_watermarks_for_clocks_ranges = vega20_set_watermarks_for_clocks_ranges,
3487 .get_clock_by_type_with_latency = 3478 .display_clock_voltage_request = vega20_display_clock_voltage_request,
3488 vega20_get_clock_by_type_with_latency, 3479 .get_performance_level = vega20_get_performance_level,
3489 .get_clock_by_type_with_voltage =
3490 vega20_get_clock_by_type_with_voltage,
3491 .set_watermarks_for_clocks_ranges =
3492 vega20_set_watermarks_for_clocks_ranges,
3493 .display_clock_voltage_request =
3494 vega20_display_clock_voltage_request,
3495 .get_performance_level =
3496 vega20_get_performance_level,
3497 /* UMD pstate, profile related */ 3480 /* UMD pstate, profile related */
3498 .force_dpm_level = 3481 .force_dpm_level = vega20_dpm_force_dpm_level,
3499 vega20_dpm_force_dpm_level, 3482 .get_power_profile_mode = vega20_get_power_profile_mode,
3500 .get_power_profile_mode = 3483 .set_power_profile_mode = vega20_set_power_profile_mode,
3501 vega20_get_power_profile_mode,
3502 .set_power_profile_mode =
3503 vega20_set_power_profile_mode,
3504 /* od related */ 3484 /* od related */
3505 .set_power_limit = 3485 .set_power_limit = vega20_set_power_limit,
3506 vega20_set_power_limit, 3486 .get_sclk_od = vega20_get_sclk_od,
3507 .get_sclk_od = 3487 .set_sclk_od = vega20_set_sclk_od,
3508 vega20_get_sclk_od, 3488 .get_mclk_od = vega20_get_mclk_od,
3509 .set_sclk_od = 3489 .set_mclk_od = vega20_set_mclk_od,
3510 vega20_set_sclk_od, 3490 .odn_edit_dpm_table = vega20_odn_edit_dpm_table,
3511 .get_mclk_od =
3512 vega20_get_mclk_od,
3513 .set_mclk_od =
3514 vega20_set_mclk_od,
3515 .odn_edit_dpm_table =
3516 vega20_odn_edit_dpm_table,
3517 /* for sysfs to retrive/set gfxclk/memclk */ 3491 /* for sysfs to retrive/set gfxclk/memclk */
3518 .force_clock_level = 3492 .force_clock_level = vega20_force_clock_level,
3519 vega20_force_clock_level, 3493 .print_clock_levels = vega20_print_clock_levels,
3520 .print_clock_levels = 3494 .read_sensor = vega20_read_sensor,
3521 vega20_print_clock_levels,
3522 .read_sensor =
3523 vega20_read_sensor,
3524 /* powergate related */ 3495 /* powergate related */
3525 .powergate_uvd = 3496 .powergate_uvd = vega20_power_gate_uvd,
3526 vega20_power_gate_uvd, 3497 .powergate_vce = vega20_power_gate_vce,
3527 .powergate_vce =
3528 vega20_power_gate_vce,
3529 /* thermal related */ 3498 /* thermal related */
3530 .start_thermal_controller = 3499 .start_thermal_controller = vega20_start_thermal_controller,
3531 vega20_start_thermal_controller, 3500 .stop_thermal_controller = vega20_thermal_stop_thermal_controller,
3532 .stop_thermal_controller = 3501 .get_thermal_temperature_range = vega20_get_thermal_temperature_range,
3533 vega20_thermal_stop_thermal_controller, 3502 .register_irq_handlers = smu9_register_irq_handlers,
3534 .get_thermal_temperature_range = 3503 .disable_smc_firmware_ctf = vega20_thermal_disable_alert,
3535 vega20_get_thermal_temperature_range,
3536 .register_irq_handlers =
3537 smu9_register_irq_handlers,
3538 .disable_smc_firmware_ctf =
3539 vega20_thermal_disable_alert,
3540 /* fan control related */ 3504 /* fan control related */
3541 .get_fan_speed_percent = 3505 .get_fan_speed_percent = vega20_fan_ctrl_get_fan_speed_percent,
3542 vega20_fan_ctrl_get_fan_speed_percent, 3506 .set_fan_speed_percent = vega20_fan_ctrl_set_fan_speed_percent,
3543 .set_fan_speed_percent = 3507 .get_fan_speed_info = vega20_fan_ctrl_get_fan_speed_info,
3544 vega20_fan_ctrl_set_fan_speed_percent, 3508 .get_fan_speed_rpm = vega20_fan_ctrl_get_fan_speed_rpm,
3545 .get_fan_speed_info = 3509 .set_fan_speed_rpm = vega20_fan_ctrl_set_fan_speed_rpm,
3546 vega20_fan_ctrl_get_fan_speed_info, 3510 .get_fan_control_mode = vega20_get_fan_control_mode,
3547 .get_fan_speed_rpm = 3511 .set_fan_control_mode = vega20_set_fan_control_mode,
3548 vega20_fan_ctrl_get_fan_speed_rpm,
3549 .set_fan_speed_rpm =
3550 vega20_fan_ctrl_set_fan_speed_rpm,
3551 .get_fan_control_mode =
3552 vega20_get_fan_control_mode,
3553 .set_fan_control_mode =
3554 vega20_set_fan_control_mode,
3555 /* smu memory related */ 3512 /* smu memory related */
3556 .notify_cac_buffer_info = 3513 .notify_cac_buffer_info = vega20_notify_cac_buffer_info,
3557 vega20_notify_cac_buffer_info, 3514 .enable_mgpu_fan_boost = vega20_enable_mgpu_fan_boost,
3558 .enable_mgpu_fan_boost =
3559 vega20_enable_mgpu_fan_boost,
3560}; 3515};
3561 3516
3562int vega20_hwmgr_init(struct pp_hwmgr *hwmgr) 3517int vega20_hwmgr_init(struct pp_hwmgr *hwmgr)