diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-02-28 10:45:58 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-02-28 10:45:58 -0500 |
commit | f055ae04aeb0fd1d4373916c43b08481fcd9e5bc (patch) | |
tree | 723ad2982fda9684c176a50466c2dae4d01587e3 | |
parent | 8da51430ff28d2f2daa570f060b1c9fbba81c81a (diff) | |
parent | 253baffdcefba73011e6d2102e69e0b86547836f (diff) |
Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Thomas Gleixner:
"Four small fixes for irqchip drivers:
- Add missing low level irq handler initialization on mxs, so
interrupts can acutally be delivered
- Add a missing barrier to the GIC driver
- Two fixes for the GIC-V3-ITS driver, addressing a double EOI write
and a cache flush beyond the actual region"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/gic-v3: Add missing barrier to 32bit version of gic_read_iar()
irqchip/mxs: Add missing set_handle_irq()
irqchip/gicv3-its: Avoid cache flush beyond ITS_BASERn memory size
irqchip/gic-v3-its: Fix double ICC_EOIR write for LPI in EOImode==1
-rw-r--r-- | arch/arm/include/asm/arch_gicv3.h | 1 | ||||
-rw-r--r-- | drivers/irqchip/irq-gic-v3-its.c | 18 |
2 files changed, 8 insertions, 11 deletions
diff --git a/arch/arm/include/asm/arch_gicv3.h b/arch/arm/include/asm/arch_gicv3.h index 7da5503c0591..e08d15184056 100644 --- a/arch/arm/include/asm/arch_gicv3.h +++ b/arch/arm/include/asm/arch_gicv3.h | |||
@@ -117,6 +117,7 @@ static inline u32 gic_read_iar(void) | |||
117 | u32 irqstat; | 117 | u32 irqstat; |
118 | 118 | ||
119 | asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat)); | 119 | asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat)); |
120 | dsb(sy); | ||
120 | return irqstat; | 121 | return irqstat; |
121 | } | 122 | } |
122 | 123 | ||
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 0a73632b28d5..43dfd15c1dd2 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c | |||
@@ -78,6 +78,9 @@ struct its_node { | |||
78 | 78 | ||
79 | #define ITS_ITT_ALIGN SZ_256 | 79 | #define ITS_ITT_ALIGN SZ_256 |
80 | 80 | ||
81 | /* Convert page order to size in bytes */ | ||
82 | #define PAGE_ORDER_TO_SIZE(o) (PAGE_SIZE << (o)) | ||
83 | |||
81 | struct event_lpi_map { | 84 | struct event_lpi_map { |
82 | unsigned long *lpi_map; | 85 | unsigned long *lpi_map; |
83 | u16 *col_map; | 86 | u16 *col_map; |
@@ -600,11 +603,6 @@ static void its_unmask_irq(struct irq_data *d) | |||
600 | lpi_set_config(d, true); | 603 | lpi_set_config(d, true); |
601 | } | 604 | } |
602 | 605 | ||
603 | static void its_eoi_irq(struct irq_data *d) | ||
604 | { | ||
605 | gic_write_eoir(d->hwirq); | ||
606 | } | ||
607 | |||
608 | static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, | 606 | static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, |
609 | bool force) | 607 | bool force) |
610 | { | 608 | { |
@@ -641,7 +639,7 @@ static struct irq_chip its_irq_chip = { | |||
641 | .name = "ITS", | 639 | .name = "ITS", |
642 | .irq_mask = its_mask_irq, | 640 | .irq_mask = its_mask_irq, |
643 | .irq_unmask = its_unmask_irq, | 641 | .irq_unmask = its_unmask_irq, |
644 | .irq_eoi = its_eoi_irq, | 642 | .irq_eoi = irq_chip_eoi_parent, |
645 | .irq_set_affinity = its_set_affinity, | 643 | .irq_set_affinity = its_set_affinity, |
646 | .irq_compose_msi_msg = its_irq_compose_msi_msg, | 644 | .irq_compose_msi_msg = its_irq_compose_msi_msg, |
647 | }; | 645 | }; |
@@ -846,7 +844,6 @@ static int its_alloc_tables(const char *node_name, struct its_node *its) | |||
846 | u64 type = GITS_BASER_TYPE(val); | 844 | u64 type = GITS_BASER_TYPE(val); |
847 | u64 entry_size = GITS_BASER_ENTRY_SIZE(val); | 845 | u64 entry_size = GITS_BASER_ENTRY_SIZE(val); |
848 | int order = get_order(psz); | 846 | int order = get_order(psz); |
849 | int alloc_size; | ||
850 | int alloc_pages; | 847 | int alloc_pages; |
851 | u64 tmp; | 848 | u64 tmp; |
852 | void *base; | 849 | void *base; |
@@ -878,9 +875,8 @@ static int its_alloc_tables(const char *node_name, struct its_node *its) | |||
878 | } | 875 | } |
879 | } | 876 | } |
880 | 877 | ||
881 | alloc_size = (1 << order) * PAGE_SIZE; | ||
882 | retry_alloc_baser: | 878 | retry_alloc_baser: |
883 | alloc_pages = (alloc_size / psz); | 879 | alloc_pages = (PAGE_ORDER_TO_SIZE(order) / psz); |
884 | if (alloc_pages > GITS_BASER_PAGES_MAX) { | 880 | if (alloc_pages > GITS_BASER_PAGES_MAX) { |
885 | alloc_pages = GITS_BASER_PAGES_MAX; | 881 | alloc_pages = GITS_BASER_PAGES_MAX; |
886 | order = get_order(GITS_BASER_PAGES_MAX * psz); | 882 | order = get_order(GITS_BASER_PAGES_MAX * psz); |
@@ -933,7 +929,7 @@ retry_baser: | |||
933 | shr = tmp & GITS_BASER_SHAREABILITY_MASK; | 929 | shr = tmp & GITS_BASER_SHAREABILITY_MASK; |
934 | if (!shr) { | 930 | if (!shr) { |
935 | cache = GITS_BASER_nC; | 931 | cache = GITS_BASER_nC; |
936 | __flush_dcache_area(base, alloc_size); | 932 | __flush_dcache_area(base, PAGE_ORDER_TO_SIZE(order)); |
937 | } | 933 | } |
938 | goto retry_baser; | 934 | goto retry_baser; |
939 | } | 935 | } |
@@ -966,7 +962,7 @@ retry_baser: | |||
966 | } | 962 | } |
967 | 963 | ||
968 | pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n", | 964 | pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n", |
969 | (int)(alloc_size / entry_size), | 965 | (int)(PAGE_ORDER_TO_SIZE(order) / entry_size), |
970 | its_base_type_string[type], | 966 | its_base_type_string[type], |
971 | (unsigned long)virt_to_phys(base), | 967 | (unsigned long)virt_to_phys(base), |
972 | psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); | 968 | psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); |