Merge tag 'kvm-arm-for-4.3-rc2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master

Second set of KVM/ARM changes for 4.3-rc2

- Workaround for a Cortex-A57 erratum
- Bug fix for the debugging infrastructure
- Fix for 32bit guests with more than 4GB of address space
  on a 32bit host
- A number of fixes for the (unusual) case when we don't use
  the in-kernel GIC emulation
- Removal of ThumbEE handling on arm64, since these have been
  dropped from the architecture before anyone actually ever
  built a CPU
- Remove the KVM_ARM_MAX_VCPUS limitation which has become
  fairly pointless

13 files changed, 30 insertions, 81 deletions

diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h
index 687ddeba3611..3df1e975f72a 100644
--- a/arch/arm/include/asm/kvm_host.h
+++ b/arch/arm/include/asm/kvm_host.h
@@ -29,12 +29,6 @@
 
 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
 
-#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
-#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
-#else
-#define KVM_MAX_VCPUS 0
-#endif
-
 #define KVM_USER_MEM_SLOTS 32
 #define KVM_PRIVATE_MEM_SLOTS 4
 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
@@ -44,6 +38,8 @@
 
 #include <kvm/arm_vgic.h>
 
+#define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
+
 u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
 int __attribute_const__ kvm_target_cpu(void);
 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
diff --git a/arch/arm/kvm/Kconfig b/arch/arm/kvm/Kconfig
index bfb915d05665..210eccadb69a 100644
--- a/arch/arm/kvm/Kconfig
+++ b/arch/arm/kvm/Kconfig
@@ -45,15 +45,4 @@ config KVM_ARM_HOST
         ---help---
           Provides host support for ARM processors.
 
-config KVM_ARM_MAX_VCPUS
-        int "Number maximum supported virtual CPUs per VM"
-        depends on KVM_ARM_HOST
-        default 4
-        help
-          Static number of max supported virtual CPUs per VM.
-
-          If you choose a high number, the vcpu structures will be quite
-          large, so only choose a reasonable number that you expect to
-          actually use.
-
 endif # VIRTUALIZATION
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index ce404a5c3062..dc017adfddc8 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -446,7 +446,7 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu)
          * Map the VGIC hardware resources before running a vcpu the first
          * time on this VM.
          */
-        if (unlikely(!vgic_ready(kvm))) {
+        if (unlikely(irqchip_in_kernel(kvm) && !vgic_ready(kvm))) {
                 ret = kvm_vgic_map_resources(kvm);
                 if (ret)
                         return ret;
diff --git a/arch/arm/kvm/interrupts_head.S b/arch/arm/kvm/interrupts_head.S
index 702740d37465..51a59504bef4 100644
--- a/arch/arm/kvm/interrupts_head.S
+++ b/arch/arm/kvm/interrupts_head.S
@@ -515,8 +515,7 @@ ARM_BE8(rev	r6, r6  )
 
         mrc     p15, 0, r2, c14, c3, 1  @ CNTV_CTL
         str     r2, [vcpu, #VCPU_TIMER_CNTV_CTL]
-        bic     r2, #1                  @ Clear ENABLE
-        mcr     p15, 0, r2, c14, c3, 1  @ CNTV_CTL
+
         isb
 
         mrrc    p15, 3, rr_lo_hi(r2, r3), c14   @ CNTV_CVAL
@@ -529,6 +528,9 @@ ARM_BE8(rev	r6, r6  )
         mcrr    p15, 4, r2, r2, c14     @ CNTVOFF
 
 1:
+        mov     r2, #0                  @ Clear ENABLE
+        mcr     p15, 0, r2, c14, c3, 1  @ CNTV_CTL
+
         @ Allow physical timer/counter access for the host
         mrc     p15, 4, r2, c14, c1, 0  @ CNTHCTL
         orr     r2, r2, #(CNTHCTL_PL1PCEN | CNTHCTL_PL1PCTEN)
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 7b4201294187..6984342da13d 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -1792,8 +1792,10 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
                 if (vma->vm_flags & VM_PFNMAP) {
                         gpa_t gpa = mem->guest_phys_addr +
                                     (vm_start - mem->userspace_addr);
-                        phys_addr_t pa = (vma->vm_pgoff << PAGE_SHIFT) +
-                                         vm_start - vma->vm_start;
+                        phys_addr_t pa;
+
+                        pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
+                        pa += vm_start - vma->vm_start;
 
                         /* IO region dirty page logging not allowed */
                         if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index cbc5e1a0ea8f..9694f2654593 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -172,7 +172,6 @@
 #define VTTBR_VMID_MASK   (UL(0xFF) << VTTBR_VMID_SHIFT)
 
 /* Hyp System Trap Register */
-#define HSTR_EL2_TTEE   (1 << 16)
 #define HSTR_EL2_T(x)   (1 << x)
 
 /* Hyp Coproccessor Trap Register Shifts */
diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h
index 67fa0de3d483..5e377101f919 100644
--- a/arch/arm64/include/asm/kvm_asm.h
+++ b/arch/arm64/include/asm/kvm_asm.h
@@ -53,9 +53,7 @@
 #define IFSR32_EL2      25      /* Instruction Fault Status Register */
 #define FPEXC32_EL2     26      /* Floating-Point Exception Control Register */
 #define DBGVCR32_EL2    27      /* Debug Vector Catch Register */
-#define TEECR32_EL1     28      /* ThumbEE Configuration Register */
-#define TEEHBR32_EL1    29      /* ThumbEE Handler Base Register */
-#define NR_SYS_REGS     30
+#define NR_SYS_REGS     28
 
 /* 32bit mapping */
 #define c0_MPIDR        (MPIDR_EL1 * 2) /* MultiProcessor ID Register */
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 486594583cc6..4562459456a6 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -30,12 +30,6 @@
 
 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
 
-#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
-#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
-#else
-#define KVM_MAX_VCPUS 0
-#endif
-
 #define KVM_USER_MEM_SLOTS 32
 #define KVM_PRIVATE_MEM_SLOTS 4
 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
@@ -43,6 +37,8 @@
 #include <kvm/arm_vgic.h>
 #include <kvm/arm_arch_timer.h>
 
+#define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
+
 #define KVM_VCPU_MAX_FEATURES 3
 
 int __attribute_const__ kvm_target_cpu(void);
diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
index bfffe8f4bd53..5c7e920e4861 100644
--- a/arch/arm64/kvm/Kconfig
+++ b/arch/arm64/kvm/Kconfig
@@ -41,15 +41,4 @@ config KVM_ARM_HOST
         ---help---
           Provides host support for ARM processors.
 
-config KVM_ARM_MAX_VCPUS
-        int "Number maximum supported virtual CPUs per VM"
-        depends on KVM_ARM_HOST
-        default 4
-        help
-          Static number of max supported virtual CPUs per VM.
-
-          If you choose a high number, the vcpu structures will be quite
-          large, so only choose a reasonable number that you expect to
-          actually use.
-
 endif # VIRTUALIZATION
diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
index 37c89ea2c572..e5836138ec42 100644
--- a/arch/arm64/kvm/hyp.S
+++ b/arch/arm64/kvm/hyp.S
@@ -433,20 +433,13 @@
         mrs     x5, ifsr32_el2
         stp     x4, x5, [x3]
 
-        skip_fpsimd_state x8, 3f
+        skip_fpsimd_state x8, 2f
         mrs     x6, fpexc32_el2
         str     x6, [x3, #16]
-3:
-        skip_debug_state x8, 2f
+2:
+        skip_debug_state x8, 1f
         mrs     x7, dbgvcr32_el2
         str     x7, [x3, #24]
-2:
-        skip_tee_state x8, 1f
-
-        add     x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
-        mrs     x4, teecr32_el1
-        mrs     x5, teehbr32_el1
-        stp     x4, x5, [x3]
 1:
 .endm
 
@@ -466,16 +459,9 @@
         msr     dacr32_el2, x4
         msr     ifsr32_el2, x5
 
-        skip_debug_state x8, 2f
+        skip_debug_state x8, 1f
         ldr     x7, [x3, #24]
         msr     dbgvcr32_el2, x7
-2:
-        skip_tee_state x8, 1f
-
-        add     x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
-        ldp     x4, x5, [x3]
-        msr     teecr32_el1, x4
-        msr     teehbr32_el1, x5
 1:
 .endm
 
@@ -570,8 +556,6 @@ alternative_endif
         mrs     x3, cntv_ctl_el0
         and     x3, x3, #3
         str     w3, [x0, #VCPU_TIMER_CNTV_CTL]
-        bic     x3, x3, #1              // Clear Enable
-        msr     cntv_ctl_el0, x3
 
         isb
 
@@ -579,6 +563,9 @@ alternative_endif
         str     x3, [x0, #VCPU_TIMER_CNTV_CVAL]
 
 1:
+        // Disable the virtual timer
+        msr     cntv_ctl_el0, xzr
+
         // Allow physical timer/counter access for the host
         mrs     x2, cnthctl_el2
         orr     x2, x2, #3
@@ -753,6 +740,9 @@ ENTRY(__kvm_vcpu_run)
         // Guest context
         add     x2, x0, #VCPU_CONTEXT
 
+        // We must restore the 32-bit state before the sysregs, thanks
+        // to Cortex-A57 erratum #852523.
+        restore_guest_32bit_state
         bl __restore_sysregs
 
         skip_debug_state x3, 1f
@@ -760,7 +750,6 @@ ENTRY(__kvm_vcpu_run)
         kern_hyp_va x3
         bl      __restore_debug
 1:
-        restore_guest_32bit_state
         restore_guest_regs
 
         // That's it, no more messing around.
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index b41607d270ac..d03d3af17e7e 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -272,7 +272,7 @@ static int set_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
 {
         __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg];
 
-        if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
+        if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
                 return -EFAULT;
         return 0;
 }
@@ -314,7 +314,7 @@ static int set_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
 {
         __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg];
 
-        if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
+        if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
                 return -EFAULT;
 
         return 0;
@@ -358,7 +358,7 @@ static int set_wvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
 {
         __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg];
 
-        if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
+        if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
                 return -EFAULT;
         return 0;
 }
@@ -400,7 +400,7 @@ static int set_wcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
 {
         __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg];
 
-        if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
+        if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
                 return -EFAULT;
         return 0;
 }
@@ -539,13 +539,6 @@ static const struct sys_reg_desc sys_reg_descs[] = {
         { Op0(0b10), Op1(0b000), CRn(0b0111), CRm(0b1110), Op2(0b110),
           trap_dbgauthstatus_el1 },
 
-        /* TEECR32_EL1 */
-        { Op0(0b10), Op1(0b010), CRn(0b0000), CRm(0b0000), Op2(0b000),
-          NULL, reset_val, TEECR32_EL1, 0 },
-        /* TEEHBR32_EL1 */
-        { Op0(0b10), Op1(0b010), CRn(0b0001), CRm(0b0000), Op2(0b000),
-          NULL, reset_val, TEEHBR32_EL1, 0 },
-
         /* MDCCSR_EL1 */
         { Op0(0b10), Op1(0b011), CRn(0b0000), CRm(0b0001), Op2(0b000),
           trap_raz_wi },
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index d901f1a47be6..4e14dac282bb 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -35,11 +35,7 @@
 #define VGIC_V3_MAX_LRS         16
 #define VGIC_MAX_IRQS           1024
 #define VGIC_V2_MAX_CPUS        8
-
-/* Sanity checks... */
-#if (KVM_MAX_VCPUS > 255)
-#error Too many KVM VCPUs, the VGIC only supports up to 255 VCPUs for now
-#endif
+#define VGIC_V3_MAX_CPUS        255
 
 #if (VGIC_NR_IRQS_LEGACY & 31)
 #error "VGIC_NR_IRQS must be a multiple of 32"
diff --git a/virt/kvm/arm/vgic-v3.c b/virt/kvm/arm/vgic-v3.c
index afbf925b00f4..7dd5d62f10a1 100644
--- a/virt/kvm/arm/vgic-v3.c
+++ b/virt/kvm/arm/vgic-v3.c
@@ -288,7 +288,7 @@ int vgic_v3_probe(struct device_node *vgic_node,
 
         vgic->vctrl_base = NULL;
         vgic->type = VGIC_V3;
-        vgic->max_gic_vcpus = KVM_MAX_VCPUS;
+        vgic->max_gic_vcpus = VGIC_V3_MAX_CPUS;
 
         kvm_info("%s@%llx IRQ%d\n", vgic_node->name,
                  vcpu_res.start, vgic->maint_irq);