drm/nouveau/fb/ramgt215: Change FBVDD/Q when BIOS asks for it

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

3 files changed, 20 insertions, 0 deletions

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h
index dd48db7fee06..dca6c060a24f 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h
@@ -39,6 +39,7 @@ struct nvbios_ramcfg {
         unsigned ramcfg_timing;
         unsigned ramcfg_DLLoff;
         unsigned ramcfg_RON;
+        unsigned ramcfg_FBVDDQ;
         union {
                 struct {
                         unsigned ramcfg_00_03_01:1;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.c
index 3bbb1a76c378..74a4ab5b6ad1 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.c
@@ -205,6 +205,7 @@ nvbios_rammapSp(struct nvkm_bios *bios, u32 data,
                 p->ramcfg_DLLoff   = (nvbios_rd08(bios, data + 0x02) & 0x40) >> 6;
                 p->ramcfg_10_03_0f = (nvbios_rd08(bios, data + 0x03) & 0x0f) >> 0;
                 p->ramcfg_10_04_01 = (nvbios_rd08(bios, data + 0x04) & 0x01) >> 0;
+                p->ramcfg_FBVDDQ   = (nvbios_rd08(bios, data + 0x04) & 0x08) >> 3;
                 p->ramcfg_10_05    = (nvbios_rd08(bios, data + 0x05) & 0xff) >> 0;
                 p->ramcfg_10_06    = (nvbios_rd08(bios, data + 0x06) & 0xff) >> 0;
                 p->ramcfg_10_07    = (nvbios_rd08(bios, data + 0x07) & 0xff) >> 0;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c
index 0c28f38cb8b3..8d81bf1e9a55 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c
@@ -498,6 +498,7 @@ gt215_ram_calc(struct nvkm_ram *base, u32 freq)
         struct nvkm_device *device = subdev->device;
         struct nvkm_bios *bios = device->bios;
         struct gt215_clk_info mclk;
+        struct nvkm_gpio *gpio = device->gpio;
         struct nvkm_ram_data *next;
         u8  ver, hdr, cnt, len, strap;
         u32 data;
@@ -656,6 +657,23 @@ gt215_ram_calc(struct nvkm_ram *base, u32 freq)
         if (device->chipset == 0xa3 && freq <= 500000)
                 ram_mask(fuc, 0x100700, 0x00000006, 0x00000006);
 
+        /* Alter FBVDD/Q, apparently must be done with PLL disabled, thus
+         * set it to bypass */
+        if (nvkm_gpio_get(gpio, 0, 0x18, DCB_GPIO_UNUSED) ==
+                        next->bios.ramcfg_FBVDDQ) {
+                data = ram_rd32(fuc, 0x004000) & 0x9;
+
+                if (data == 0x1)
+                        ram_mask(fuc, 0x004000, 0x8, 0x8);
+                if (data & 0x1)
+                        ram_mask(fuc, 0x004000, 0x1, 0x0);
+
+                gt215_ram_gpio(fuc, 0x18, !next->bios.ramcfg_FBVDDQ);
+
+                if (data & 0x1)
+                        ram_mask(fuc, 0x004000, 0x1, 0x1);
+        }
+
         /* Fiddle with clocks */
         /* There's 4 scenario's
          * pll->pll: first switch to a 324MHz clock, set up new PLL, switch