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authorTomi Valkeinen <tomi.valkeinen@ti.com>2016-05-18 06:52:14 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2016-05-19 13:19:06 -0400
commitef03b401266b687dab522dcf9a4e411074262898 (patch)
tree8dc338d56c4aa1e5820a30303c219df6b78a2e1b
parent01575776e54734eecab390df5aa1e047896ddacb (diff)
drm/omap: cleanup dispc_fclk_rate()
With the new PLL helpers, we can clean up the dispc_fclk_rate(). This will also make dispc_fclk_rate() support clock sources it didn't support earlier. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-rw-r--r--drivers/gpu/drm/omapdrm/dss/dispc.c31
1 files changed, 11 insertions, 20 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
index 01994d012ce4..7b78da6d51cf 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -3299,30 +3299,21 @@ static void dispc_mgr_get_lcd_divisor(enum omap_channel channel, int *lck_div,
3299 3299
3300static unsigned long dispc_fclk_rate(void) 3300static unsigned long dispc_fclk_rate(void)
3301{ 3301{
3302 struct dss_pll *pll; 3302 unsigned long r;
3303 unsigned long r = 0; 3303 enum dss_clk_source src;
3304 3304
3305 switch (dss_get_dispc_clk_source()) { 3305 src = dss_get_dispc_clk_source();
3306 case DSS_CLK_SRC_FCK: 3306
3307 if (src == DSS_CLK_SRC_FCK) {
3307 r = dss_get_dispc_clk_rate(); 3308 r = dss_get_dispc_clk_rate();
3308 break; 3309 } else {
3309 case DSS_CLK_SRC_PLL1_1: 3310 struct dss_pll *pll;
3310 pll = dss_pll_find("dsi0"); 3311 unsigned clkout_idx;
3311 if (!pll)
3312 pll = dss_pll_find("video0");
3313 3312
3314 r = pll->cinfo.clkout[0]; 3313 pll = dss_pll_find_by_src(src);
3315 break; 3314 clkout_idx = dss_pll_get_clkout_idx_for_src(src);
3316 case DSS_CLK_SRC_PLL2_1:
3317 pll = dss_pll_find("dsi1");
3318 if (!pll)
3319 pll = dss_pll_find("video1");
3320 3315
3321 r = pll->cinfo.clkout[0]; 3316 r = pll->cinfo.clkout[clkout_idx];
3322 break;
3323 default:
3324 BUG();
3325 return 0;
3326 } 3317 }
3327 3318
3328 return r; 3319 return r;