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authorBjorn Helgaas <bhelgaas@google.com>2018-10-20 12:45:30 -0400
committerBjorn Helgaas <bhelgaas@google.com>2018-10-20 12:45:30 -0400
commitee8360fdafac54eefd0df69fbd99338896cf806b (patch)
tree5a487142e6b7e592ad06657d5554b55d5b414557
parent20634dc361e1c5fe2dae380a7d0a21ca7f32c4f7 (diff)
parentfe73c23d7a094f391dd358358f7dc358d430e7e1 (diff)
Merge branch 'pci/misc'
- Remove unused Netronome NFP32xx Device IDs (Jakub Kicinski) - Use bitmap_zalloc() for dma_alias_mask (Andy Shevchenko) - Add switch fall-through annotations (Gustavo A. R. Silva) - Remove unused Switchtec quirk variable (Joshua Abraham) - Fix pci.c kernel-doc warning (Randy Dunlap) - Remove trivial PCI wrappers for DMA APIs (Christoph Hellwig) - Add Intel GPU device IDs to spurious interrupt quirk (Bin Meng) - Run Switchtec DMA aliasing quirk only on NTB endpoints to avoid useless dmesg errors (Logan Gunthorpe) - Update Switchtec NTB documentation (Wesley Yung) - Remove redundant "default n" from Kconfig (Bartlomiej Zolnierkiewicz) * pci/misc: PCI: pcie: Remove redundant 'default n' from Kconfig NTB: switchtec_ntb: Update switchtec documentation with prerequisites for NTB PCI: Fix Switchtec DMA aliasing quirk dmesg noise PCI: Add macro for Switchtec quirk declarations PCI: Add Device IDs for Intel GPU "spurious interrupt" quirk PCI: Remove pci_set_dma_max_seg_size() PCI: Remove pci_set_dma_seg_boundary() PCI: Remove pci_unmap_addr() wrappers for DMA API PCI / ACPI: Mark expected switch fall-through PCI: Remove set but unused variable PCI: Fix pci.c kernel-doc parameter warning PCI: Allocate dma_alias_mask with bitmap_zalloc() PCI: Remove unused NFP32xx IDs
-rw-r--r--Documentation/switchtec.txt30
-rw-r--r--drivers/ata/sata_inic162x.c2
-rw-r--r--drivers/block/rsxx/core.c2
-rw-r--r--drivers/infiniband/hw/cxgb4/qp.c10
-rw-r--r--drivers/infiniband/hw/cxgb4/t4.h2
-rw-r--r--drivers/pci/pci-acpi.c1
-rw-r--r--drivers/pci/pci.c5
-rw-r--r--drivers/pci/pcie/Kconfig4
-rw-r--r--drivers/pci/probe.c6
-rw-r--r--drivers/pci/quirks.c96
-rw-r--r--drivers/s390/net/ism_drv.c4
-rw-r--r--drivers/scsi/aacraid/linit.c2
-rw-r--r--include/linux/pci-dma-compat.h18
-rw-r--r--include/linux/pci-dma.h12
-rw-r--r--include/linux/pci.h1
-rw-r--r--include/linux/pci_ids.h2
16 files changed, 75 insertions, 122 deletions
diff --git a/Documentation/switchtec.txt b/Documentation/switchtec.txt
index f788264921ff..30d6a64e53f7 100644
--- a/Documentation/switchtec.txt
+++ b/Documentation/switchtec.txt
@@ -23,7 +23,7 @@ The primary means of communicating with the Switchtec management firmware is
23through the Memory-mapped Remote Procedure Call (MRPC) interface. 23through the Memory-mapped Remote Procedure Call (MRPC) interface.
24Commands are submitted to the interface with a 4-byte command 24Commands are submitted to the interface with a 4-byte command
25identifier and up to 1KB of command specific data. The firmware will 25identifier and up to 1KB of command specific data. The firmware will
26respond with a 4 bytes return code and up to 1KB of command specific 26respond with a 4-byte return code and up to 1KB of command-specific
27data. The interface only processes a single command at a time. 27data. The interface only processes a single command at a time.
28 28
29 29
@@ -36,8 +36,8 @@ device: /dev/switchtec#, one for each management endpoint in the system.
36The char device has the following semantics: 36The char device has the following semantics:
37 37
38* A write must consist of at least 4 bytes and no more than 1028 bytes. 38* A write must consist of at least 4 bytes and no more than 1028 bytes.
39 The first four bytes will be interpreted as the command to run and 39 The first 4 bytes will be interpreted as the Command ID and the
40 the remainder will be used as the input data. A write will send the 40 remainder will be used as the input data. A write will send the
41 command to the firmware to begin processing. 41 command to the firmware to begin processing.
42 42
43* Each write must be followed by exactly one read. Any double write will 43* Each write must be followed by exactly one read. Any double write will
@@ -45,9 +45,9 @@ The char device has the following semantics:
45 produce an error. 45 produce an error.
46 46
47* A read will block until the firmware completes the command and return 47* A read will block until the firmware completes the command and return
48 the four bytes of status plus up to 1024 bytes of output data. (The 48 the 4-byte Command Return Value plus up to 1024 bytes of output
49 length will be specified by the size parameter of the read call -- 49 data. (The length will be specified by the size parameter of the read
50 reading less than 4 bytes will produce an error. 50 call -- reading less than 4 bytes will produce an error.)
51 51
52* The poll call will also be supported for userspace applications that 52* The poll call will also be supported for userspace applications that
53 need to do other things while waiting for the command to complete. 53 need to do other things while waiting for the command to complete.
@@ -83,10 +83,20 @@ The following IOCTLs are also supported by the device:
83Non-Transparent Bridge (NTB) Driver 83Non-Transparent Bridge (NTB) Driver
84=================================== 84===================================
85 85
86An NTB driver is provided for the switchtec hardware in switchtec_ntb. 86An NTB hardware driver is provided for the Switchtec hardware in
87Currently, it only supports switches configured with exactly 2 87ntb_hw_switchtec. Currently, it only supports switches configured with
88partitions. It also requires the following configuration settings: 88exactly 2 NT partitions and zero or more non-NT partitions. It also requires
89the following configuration settings:
89 90
90* Both partitions must be able to access each other's GAS spaces. 91* Both NT partitions must be able to access each other's GAS spaces.
91 Thus, the bits in the GAS Access Vector under Management Settings 92 Thus, the bits in the GAS Access Vector under Management Settings
92 must be set to support this. 93 must be set to support this.
94* Kernel configuration MUST include support for NTB (CONFIG_NTB needs
95 to be set)
96
97NT EP BAR 2 will be dynamically configured as a Direct Window, and
98the configuration file does not need to configure it explicitly.
99
100Please refer to Documentation/ntb.txt in Linux source tree for an overall
101understanding of the Linux NTB stack. ntb_hw_switchtec works as an NTB
102Hardware Driver in this stack.
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 9b6d7930d1c7..e0bcf9b2dab0 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -873,7 +873,7 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
873 * like others but it will lock up the whole machine HARD if 873 * like others but it will lock up the whole machine HARD if
874 * 65536 byte PRD entry is fed. Reduce maximum segment size. 874 * 65536 byte PRD entry is fed. Reduce maximum segment size.
875 */ 875 */
876 rc = pci_set_dma_max_seg_size(pdev, 65536 - 512); 876 rc = dma_set_max_seg_size(&pdev->dev, 65536 - 512);
877 if (rc) { 877 if (rc) {
878 dev_err(&pdev->dev, "failed to set the maximum segment size\n"); 878 dev_err(&pdev->dev, "failed to set the maximum segment size\n");
879 return rc; 879 return rc;
diff --git a/drivers/block/rsxx/core.c b/drivers/block/rsxx/core.c
index f2c631ce793c..37df486c7c3c 100644
--- a/drivers/block/rsxx/core.c
+++ b/drivers/block/rsxx/core.c
@@ -780,7 +780,7 @@ static int rsxx_pci_probe(struct pci_dev *dev,
780 goto failed_enable; 780 goto failed_enable;
781 781
782 pci_set_master(dev); 782 pci_set_master(dev);
783 pci_set_dma_max_seg_size(dev, RSXX_HW_BLK_SIZE); 783 dma_set_max_seg_size(&dev->dev, RSXX_HW_BLK_SIZE);
784 784
785 st = pci_set_dma_mask(dev, DMA_BIT_MASK(64)); 785 st = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
786 if (st) { 786 if (st) {
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c
index 347fe18b1a41..62d6f197ec0b 100644
--- a/drivers/infiniband/hw/cxgb4/qp.c
+++ b/drivers/infiniband/hw/cxgb4/qp.c
@@ -99,7 +99,7 @@ static void dealloc_oc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq)
99static void dealloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) 99static void dealloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq)
100{ 100{
101 dma_free_coherent(&(rdev->lldi.pdev->dev), sq->memsize, sq->queue, 101 dma_free_coherent(&(rdev->lldi.pdev->dev), sq->memsize, sq->queue,
102 pci_unmap_addr(sq, mapping)); 102 dma_unmap_addr(sq, mapping));
103} 103}
104 104
105static void dealloc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq) 105static void dealloc_sq(struct c4iw_rdev *rdev, struct t4_sq *sq)
@@ -132,7 +132,7 @@ static int alloc_host_sq(struct c4iw_rdev *rdev, struct t4_sq *sq)
132 if (!sq->queue) 132 if (!sq->queue)
133 return -ENOMEM; 133 return -ENOMEM;
134 sq->phys_addr = virt_to_phys(sq->queue); 134 sq->phys_addr = virt_to_phys(sq->queue);
135 pci_unmap_addr_set(sq, mapping, sq->dma_addr); 135 dma_unmap_addr_set(sq, mapping, sq->dma_addr);
136 return 0; 136 return 0;
137} 137}
138 138
@@ -2521,7 +2521,7 @@ static void free_srq_queue(struct c4iw_srq *srq, struct c4iw_dev_ucontext *uctx,
2521 2521
2522 dma_free_coherent(&rdev->lldi.pdev->dev, 2522 dma_free_coherent(&rdev->lldi.pdev->dev,
2523 wq->memsize, wq->queue, 2523 wq->memsize, wq->queue,
2524 pci_unmap_addr(wq, mapping)); 2524 dma_unmap_addr(wq, mapping));
2525 c4iw_rqtpool_free(rdev, wq->rqt_hwaddr, wq->rqt_size); 2525 c4iw_rqtpool_free(rdev, wq->rqt_hwaddr, wq->rqt_size);
2526 kfree(wq->sw_rq); 2526 kfree(wq->sw_rq);
2527 c4iw_put_qpid(rdev, wq->qid, uctx); 2527 c4iw_put_qpid(rdev, wq->qid, uctx);
@@ -2570,7 +2570,7 @@ static int alloc_srq_queue(struct c4iw_srq *srq, struct c4iw_dev_ucontext *uctx,
2570 goto err_free_rqtpool; 2570 goto err_free_rqtpool;
2571 2571
2572 memset(wq->queue, 0, wq->memsize); 2572 memset(wq->queue, 0, wq->memsize);
2573 pci_unmap_addr_set(wq, mapping, wq->dma_addr); 2573 dma_unmap_addr_set(wq, mapping, wq->dma_addr);
2574 2574
2575 wq->bar2_va = c4iw_bar2_addrs(rdev, wq->qid, T4_BAR2_QTYPE_EGRESS, 2575 wq->bar2_va = c4iw_bar2_addrs(rdev, wq->qid, T4_BAR2_QTYPE_EGRESS,
2576 &wq->bar2_qid, 2576 &wq->bar2_qid,
@@ -2649,7 +2649,7 @@ static int alloc_srq_queue(struct c4iw_srq *srq, struct c4iw_dev_ucontext *uctx,
2649err_free_queue: 2649err_free_queue:
2650 dma_free_coherent(&rdev->lldi.pdev->dev, 2650 dma_free_coherent(&rdev->lldi.pdev->dev,
2651 wq->memsize, wq->queue, 2651 wq->memsize, wq->queue,
2652 pci_unmap_addr(wq, mapping)); 2652 dma_unmap_addr(wq, mapping));
2653err_free_rqtpool: 2653err_free_rqtpool:
2654 c4iw_rqtpool_free(rdev, wq->rqt_hwaddr, wq->rqt_size); 2654 c4iw_rqtpool_free(rdev, wq->rqt_hwaddr, wq->rqt_size);
2655err_free_pending_wrs: 2655err_free_pending_wrs:
diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h
index e42021fd6fd6..fff6d48d262f 100644
--- a/drivers/infiniband/hw/cxgb4/t4.h
+++ b/drivers/infiniband/hw/cxgb4/t4.h
@@ -397,7 +397,7 @@ struct t4_srq_pending_wr {
397struct t4_srq { 397struct t4_srq {
398 union t4_recv_wr *queue; 398 union t4_recv_wr *queue;
399 dma_addr_t dma_addr; 399 dma_addr_t dma_addr;
400 DECLARE_PCI_UNMAP_ADDR(mapping); 400 DEFINE_DMA_UNMAP_ADDR(mapping);
401 struct t4_swrqe *sw_rq; 401 struct t4_swrqe *sw_rq;
402 void __iomem *bar2_va; 402 void __iomem *bar2_va;
403 u64 bar2_pa; 403 u64 bar2_pa;
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index 79c8e955a0ab..2a4aa6468579 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -588,6 +588,7 @@ static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state)
588 error = -EBUSY; 588 error = -EBUSY;
589 break; 589 break;
590 } 590 }
591 /* Fall through */
591 case PCI_D0: 592 case PCI_D0:
592 case PCI_D1: 593 case PCI_D1:
593 case PCI_D2: 594 case PCI_D2:
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b309ce855577..535c9f974de2 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -198,7 +198,7 @@ EXPORT_SYMBOL_GPL(pci_ioremap_wc_bar);
198/** 198/**
199 * pci_dev_str_match_path - test if a path string matches a device 199 * pci_dev_str_match_path - test if a path string matches a device
200 * @dev: the PCI device to test 200 * @dev: the PCI device to test
201 * @p: string to match the device against 201 * @path: string to match the device against
202 * @endptr: pointer to the string after the match 202 * @endptr: pointer to the string after the match
203 * 203 *
204 * Test if a string (typically from a kernel parameter) formatted as a 204 * Test if a string (typically from a kernel parameter) formatted as a
@@ -5773,8 +5773,7 @@ int pci_set_vga_state(struct pci_dev *dev, bool decode,
5773void pci_add_dma_alias(struct pci_dev *dev, u8 devfn) 5773void pci_add_dma_alias(struct pci_dev *dev, u8 devfn)
5774{ 5774{
5775 if (!dev->dma_alias_mask) 5775 if (!dev->dma_alias_mask)
5776 dev->dma_alias_mask = kcalloc(BITS_TO_LONGS(U8_MAX), 5776 dev->dma_alias_mask = bitmap_zalloc(U8_MAX, GFP_KERNEL);
5777 sizeof(long), GFP_KERNEL);
5778 if (!dev->dma_alias_mask) { 5777 if (!dev->dma_alias_mask) {
5779 pci_warn(dev, "Unable to allocate DMA alias mask\n"); 5778 pci_warn(dev, "Unable to allocate DMA alias mask\n");
5780 return; 5779 return;
diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
index 0a1e9d379bc5..44742b2e1126 100644
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
@@ -36,7 +36,6 @@ config PCIEAER
36config PCIEAER_INJECT 36config PCIEAER_INJECT
37 tristate "PCI Express error injection support" 37 tristate "PCI Express error injection support"
38 depends on PCIEAER 38 depends on PCIEAER
39 default n
40 help 39 help
41 This enables PCI Express Root Port Advanced Error Reporting 40 This enables PCI Express Root Port Advanced Error Reporting
42 (AER) software error injector. 41 (AER) software error injector.
@@ -84,7 +83,6 @@ config PCIEASPM
84config PCIEASPM_DEBUG 83config PCIEASPM_DEBUG
85 bool "Debug PCI Express ASPM" 84 bool "Debug PCI Express ASPM"
86 depends on PCIEASPM 85 depends on PCIEASPM
87 default n
88 help 86 help
89 This enables PCI Express ASPM debug support. It will add per-device 87 This enables PCI Express ASPM debug support. It will add per-device
90 interface to control ASPM. 88 interface to control ASPM.
@@ -129,7 +127,6 @@ config PCIE_PME
129config PCIE_DPC 127config PCIE_DPC
130 bool "PCI Express Downstream Port Containment support" 128 bool "PCI Express Downstream Port Containment support"
131 depends on PCIEPORTBUS && PCIEAER 129 depends on PCIEPORTBUS && PCIEAER
132 default n
133 help 130 help
134 This enables PCI Express Downstream Port Containment (DPC) 131 This enables PCI Express Downstream Port Containment (DPC)
135 driver support. DPC events from Root and Downstream ports 132 driver support. DPC events from Root and Downstream ports
@@ -139,7 +136,6 @@ config PCIE_DPC
139 136
140config PCIE_PTM 137config PCIE_PTM
141 bool "PCI Express Precision Time Measurement support" 138 bool "PCI Express Precision Time Measurement support"
142 default n
143 depends on PCIEPORTBUS 139 depends on PCIEPORTBUS
144 help 140 help
145 This enables PCI Express Precision Time Measurement (PTM) 141 This enables PCI Express Precision Time Measurement (PTM)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index bb2999d1b199..966641d517ba 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2144,7 +2144,7 @@ static void pci_release_dev(struct device *dev)
2144 pcibios_release_device(pci_dev); 2144 pcibios_release_device(pci_dev);
2145 pci_bus_put(pci_dev->bus); 2145 pci_bus_put(pci_dev->bus);
2146 kfree(pci_dev->driver_override); 2146 kfree(pci_dev->driver_override);
2147 kfree(pci_dev->dma_alias_mask); 2147 bitmap_free(pci_dev->dma_alias_mask);
2148 kfree(pci_dev); 2148 kfree(pci_dev);
2149} 2149}
2150 2150
@@ -2398,8 +2398,8 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
2398 dev->dev.dma_parms = &dev->dma_parms; 2398 dev->dev.dma_parms = &dev->dma_parms;
2399 dev->dev.coherent_dma_mask = 0xffffffffull; 2399 dev->dev.coherent_dma_mask = 0xffffffffull;
2400 2400
2401 pci_set_dma_max_seg_size(dev, 65536); 2401 dma_set_max_seg_size(&dev->dev, 65536);
2402 pci_set_dma_seg_boundary(dev, 0xffffffff); 2402 dma_set_seg_boundary(&dev->dev, 0xffffffff);
2403 2403
2404 /* Fix up broken headers */ 2404 /* Fix up broken headers */
2405 pci_fixup_device(pci_fixup_header, dev); 2405 pci_fixup_device(pci_fixup_header, dev);
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 6bc27b7fd452..4700d24e5d55 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3190,7 +3190,11 @@ static void disable_igfx_irq(struct pci_dev *dev)
3190 3190
3191 pci_iounmap(dev, regs); 3191 pci_iounmap(dev, regs);
3192} 3192}
3193DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0042, disable_igfx_irq);
3194DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0046, disable_igfx_irq);
3195DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x004a, disable_igfx_irq);
3193DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0102, disable_igfx_irq); 3196DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0102, disable_igfx_irq);
3197DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0106, disable_igfx_irq);
3194DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq); 3198DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
3195DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq); 3199DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
3196 3200
@@ -4987,7 +4991,6 @@ static void quirk_switchtec_ntb_dma_alias(struct pci_dev *pdev)
4987 void __iomem *mmio; 4991 void __iomem *mmio;
4988 struct ntb_info_regs __iomem *mmio_ntb; 4992 struct ntb_info_regs __iomem *mmio_ntb;
4989 struct ntb_ctrl_regs __iomem *mmio_ctrl; 4993 struct ntb_ctrl_regs __iomem *mmio_ctrl;
4990 struct sys_info_regs __iomem *mmio_sys_info;
4991 u64 partition_map; 4994 u64 partition_map;
4992 u8 partition; 4995 u8 partition;
4993 int pp; 4996 int pp;
@@ -5008,7 +5011,6 @@ static void quirk_switchtec_ntb_dma_alias(struct pci_dev *pdev)
5008 5011
5009 mmio_ntb = mmio + SWITCHTEC_GAS_NTB_OFFSET; 5012 mmio_ntb = mmio + SWITCHTEC_GAS_NTB_OFFSET;
5010 mmio_ctrl = (void __iomem *) mmio_ntb + SWITCHTEC_NTB_REG_CTRL_OFFSET; 5013 mmio_ctrl = (void __iomem *) mmio_ntb + SWITCHTEC_NTB_REG_CTRL_OFFSET;
5011 mmio_sys_info = mmio + SWITCHTEC_GAS_SYS_INFO_OFFSET;
5012 5014
5013 partition = ioread8(&mmio_ntb->partition_id); 5015 partition = ioread8(&mmio_ntb->partition_id);
5014 5016
@@ -5057,59 +5059,37 @@ static void quirk_switchtec_ntb_dma_alias(struct pci_dev *pdev)
5057 pci_iounmap(pdev, mmio); 5059 pci_iounmap(pdev, mmio);
5058 pci_disable_device(pdev); 5060 pci_disable_device(pdev);
5059} 5061}
5060DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8531, 5062#define SWITCHTEC_QUIRK(vid) \
5061 quirk_switchtec_ntb_dma_alias); 5063 DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_MICROSEMI, vid, \
5062DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8532, 5064 PCI_CLASS_BRIDGE_OTHER, 8, quirk_switchtec_ntb_dma_alias)
5063 quirk_switchtec_ntb_dma_alias); 5065
5064DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8533, 5066SWITCHTEC_QUIRK(0x8531); /* PFX 24xG3 */
5065 quirk_switchtec_ntb_dma_alias); 5067SWITCHTEC_QUIRK(0x8532); /* PFX 32xG3 */
5066DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8534, 5068SWITCHTEC_QUIRK(0x8533); /* PFX 48xG3 */
5067 quirk_switchtec_ntb_dma_alias); 5069SWITCHTEC_QUIRK(0x8534); /* PFX 64xG3 */
5068DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8535, 5070SWITCHTEC_QUIRK(0x8535); /* PFX 80xG3 */
5069 quirk_switchtec_ntb_dma_alias); 5071SWITCHTEC_QUIRK(0x8536); /* PFX 96xG3 */
5070DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8536, 5072SWITCHTEC_QUIRK(0x8541); /* PSX 24xG3 */
5071 quirk_switchtec_ntb_dma_alias); 5073SWITCHTEC_QUIRK(0x8542); /* PSX 32xG3 */
5072DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8543, 5074SWITCHTEC_QUIRK(0x8543); /* PSX 48xG3 */
5073 quirk_switchtec_ntb_dma_alias); 5075SWITCHTEC_QUIRK(0x8544); /* PSX 64xG3 */
5074DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8544, 5076SWITCHTEC_QUIRK(0x8545); /* PSX 80xG3 */
5075 quirk_switchtec_ntb_dma_alias); 5077SWITCHTEC_QUIRK(0x8546); /* PSX 96xG3 */
5076DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8545, 5078SWITCHTEC_QUIRK(0x8551); /* PAX 24XG3 */
5077 quirk_switchtec_ntb_dma_alias); 5079SWITCHTEC_QUIRK(0x8552); /* PAX 32XG3 */
5078DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8546, 5080SWITCHTEC_QUIRK(0x8553); /* PAX 48XG3 */
5079 quirk_switchtec_ntb_dma_alias); 5081SWITCHTEC_QUIRK(0x8554); /* PAX 64XG3 */
5080DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8551, 5082SWITCHTEC_QUIRK(0x8555); /* PAX 80XG3 */
5081 quirk_switchtec_ntb_dma_alias); 5083SWITCHTEC_QUIRK(0x8556); /* PAX 96XG3 */
5082DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8552, 5084SWITCHTEC_QUIRK(0x8561); /* PFXL 24XG3 */
5083 quirk_switchtec_ntb_dma_alias); 5085SWITCHTEC_QUIRK(0x8562); /* PFXL 32XG3 */
5084DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8553, 5086SWITCHTEC_QUIRK(0x8563); /* PFXL 48XG3 */
5085 quirk_switchtec_ntb_dma_alias); 5087SWITCHTEC_QUIRK(0x8564); /* PFXL 64XG3 */
5086DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8554, 5088SWITCHTEC_QUIRK(0x8565); /* PFXL 80XG3 */
5087 quirk_switchtec_ntb_dma_alias); 5089SWITCHTEC_QUIRK(0x8566); /* PFXL 96XG3 */
5088DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8555, 5090SWITCHTEC_QUIRK(0x8571); /* PFXI 24XG3 */
5089 quirk_switchtec_ntb_dma_alias); 5091SWITCHTEC_QUIRK(0x8572); /* PFXI 32XG3 */
5090DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8556, 5092SWITCHTEC_QUIRK(0x8573); /* PFXI 48XG3 */
5091 quirk_switchtec_ntb_dma_alias); 5093SWITCHTEC_QUIRK(0x8574); /* PFXI 64XG3 */
5092DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8561, 5094SWITCHTEC_QUIRK(0x8575); /* PFXI 80XG3 */
5093 quirk_switchtec_ntb_dma_alias); 5095SWITCHTEC_QUIRK(0x8576); /* PFXI 96XG3 */
5094DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8562,
5095 quirk_switchtec_ntb_dma_alias);
5096DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8563,
5097 quirk_switchtec_ntb_dma_alias);
5098DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8564,
5099 quirk_switchtec_ntb_dma_alias);
5100DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8565,
5101 quirk_switchtec_ntb_dma_alias);
5102DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8566,
5103 quirk_switchtec_ntb_dma_alias);
5104DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8571,
5105 quirk_switchtec_ntb_dma_alias);
5106DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8572,
5107 quirk_switchtec_ntb_dma_alias);
5108DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8573,
5109 quirk_switchtec_ntb_dma_alias);
5110DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8574,
5111 quirk_switchtec_ntb_dma_alias);
5112DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8575,
5113 quirk_switchtec_ntb_dma_alias);
5114DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MICROSEMI, 0x8576,
5115 quirk_switchtec_ntb_dma_alias);
diff --git a/drivers/s390/net/ism_drv.c b/drivers/s390/net/ism_drv.c
index c0631895154e..f96ec68af2e5 100644
--- a/drivers/s390/net/ism_drv.c
+++ b/drivers/s390/net/ism_drv.c
@@ -515,8 +515,8 @@ static int ism_probe(struct pci_dev *pdev, const struct pci_device_id *id)
515 if (ret) 515 if (ret)
516 goto err_unmap; 516 goto err_unmap;
517 517
518 pci_set_dma_seg_boundary(pdev, SZ_1M - 1); 518 dma_set_seg_boundary(&pdev->dev, SZ_1M - 1);
519 pci_set_dma_max_seg_size(pdev, SZ_1M); 519 dma_set_max_seg_size(&pdev->dev, SZ_1M);
520 pci_set_master(pdev); 520 pci_set_master(pdev);
521 521
522 ism->smcd = smcd_alloc_dev(&pdev->dev, dev_name(&pdev->dev), &ism_ops, 522 ism->smcd = smcd_alloc_dev(&pdev->dev, dev_name(&pdev->dev), &ism_ops,
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c
index 1bcdd50786f1..2d4e4ddc5ace 100644
--- a/drivers/scsi/aacraid/linit.c
+++ b/drivers/scsi/aacraid/linit.c
@@ -1747,7 +1747,7 @@ static int aac_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1747 shost->max_sectors = (shost->sg_tablesize * 8) + 112; 1747 shost->max_sectors = (shost->sg_tablesize * 8) + 112;
1748 } 1748 }
1749 1749
1750 error = pci_set_dma_max_seg_size(pdev, 1750 error = dma_set_max_seg_size(&pdev->dev,
1751 (aac->adapter_info.options & AAC_OPT_NEW_COMM) ? 1751 (aac->adapter_info.options & AAC_OPT_NEW_COMM) ?
1752 (shost->max_sectors << 9) : 65536); 1752 (shost->max_sectors << 9) : 65536);
1753 if (error) 1753 if (error)
diff --git a/include/linux/pci-dma-compat.h b/include/linux/pci-dma-compat.h
index c3f1b44ade29..cb1adf0b78a9 100644
--- a/include/linux/pci-dma-compat.h
+++ b/include/linux/pci-dma-compat.h
@@ -119,29 +119,11 @@ static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
119{ 119{
120 return dma_set_coherent_mask(&dev->dev, mask); 120 return dma_set_coherent_mask(&dev->dev, mask);
121} 121}
122
123static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
124 unsigned int size)
125{
126 return dma_set_max_seg_size(&dev->dev, size);
127}
128
129static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
130 unsigned long mask)
131{
132 return dma_set_seg_boundary(&dev->dev, mask);
133}
134#else 122#else
135static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) 123static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
136{ return -EIO; } 124{ return -EIO; }
137static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) 125static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
138{ return -EIO; } 126{ return -EIO; }
139static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
140 unsigned int size)
141{ return -EIO; }
142static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
143 unsigned long mask)
144{ return -EIO; }
145#endif 127#endif
146 128
147#endif 129#endif
diff --git a/include/linux/pci-dma.h b/include/linux/pci-dma.h
deleted file mode 100644
index 0f7aa7353ca3..000000000000
--- a/include/linux/pci-dma.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _LINUX_PCI_DMA_H
3#define _LINUX_PCI_DMA_H
4
5#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) DEFINE_DMA_UNMAP_ADDR(ADDR_NAME);
6#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) DEFINE_DMA_UNMAP_LEN(LEN_NAME);
7#define pci_unmap_addr dma_unmap_addr
8#define pci_unmap_addr_set dma_unmap_addr_set
9#define pci_unmap_len dma_unmap_len
10#define pci_unmap_len_set dma_unmap_len_set
11
12#endif
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 45f60110e2e1..7c4802de1e3a 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1344,7 +1344,6 @@ int pci_set_vga_state(struct pci_dev *pdev, bool decode,
1344 1344
1345/* kmem_cache style wrapper around pci_alloc_consistent() */ 1345/* kmem_cache style wrapper around pci_alloc_consistent() */
1346 1346
1347#include <linux/pci-dma.h>
1348#include <linux/dmapool.h> 1347#include <linux/dmapool.h>
1349 1348
1350#define pci_pool dma_pool 1349#define pci_pool dma_pool
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d157983b84cf..f4e278493f5b 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2539,8 +2539,6 @@
2539#define PCI_VENDOR_ID_HUAWEI 0x19e5 2539#define PCI_VENDOR_ID_HUAWEI 0x19e5
2540 2540
2541#define PCI_VENDOR_ID_NETRONOME 0x19ee 2541#define PCI_VENDOR_ID_NETRONOME 0x19ee
2542#define PCI_DEVICE_ID_NETRONOME_NFP3200 0x3200
2543#define PCI_DEVICE_ID_NETRONOME_NFP3240 0x3240
2544#define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000 2542#define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000
2545#define PCI_DEVICE_ID_NETRONOME_NFP5000 0x5000 2543#define PCI_DEVICE_ID_NETRONOME_NFP5000 0x5000
2546#define PCI_DEVICE_ID_NETRONOME_NFP6000 0x6000 2544#define PCI_DEVICE_ID_NETRONOME_NFP6000 0x6000