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authorJonas Gorski <jogo@openwrt.org>2014-07-08 10:53:21 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-07-30 09:23:32 -0400
commitee685808243742becae89f5f4553893387543f08 (patch)
treecbc38023e65a660b33131d798f8fca9751130777
parent53a02272e49260713f05c798953c6c9e04be4175 (diff)
MIPS: BCM63xx: Remove !RUNTIME_DETECT from spi code
Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7271/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/bcm63xx/dev-spi.c4
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h31
2 files changed, 0 insertions, 35 deletions
diff --git a/arch/mips/bcm63xx/dev-spi.c b/arch/mips/bcm63xx/dev-spi.c
index d12daed749bc..ad448e41e3bd 100644
--- a/arch/mips/bcm63xx/dev-spi.c
+++ b/arch/mips/bcm63xx/dev-spi.c
@@ -18,7 +18,6 @@
18#include <bcm63xx_dev_spi.h> 18#include <bcm63xx_dev_spi.h>
19#include <bcm63xx_regs.h> 19#include <bcm63xx_regs.h>
20 20
21#ifdef BCMCPU_RUNTIME_DETECT
22/* 21/*
23 * register offsets 22 * register offsets
24 */ 23 */
@@ -41,9 +40,6 @@ static __init void bcm63xx_spi_regs_init(void)
41 BCMCPU_IS_6362() || BCMCPU_IS_6368()) 40 BCMCPU_IS_6362() || BCMCPU_IS_6368())
42 bcm63xx_regs_spi = bcm6358_regs_spi; 41 bcm63xx_regs_spi = bcm6358_regs_spi;
43} 42}
44#else
45static __init void bcm63xx_spi_regs_init(void) { }
46#endif
47 43
48static struct resource spi_resources[] = { 44static struct resource spi_resources[] = {
49 { 45 {
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
index c426cabc620a..25737655d141 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
@@ -30,26 +30,6 @@ enum bcm63xx_regs_spi {
30 SPI_RX_DATA, 30 SPI_RX_DATA,
31}; 31};
32 32
33#define __GEN_SPI_RSET_BASE(__cpu, __rset) \
34 case SPI_## __rset: \
35 return SPI_## __cpu ##_## __rset;
36
37#define __GEN_SPI_RSET(__cpu) \
38 switch (reg) { \
39 __GEN_SPI_RSET_BASE(__cpu, CMD) \
40 __GEN_SPI_RSET_BASE(__cpu, INT_STATUS) \
41 __GEN_SPI_RSET_BASE(__cpu, INT_MASK_ST) \
42 __GEN_SPI_RSET_BASE(__cpu, INT_MASK) \
43 __GEN_SPI_RSET_BASE(__cpu, ST) \
44 __GEN_SPI_RSET_BASE(__cpu, CLK_CFG) \
45 __GEN_SPI_RSET_BASE(__cpu, FILL_BYTE) \
46 __GEN_SPI_RSET_BASE(__cpu, MSG_TAIL) \
47 __GEN_SPI_RSET_BASE(__cpu, RX_TAIL) \
48 __GEN_SPI_RSET_BASE(__cpu, MSG_CTL) \
49 __GEN_SPI_RSET_BASE(__cpu, MSG_DATA) \
50 __GEN_SPI_RSET_BASE(__cpu, RX_DATA) \
51 }
52
53#define __GEN_SPI_REGS_TABLE(__cpu) \ 33#define __GEN_SPI_REGS_TABLE(__cpu) \
54 [SPI_CMD] = SPI_## __cpu ##_CMD, \ 34 [SPI_CMD] = SPI_## __cpu ##_CMD, \
55 [SPI_INT_STATUS] = SPI_## __cpu ##_INT_STATUS, \ 35 [SPI_INT_STATUS] = SPI_## __cpu ##_INT_STATUS, \
@@ -66,20 +46,9 @@ enum bcm63xx_regs_spi {
66 46
67static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg) 47static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg)
68{ 48{
69#ifdef BCMCPU_RUNTIME_DETECT
70 extern const unsigned long *bcm63xx_regs_spi; 49 extern const unsigned long *bcm63xx_regs_spi;
71 50
72 return bcm63xx_regs_spi[reg]; 51 return bcm63xx_regs_spi[reg];
73#else
74#if defined(CONFIG_BCM63XX_CPU_6338) || defined(CONFIG_BCM63XX_CPU_6348)
75 __GEN_SPI_RSET(6348)
76#endif
77#if defined(CONFIG_BCM63XX_CPU_6358) || defined(CONFIG_BCM63XX_CPU_6362) || \
78 defined(CONFIG_BCM63XX_CPU_6368)
79 __GEN_SPI_RSET(6358)
80#endif
81#endif
82 return 0;
83} 52}
84 53
85#endif /* BCM63XX_DEV_SPI_H */ 54#endif /* BCM63XX_DEV_SPI_H */