diff options
author | Olof Johansson <olof@lixom.net> | 2015-07-26 14:52:03 -0400 |
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committer | Olof Johansson <olof@lixom.net> | 2015-07-26 14:52:03 -0400 |
commit | ee5d35e7816ac53efbaebbfa6e8d5938f1c99691 (patch) | |
tree | d185a7271b66da2711ed789744eea2fa63baa56b | |
parent | 82567c85d5b0b96e3c2724fb878a65a7867614df (diff) | |
parent | 9a258afa928b45e6dd2efcac46ccf7eea705d35a (diff) |
Merge tag 'for-v4.2-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes
Merge "ARM: OMAP2+: hwmod fixes for v4.2-rc" from Paul Walmsley:
ARM: OMAP2+: hwmod fixes for v4.2-rc
Two fixes against v4.2-rc1. The first, for DRA7xx platforms,
corrects some incorrect GPMC hardware description data. The
second one will ensure that the hwmod code will wait for any
module with CPU-accessible registers to become ready before
attempting to access it.
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.2-rc/20150723065408/
Note that I do not have a DRA7xx or AM43xx board, and therefore
cannot test on those platforms.
* tag 'for-v4.2-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
ARM: DRA7: hwmod: fix gpmc hwmod
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 24 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 5 |
2 files changed, 18 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index d78c12e7cb5e..486cc4ded190 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -2373,6 +2373,9 @@ static int of_dev_hwmod_lookup(struct device_node *np, | |||
2373 | * registers. This address is needed early so the OCP registers that | 2373 | * registers. This address is needed early so the OCP registers that |
2374 | * are part of the device's address space can be ioremapped properly. | 2374 | * are part of the device's address space can be ioremapped properly. |
2375 | * | 2375 | * |
2376 | * If SYSC access is not needed, the registers will not be remapped | ||
2377 | * and non-availability of MPU access is not treated as an error. | ||
2378 | * | ||
2376 | * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and | 2379 | * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and |
2377 | * -ENXIO on absent or invalid register target address space. | 2380 | * -ENXIO on absent or invalid register target address space. |
2378 | */ | 2381 | */ |
@@ -2387,6 +2390,11 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, | |||
2387 | 2390 | ||
2388 | _save_mpu_port_index(oh); | 2391 | _save_mpu_port_index(oh); |
2389 | 2392 | ||
2393 | /* if we don't need sysc access we don't need to ioremap */ | ||
2394 | if (!oh->class->sysc) | ||
2395 | return 0; | ||
2396 | |||
2397 | /* we can't continue without MPU PORT if we need sysc access */ | ||
2390 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | 2398 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) |
2391 | return -ENXIO; | 2399 | return -ENXIO; |
2392 | 2400 | ||
@@ -2396,8 +2404,10 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, | |||
2396 | oh->name); | 2404 | oh->name); |
2397 | 2405 | ||
2398 | /* Extract the IO space from device tree blob */ | 2406 | /* Extract the IO space from device tree blob */ |
2399 | if (!np) | 2407 | if (!np) { |
2408 | pr_err("omap_hwmod: %s: no dt node\n", oh->name); | ||
2400 | return -ENXIO; | 2409 | return -ENXIO; |
2410 | } | ||
2401 | 2411 | ||
2402 | va_start = of_iomap(np, index + oh->mpu_rt_idx); | 2412 | va_start = of_iomap(np, index + oh->mpu_rt_idx); |
2403 | } else { | 2413 | } else { |
@@ -2456,13 +2466,11 @@ static int __init _init(struct omap_hwmod *oh, void *data) | |||
2456 | oh->name, np->name); | 2466 | oh->name, np->name); |
2457 | } | 2467 | } |
2458 | 2468 | ||
2459 | if (oh->class->sysc) { | 2469 | r = _init_mpu_rt_base(oh, NULL, index, np); |
2460 | r = _init_mpu_rt_base(oh, NULL, index, np); | 2470 | if (r < 0) { |
2461 | if (r < 0) { | 2471 | WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", |
2462 | WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", | 2472 | oh->name); |
2463 | oh->name); | 2473 | return 0; |
2464 | return 0; | ||
2465 | } | ||
2466 | } | 2474 | } |
2467 | 2475 | ||
2468 | r = _init_clocks(oh, NULL); | 2476 | r = _init_clocks(oh, NULL); |
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 2606c6608bd8..562247bced49 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c | |||
@@ -827,8 +827,7 @@ static struct omap_hwmod_class_sysconfig dra7xx_gpmc_sysc = { | |||
827 | .syss_offs = 0x0014, | 827 | .syss_offs = 0x0014, |
828 | .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE | | 828 | .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE | |
829 | SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), | 829 | SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), |
830 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | 830 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
831 | SIDLE_SMART_WKUP), | ||
832 | .sysc_fields = &omap_hwmod_sysc_type1, | 831 | .sysc_fields = &omap_hwmod_sysc_type1, |
833 | }; | 832 | }; |
834 | 833 | ||
@@ -844,7 +843,7 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = { | |||
844 | .class = &dra7xx_gpmc_hwmod_class, | 843 | .class = &dra7xx_gpmc_hwmod_class, |
845 | .clkdm_name = "l3main1_clkdm", | 844 | .clkdm_name = "l3main1_clkdm", |
846 | /* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */ | 845 | /* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */ |
847 | .flags = HWMOD_SWSUP_SIDLE | DEBUG_OMAP_GPMC_HWMOD_FLAGS, | 846 | .flags = DEBUG_OMAP_GPMC_HWMOD_FLAGS, |
848 | .main_clk = "l3_iclk_div", | 847 | .main_clk = "l3_iclk_div", |
849 | .prcm = { | 848 | .prcm = { |
850 | .omap4 = { | 849 | .omap4 = { |