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authorVille Syrjälä <ville.syrjala@linux.intel.com>2017-03-07 15:54:19 -0500
committerJani Nikula <jani.nikula@intel.com>2017-03-09 03:46:18 -0500
commitedd06b8353772dca7afcd4640dafa83b521edd55 (patch)
tree7ee45d1748d0a4eda60f9900db640b154144c137
parent4e6fdafa7ac395ad47a80a0e7b4fd1e11550f862 (diff)
drm/i915: Nuke debug messages from the pipe update critical section
printks are slow so we should not be doing them from the vblank evade critical section. These could explain why we sometimes seem to blow past our 100 usec deadline. The problem has been there ever since commit bfd16b2a23dc ("drm/i915: Make updating pipe without modeset atomic.") but it may not have been readily visible until commit e1edbd44e23b ("drm/i915: Complain if we take too long under vblank evasion.") increased our chances of noticing it. Cc: stable@vger.kernel.org Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Fixes: bfd16b2a23dc ("drm/i915: Make updating pipe without modeset atomic.") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170307205419.19447-1-ville.syrjala@linux.intel.com Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> (cherry picked from commit c3f8ad57a01a31397e5a0349a226a32f35ddc19c) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c12
1 files changed, 1 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9a8b6a13233d..b3e0cd133b49 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3669,10 +3669,6 @@ static void intel_update_pipe_config(struct intel_crtc *crtc,
3669 /* drm_atomic_helper_update_legacy_modeset_state might not be called. */ 3669 /* drm_atomic_helper_update_legacy_modeset_state might not be called. */
3670 crtc->base.mode = crtc->base.state->mode; 3670 crtc->base.mode = crtc->base.state->mode;
3671 3671
3672 DRM_DEBUG_KMS("Updating pipe size %ix%i -> %ix%i\n",
3673 old_crtc_state->pipe_src_w, old_crtc_state->pipe_src_h,
3674 pipe_config->pipe_src_w, pipe_config->pipe_src_h);
3675
3676 /* 3672 /*
3677 * Update pipe size and adjust fitter if needed: the reason for this is 3673 * Update pipe size and adjust fitter if needed: the reason for this is
3678 * that in compute_mode_changes we check the native mode (not the pfit 3674 * that in compute_mode_changes we check the native mode (not the pfit
@@ -4796,23 +4792,17 @@ static void skylake_pfit_enable(struct intel_crtc *crtc)
4796 struct intel_crtc_scaler_state *scaler_state = 4792 struct intel_crtc_scaler_state *scaler_state =
4797 &crtc->config->scaler_state; 4793 &crtc->config->scaler_state;
4798 4794
4799 DRM_DEBUG_KMS("for crtc_state = %p\n", crtc->config);
4800
4801 if (crtc->config->pch_pfit.enabled) { 4795 if (crtc->config->pch_pfit.enabled) {
4802 int id; 4796 int id;
4803 4797
4804 if (WARN_ON(crtc->config->scaler_state.scaler_id < 0)) { 4798 if (WARN_ON(crtc->config->scaler_state.scaler_id < 0))
4805 DRM_ERROR("Requesting pfit without getting a scaler first\n");
4806 return; 4799 return;
4807 }
4808 4800
4809 id = scaler_state->scaler_id; 4801 id = scaler_state->scaler_id;
4810 I915_WRITE(SKL_PS_CTRL(pipe, id), PS_SCALER_EN | 4802 I915_WRITE(SKL_PS_CTRL(pipe, id), PS_SCALER_EN |
4811 PS_FILTER_MEDIUM | scaler_state->scalers[id].mode); 4803 PS_FILTER_MEDIUM | scaler_state->scalers[id].mode);
4812 I915_WRITE(SKL_PS_WIN_POS(pipe, id), crtc->config->pch_pfit.pos); 4804 I915_WRITE(SKL_PS_WIN_POS(pipe, id), crtc->config->pch_pfit.pos);
4813 I915_WRITE(SKL_PS_WIN_SZ(pipe, id), crtc->config->pch_pfit.size); 4805 I915_WRITE(SKL_PS_WIN_SZ(pipe, id), crtc->config->pch_pfit.size);
4814
4815 DRM_DEBUG_KMS("for crtc_state = %p scaler_id = %d\n", crtc->config, id);
4816 } 4806 }
4817} 4807}
4818 4808