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authorAlexander Usyskin <alexander.usyskin@intel.com>2014-11-19 10:01:38 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-11-26 22:06:41 -0500
commitedca5ea3ff3323b4526d70642d115992df73c9bc (patch)
treea286cb67f0ee73330820a528ebac00b5b9c039e8
parente88281edd4b4496600f2ab423ee2a2363a5e27f7 (diff)
mei: read and print all six FW status registers
ME devices prior to PCH8 (Lynx Point) have two FW status registers, on PCH8 and newer excluding txe there are six FW status registers. Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/misc/mei/hw-me-regs.h12
-rw-r--r--drivers/misc/mei/hw-me.c19
-rw-r--r--drivers/misc/mei/hw-me.h3
-rw-r--r--drivers/misc/mei/hw-txe.c7
-rw-r--r--drivers/misc/mei/init.c38
-rw-r--r--drivers/misc/mei/mei_dev.h38
-rw-r--r--drivers/misc/mei/pci-me.c12
7 files changed, 100 insertions, 29 deletions
diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h
index c5feafdd58a8..9eb7ed70ace2 100644
--- a/drivers/misc/mei/hw-me-regs.h
+++ b/drivers/misc/mei/hw-me-regs.h
@@ -117,14 +117,18 @@
117#define MEI_DEV_ID_WPT_LP 0x9CBA /* Wildcat Point LP */ 117#define MEI_DEV_ID_WPT_LP 0x9CBA /* Wildcat Point LP */
118#define MEI_DEV_ID_WPT_LP_2 0x9CBB /* Wildcat Point LP 2 */ 118#define MEI_DEV_ID_WPT_LP_2 0x9CBB /* Wildcat Point LP 2 */
119 119
120/* Host Firmware Status Registers in PCI Config Space */
121#define PCI_CFG_HFS_1 0x40
122#define PCI_CFG_HFS_2 0x48
123
124/* 120/*
125 * MEI HW Section 121 * MEI HW Section
126 */ 122 */
127 123
124/* Host Firmware Status Registers in PCI Config Space */
125#define PCI_CFG_HFS_1 0x40
126#define PCI_CFG_HFS_2 0x48
127#define PCI_CFG_HFS_3 0x60
128#define PCI_CFG_HFS_4 0x64
129#define PCI_CFG_HFS_5 0x68
130#define PCI_CFG_HFS_6 0x6C
131
128/* MEI registers */ 132/* MEI registers */
129/* H_CB_WW - Host Circular Buffer (CB) Write Window register */ 133/* H_CB_WW - Host Circular Buffer (CB) Write Window register */
130#define H_CB_WW 0 134#define H_CB_WW 0
diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c
index 7ce7cf4b6092..ff2755062b44 100644
--- a/drivers/misc/mei/hw-me.c
+++ b/drivers/misc/mei/hw-me.c
@@ -835,6 +835,14 @@ static bool mei_me_fw_type_sps(struct pci_dev *pdev)
835 .fw_status.status[0] = PCI_CFG_HFS_1, \ 835 .fw_status.status[0] = PCI_CFG_HFS_1, \
836 .fw_status.status[1] = PCI_CFG_HFS_2 836 .fw_status.status[1] = PCI_CFG_HFS_2
837 837
838#define MEI_CFG_PCH8_HFS \
839 .fw_status.count = 6, \
840 .fw_status.status[0] = PCI_CFG_HFS_1, \
841 .fw_status.status[1] = PCI_CFG_HFS_2, \
842 .fw_status.status[2] = PCI_CFG_HFS_3, \
843 .fw_status.status[3] = PCI_CFG_HFS_4, \
844 .fw_status.status[4] = PCI_CFG_HFS_5, \
845 .fw_status.status[5] = PCI_CFG_HFS_6
838 846
839/* ICH Legacy devices */ 847/* ICH Legacy devices */
840const struct mei_cfg mei_me_legacy_cfg = { 848const struct mei_cfg mei_me_legacy_cfg = {
@@ -858,9 +866,14 @@ const struct mei_cfg mei_me_pch_cpt_pbg_cfg = {
858 MEI_CFG_FW_NM, 866 MEI_CFG_FW_NM,
859}; 867};
860 868
861/* PCH Lynx Point with quirk for SPS Firmware exclusion */ 869/* PCH8 Lynx Point and newer devices */
862const struct mei_cfg mei_me_lpt_cfg = { 870const struct mei_cfg mei_me_pch8_cfg = {
863 MEI_CFG_PCH_HFS, 871 MEI_CFG_PCH8_HFS,
872};
873
874/* PCH8 Lynx Point with quirk for SPS Firmware exclusion */
875const struct mei_cfg mei_me_pch8_sps_cfg = {
876 MEI_CFG_PCH8_HFS,
864 MEI_CFG_FW_SPS, 877 MEI_CFG_FW_SPS,
865}; 878};
866 879
diff --git a/drivers/misc/mei/hw-me.h b/drivers/misc/mei/hw-me.h
index e44ed1d03911..d6567af44377 100644
--- a/drivers/misc/mei/hw-me.h
+++ b/drivers/misc/mei/hw-me.h
@@ -65,7 +65,8 @@ extern const struct mei_cfg mei_me_legacy_cfg;
65extern const struct mei_cfg mei_me_ich_cfg; 65extern const struct mei_cfg mei_me_ich_cfg;
66extern const struct mei_cfg mei_me_pch_cfg; 66extern const struct mei_cfg mei_me_pch_cfg;
67extern const struct mei_cfg mei_me_pch_cpt_pbg_cfg; 67extern const struct mei_cfg mei_me_pch_cpt_pbg_cfg;
68extern const struct mei_cfg mei_me_lpt_cfg; 68extern const struct mei_cfg mei_me_pch8_cfg;
69extern const struct mei_cfg mei_me_pch8_sps_cfg;
69 70
70struct mei_device *mei_me_dev_init(struct pci_dev *pdev, 71struct mei_device *mei_me_dev_init(struct pci_dev *pdev,
71 const struct mei_cfg *cfg); 72 const struct mei_cfg *cfg);
diff --git a/drivers/misc/mei/hw-txe.c b/drivers/misc/mei/hw-txe.c
index c5e1902e493f..618ea721aca8 100644
--- a/drivers/misc/mei/hw-txe.c
+++ b/drivers/misc/mei/hw-txe.c
@@ -700,11 +700,10 @@ static int mei_txe_write(struct mei_device *dev,
700 mei_txe_input_ready_interrupt_enable(dev); 700 mei_txe_input_ready_interrupt_enable(dev);
701 701
702 if (!mei_txe_is_input_ready(dev)) { 702 if (!mei_txe_is_input_ready(dev)) {
703 struct mei_fw_status fw_status; 703 char fw_sts_str[MEI_FW_STATUS_STR_SZ];
704 704
705 mei_fw_status(dev, &fw_status); 705 mei_fw_status_str(dev, fw_sts_str, MEI_FW_STATUS_STR_SZ);
706 dev_err(dev->dev, "Input is not ready " FW_STS_FMT "\n", 706 dev_err(dev->dev, "Input is not ready %s\n", fw_sts_str);
707 FW_STS_PRM(fw_status));
708 return -EAGAIN; 707 return -EAGAIN;
709 } 708 }
710 709
diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c
index 7901d076c127..9306219d5675 100644
--- a/drivers/misc/mei/init.c
+++ b/drivers/misc/mei/init.c
@@ -54,6 +54,35 @@ const char *mei_pg_state_str(enum mei_pg_state state)
54#undef MEI_PG_STATE 54#undef MEI_PG_STATE
55} 55}
56 56
57/**
58 * mei_fw_status2str - convert fw status registers to printable string
59 *
60 * @fw_status: firmware status
61 * @buf: string buffer at minimal size MEI_FW_STATUS_STR_SZ
62 * @len: buffer len must be >= MEI_FW_STATUS_STR_SZ
63 *
64 * Return: number of bytes written or -EINVAL if buffer is to small
65 */
66ssize_t mei_fw_status2str(struct mei_fw_status *fw_status,
67 char *buf, size_t len)
68{
69 ssize_t cnt = 0;
70 int i;
71
72 buf[0] = '\0';
73
74 if (len < MEI_FW_STATUS_STR_SZ)
75 return -EINVAL;
76
77 for (i = 0; i < fw_status->count; i++)
78 cnt += scnprintf(buf + cnt, len - cnt, "%08X ",
79 fw_status->status[i]);
80
81 /* drop last space */
82 buf[cnt] = '\0';
83 return cnt;
84}
85EXPORT_SYMBOL_GPL(mei_fw_status2str);
57 86
58/** 87/**
59 * mei_cancel_work - Cancel mei background jobs 88 * mei_cancel_work - Cancel mei background jobs
@@ -86,12 +115,11 @@ int mei_reset(struct mei_device *dev)
86 state != MEI_DEV_DISABLED && 115 state != MEI_DEV_DISABLED &&
87 state != MEI_DEV_POWER_DOWN && 116 state != MEI_DEV_POWER_DOWN &&
88 state != MEI_DEV_POWER_UP) { 117 state != MEI_DEV_POWER_UP) {
89 struct mei_fw_status fw_status; 118 char fw_sts_str[MEI_FW_STATUS_STR_SZ];
90 119
91 mei_fw_status(dev, &fw_status); 120 mei_fw_status_str(dev, fw_sts_str, MEI_FW_STATUS_STR_SZ);
92 dev_warn(dev->dev, 121 dev_warn(dev->dev, "unexpected reset: dev_state = %s fw status = %s\n",
93 "unexpected reset: dev_state = %s " FW_STS_FMT "\n", 122 mei_dev_state_str(state), fw_sts_str);
94 mei_dev_state_str(state), FW_STS_PRM(fw_status));
95 } 123 }
96 124
97 /* we're already in reset, cancel the init timer 125 /* we're already in reset, cancel the init timer
diff --git a/drivers/misc/mei/mei_dev.h b/drivers/misc/mei/mei_dev.h
index 1288a5cf60b9..c90c16b29c08 100644
--- a/drivers/misc/mei/mei_dev.h
+++ b/drivers/misc/mei/mei_dev.h
@@ -152,7 +152,10 @@ struct mei_msg_data {
152}; 152};
153 153
154/* Maximum number of processed FW status registers */ 154/* Maximum number of processed FW status registers */
155#define MEI_FW_STATUS_MAX 2 155#define MEI_FW_STATUS_MAX 6
156/* Minimal buffer for FW status string (8 bytes in dw + space or '\0') */
157#define MEI_FW_STATUS_STR_SZ (MEI_FW_STATUS_MAX * (8 + 1))
158
156 159
157/* 160/*
158 * struct mei_fw_status - storage of FW status data 161 * struct mei_fw_status - storage of FW status data
@@ -805,11 +808,6 @@ static inline int mei_fw_status(struct mei_device *dev,
805 return dev->ops->fw_status(dev, fw_status); 808 return dev->ops->fw_status(dev, fw_status);
806} 809}
807 810
808#define FW_STS_FMT "%08X %08X"
809#define FW_STS_PRM(fw_status) \
810 (fw_status).count > 0 ? (fw_status).status[0] : 0xDEADBEEF, \
811 (fw_status).count > 1 ? (fw_status).status[1] : 0xDEADBEEF
812
813bool mei_hbuf_acquire(struct mei_device *dev); 811bool mei_hbuf_acquire(struct mei_device *dev);
814 812
815bool mei_write_is_idle(struct mei_device *dev); 813bool mei_write_is_idle(struct mei_device *dev);
@@ -833,4 +831,32 @@ void mei_deregister(struct mei_device *dev);
833 (hdr)->host_addr, (hdr)->me_addr, \ 831 (hdr)->host_addr, (hdr)->me_addr, \
834 (hdr)->length, (hdr)->internal, (hdr)->msg_complete 832 (hdr)->length, (hdr)->internal, (hdr)->msg_complete
835 833
834ssize_t mei_fw_status2str(struct mei_fw_status *fw_sts, char *buf, size_t len);
835/**
836 * mei_fw_status_str - fetch and convert fw status registers to printable string
837 *
838 * @dev: the device structure
839 * @buf: string buffer at minimal size MEI_FW_STATUS_STR_SZ
840 * @len: buffer len must be >= MEI_FW_STATUS_STR_SZ
841 *
842 * Return: number of bytes written or < 0 on failure
843 */
844static inline ssize_t mei_fw_status_str(struct mei_device *dev,
845 char *buf, size_t len)
846{
847 struct mei_fw_status fw_status;
848 int ret;
849
850 buf[0] = '\0';
851
852 ret = mei_fw_status(dev, &fw_status);
853 if (ret)
854 return ret;
855
856 ret = mei_fw_status2str(&fw_status, buf, MEI_FW_STATUS_STR_SZ);
857
858 return ret;
859}
860
861
836#endif 862#endif
diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
index f3225b1643ab..b0da60f10acf 100644
--- a/drivers/misc/mei/pci-me.c
+++ b/drivers/misc/mei/pci-me.c
@@ -76,12 +76,12 @@ static const struct pci_device_id mei_me_pci_tbl[] = {
76 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)}, 76 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
77 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)}, 77 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
78 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)}, 78 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
79 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_lpt_cfg)}, 79 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)},
80 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_lpt_cfg)}, 80 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)},
81 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch_cfg)}, 81 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)},
82 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_lpt_cfg)}, 82 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)},
83 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch_cfg)}, 83 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)},
84 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch_cfg)}, 84 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)},
85 85
86 /* required last entry */ 86 /* required last entry */
87 {0, } 87 {0, }