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authorVinod Koul <vkoul@kernel.org>2018-10-24 04:15:37 -0400
committerVinod Koul <vkoul@kernel.org>2018-10-24 04:15:37 -0400
commitedc329fbb8de57afd144632cdb0749c7da27810a (patch)
tree16920b8f50e4b45ff9420268d24c44a9393f1a3e
parente1b5c26e254af3f4f59cdddb91c21b48c2c34b2c (diff)
parent314448f0386f656aa0f695d8743cc1e8eacde3ac (diff)
Merge branch 'topic/dirn_remove' into for-linus
-rw-r--r--drivers/dma/at_hdmac.c2
-rw-r--r--drivers/dma/bcm2835-dma.c8
-rw-r--r--drivers/dma/coh901318.c28
-rw-r--r--drivers/dma/dma-jz4740.c21
-rw-r--r--drivers/dma/dw/core.c5
-rw-r--r--drivers/dma/ep93xx_dma.c21
-rw-r--r--drivers/dma/hsu/hsu.c4
-rw-r--r--drivers/dma/idma64.c4
-rw-r--r--drivers/dma/imx-dma.c20
-rw-r--r--drivers/dma/k3dma.c36
-rw-r--r--drivers/dma/mmp_tdma.c22
11 files changed, 121 insertions, 50 deletions
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index 75f38d19fcbe..7cbac6e8c113 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -1320,7 +1320,7 @@ atc_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
1320 if (unlikely(!is_slave_direction(direction))) 1320 if (unlikely(!is_slave_direction(direction)))
1321 goto err_out; 1321 goto err_out;
1322 1322
1323 if (sconfig->direction == DMA_MEM_TO_DEV) 1323 if (direction == DMA_MEM_TO_DEV)
1324 reg_width = convert_buswidth(sconfig->dst_addr_width); 1324 reg_width = convert_buswidth(sconfig->dst_addr_width);
1325 else 1325 else
1326 reg_width = convert_buswidth(sconfig->src_addr_width); 1326 reg_width = convert_buswidth(sconfig->src_addr_width);
diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c
index 847f84a41a69..cad55ab80d41 100644
--- a/drivers/dma/bcm2835-dma.c
+++ b/drivers/dma/bcm2835-dma.c
@@ -778,14 +778,6 @@ static int bcm2835_dma_slave_config(struct dma_chan *chan,
778{ 778{
779 struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); 779 struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
780 780
781 if ((cfg->direction == DMA_DEV_TO_MEM &&
782 cfg->src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) ||
783 (cfg->direction == DMA_MEM_TO_DEV &&
784 cfg->dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) ||
785 !is_slave_direction(cfg->direction)) {
786 return -EINVAL;
787 }
788
789 c->cfg = *cfg; 781 c->cfg = *cfg;
790 782
791 return 0; 783 return 0;
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index da74fd74636b..eebaba3d9e78 100644
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -1306,6 +1306,7 @@ struct coh901318_chan {
1306 unsigned long nbr_active_done; 1306 unsigned long nbr_active_done;
1307 unsigned long busy; 1307 unsigned long busy;
1308 1308
1309 struct dma_slave_config config;
1309 u32 addr; 1310 u32 addr;
1310 u32 ctrl; 1311 u32 ctrl;
1311 1312
@@ -1402,6 +1403,10 @@ static inline struct coh901318_chan *to_coh901318_chan(struct dma_chan *chan)
1402 return container_of(chan, struct coh901318_chan, chan); 1403 return container_of(chan, struct coh901318_chan, chan);
1403} 1404}
1404 1405
1406static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
1407 struct dma_slave_config *config,
1408 enum dma_transfer_direction direction);
1409
1405static inline const struct coh901318_params * 1410static inline const struct coh901318_params *
1406cohc_chan_param(struct coh901318_chan *cohc) 1411cohc_chan_param(struct coh901318_chan *cohc)
1407{ 1412{
@@ -2360,6 +2365,8 @@ coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
2360 if (lli == NULL) 2365 if (lli == NULL)
2361 goto err_dma_alloc; 2366 goto err_dma_alloc;
2362 2367
2368 coh901318_dma_set_runtimeconfig(chan, &cohc->config, direction);
2369
2363 /* initiate allocated lli list */ 2370 /* initiate allocated lli list */
2364 ret = coh901318_lli_fill_sg(&cohc->base->pool, lli, sgl, sg_len, 2371 ret = coh901318_lli_fill_sg(&cohc->base->pool, lli, sgl, sg_len,
2365 cohc->addr, 2372 cohc->addr,
@@ -2499,7 +2506,8 @@ static const struct burst_table burst_sizes[] = {
2499}; 2506};
2500 2507
2501static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan, 2508static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
2502 struct dma_slave_config *config) 2509 struct dma_slave_config *config,
2510 enum dma_transfer_direction direction)
2503{ 2511{
2504 struct coh901318_chan *cohc = to_coh901318_chan(chan); 2512 struct coh901318_chan *cohc = to_coh901318_chan(chan);
2505 dma_addr_t addr; 2513 dma_addr_t addr;
@@ -2509,11 +2517,11 @@ static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
2509 int i = 0; 2517 int i = 0;
2510 2518
2511 /* We only support mem to per or per to mem transfers */ 2519 /* We only support mem to per or per to mem transfers */
2512 if (config->direction == DMA_DEV_TO_MEM) { 2520 if (direction == DMA_DEV_TO_MEM) {
2513 addr = config->src_addr; 2521 addr = config->src_addr;
2514 addr_width = config->src_addr_width; 2522 addr_width = config->src_addr_width;
2515 maxburst = config->src_maxburst; 2523 maxburst = config->src_maxburst;
2516 } else if (config->direction == DMA_MEM_TO_DEV) { 2524 } else if (direction == DMA_MEM_TO_DEV) {
2517 addr = config->dst_addr; 2525 addr = config->dst_addr;
2518 addr_width = config->dst_addr_width; 2526 addr_width = config->dst_addr_width;
2519 maxburst = config->dst_maxburst; 2527 maxburst = config->dst_maxburst;
@@ -2579,6 +2587,16 @@ static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
2579 return 0; 2587 return 0;
2580} 2588}
2581 2589
2590static int coh901318_dma_slave_config(struct dma_chan *chan,
2591 struct dma_slave_config *config)
2592{
2593 struct coh901318_chan *cohc = to_coh901318_chan(chan);
2594
2595 memcpy(&cohc->config, config, sizeof(*config));
2596
2597 return 0;
2598}
2599
2582static void coh901318_base_init(struct dma_device *dma, const int *pick_chans, 2600static void coh901318_base_init(struct dma_device *dma, const int *pick_chans,
2583 struct coh901318_base *base) 2601 struct coh901318_base *base)
2584{ 2602{
@@ -2684,7 +2702,7 @@ static int __init coh901318_probe(struct platform_device *pdev)
2684 base->dma_slave.device_prep_slave_sg = coh901318_prep_slave_sg; 2702 base->dma_slave.device_prep_slave_sg = coh901318_prep_slave_sg;
2685 base->dma_slave.device_tx_status = coh901318_tx_status; 2703 base->dma_slave.device_tx_status = coh901318_tx_status;
2686 base->dma_slave.device_issue_pending = coh901318_issue_pending; 2704 base->dma_slave.device_issue_pending = coh901318_issue_pending;
2687 base->dma_slave.device_config = coh901318_dma_set_runtimeconfig; 2705 base->dma_slave.device_config = coh901318_dma_slave_config;
2688 base->dma_slave.device_pause = coh901318_pause; 2706 base->dma_slave.device_pause = coh901318_pause;
2689 base->dma_slave.device_resume = coh901318_resume; 2707 base->dma_slave.device_resume = coh901318_resume;
2690 base->dma_slave.device_terminate_all = coh901318_terminate_all; 2708 base->dma_slave.device_terminate_all = coh901318_terminate_all;
@@ -2707,7 +2725,7 @@ static int __init coh901318_probe(struct platform_device *pdev)
2707 base->dma_memcpy.device_prep_dma_memcpy = coh901318_prep_memcpy; 2725 base->dma_memcpy.device_prep_dma_memcpy = coh901318_prep_memcpy;
2708 base->dma_memcpy.device_tx_status = coh901318_tx_status; 2726 base->dma_memcpy.device_tx_status = coh901318_tx_status;
2709 base->dma_memcpy.device_issue_pending = coh901318_issue_pending; 2727 base->dma_memcpy.device_issue_pending = coh901318_issue_pending;
2710 base->dma_memcpy.device_config = coh901318_dma_set_runtimeconfig; 2728 base->dma_memcpy.device_config = coh901318_dma_slave_config;
2711 base->dma_memcpy.device_pause = coh901318_pause; 2729 base->dma_memcpy.device_pause = coh901318_pause;
2712 base->dma_memcpy.device_resume = coh901318_resume; 2730 base->dma_memcpy.device_resume = coh901318_resume;
2713 base->dma_memcpy.device_terminate_all = coh901318_terminate_all; 2731 base->dma_memcpy.device_terminate_all = coh901318_terminate_all;
diff --git a/drivers/dma/dma-jz4740.c b/drivers/dma/dma-jz4740.c
index afd5e10f8927..5253e3c0dc04 100644
--- a/drivers/dma/dma-jz4740.c
+++ b/drivers/dma/dma-jz4740.c
@@ -113,6 +113,7 @@ struct jz4740_dma_desc {
113struct jz4740_dmaengine_chan { 113struct jz4740_dmaengine_chan {
114 struct virt_dma_chan vchan; 114 struct virt_dma_chan vchan;
115 unsigned int id; 115 unsigned int id;
116 struct dma_slave_config config;
116 117
117 dma_addr_t fifo_addr; 118 dma_addr_t fifo_addr;
118 unsigned int transfer_shift; 119 unsigned int transfer_shift;
@@ -203,8 +204,9 @@ static enum jz4740_dma_transfer_size jz4740_dma_maxburst(u32 maxburst)
203 return JZ4740_DMA_TRANSFER_SIZE_32BYTE; 204 return JZ4740_DMA_TRANSFER_SIZE_32BYTE;
204} 205}
205 206
206static int jz4740_dma_slave_config(struct dma_chan *c, 207static int jz4740_dma_slave_config_write(struct dma_chan *c,
207 struct dma_slave_config *config) 208 struct dma_slave_config *config,
209 enum dma_transfer_direction direction)
208{ 210{
209 struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c); 211 struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
210 struct jz4740_dma_dev *dmadev = jz4740_dma_chan_get_dev(chan); 212 struct jz4740_dma_dev *dmadev = jz4740_dma_chan_get_dev(chan);
@@ -214,7 +216,7 @@ static int jz4740_dma_slave_config(struct dma_chan *c,
214 enum jz4740_dma_flags flags; 216 enum jz4740_dma_flags flags;
215 uint32_t cmd; 217 uint32_t cmd;
216 218
217 switch (config->direction) { 219 switch (direction) {
218 case DMA_MEM_TO_DEV: 220 case DMA_MEM_TO_DEV:
219 flags = JZ4740_DMA_SRC_AUTOINC; 221 flags = JZ4740_DMA_SRC_AUTOINC;
220 transfer_size = jz4740_dma_maxburst(config->dst_maxburst); 222 transfer_size = jz4740_dma_maxburst(config->dst_maxburst);
@@ -265,6 +267,15 @@ static int jz4740_dma_slave_config(struct dma_chan *c,
265 return 0; 267 return 0;
266} 268}
267 269
270static int jz4740_dma_slave_config(struct dma_chan *c,
271 struct dma_slave_config *config)
272{
273 struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
274
275 memcpy(&chan->config, config, sizeof(*config));
276 return 0;
277}
278
268static int jz4740_dma_terminate_all(struct dma_chan *c) 279static int jz4740_dma_terminate_all(struct dma_chan *c)
269{ 280{
270 struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c); 281 struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
@@ -407,6 +418,8 @@ static struct dma_async_tx_descriptor *jz4740_dma_prep_slave_sg(
407 desc->direction = direction; 418 desc->direction = direction;
408 desc->cyclic = false; 419 desc->cyclic = false;
409 420
421 jz4740_dma_slave_config_write(c, &chan->config, direction);
422
410 return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); 423 return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
411} 424}
412 425
@@ -438,6 +451,8 @@ static struct dma_async_tx_descriptor *jz4740_dma_prep_dma_cyclic(
438 desc->direction = direction; 451 desc->direction = direction;
439 desc->cyclic = true; 452 desc->cyclic = true;
440 453
454 jz4740_dma_slave_config_write(c, &chan->config, direction);
455
441 return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); 456 return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
442} 457}
443 458
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index f43e6dafe446..d0c3e50b39fb 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -886,12 +886,7 @@ static int dwc_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
886 */ 886 */
887 u32 s = dw->pdata->is_idma32 ? 1 : 2; 887 u32 s = dw->pdata->is_idma32 ? 1 : 2;
888 888
889 /* Check if chan will be configured for slave transfers */
890 if (!is_slave_direction(sconfig->direction))
891 return -EINVAL;
892
893 memcpy(&dwc->dma_sconfig, sconfig, sizeof(*sconfig)); 889 memcpy(&dwc->dma_sconfig, sconfig, sizeof(*sconfig));
894 dwc->direction = sconfig->direction;
895 890
896 sc->src_maxburst = sc->src_maxburst > 1 ? fls(sc->src_maxburst) - s : 0; 891 sc->src_maxburst = sc->src_maxburst > 1 ? fls(sc->src_maxburst) - s : 0;
897 sc->dst_maxburst = sc->dst_maxburst > 1 ? fls(sc->dst_maxburst) - s : 0; 892 sc->dst_maxburst = sc->dst_maxburst > 1 ? fls(sc->dst_maxburst) - s : 0;
diff --git a/drivers/dma/ep93xx_dma.c b/drivers/dma/ep93xx_dma.c
index a15592383d4e..f674eb5fbbef 100644
--- a/drivers/dma/ep93xx_dma.c
+++ b/drivers/dma/ep93xx_dma.c
@@ -109,6 +109,9 @@
109#define DMA_MAX_CHAN_DESCRIPTORS 32 109#define DMA_MAX_CHAN_DESCRIPTORS 32
110 110
111struct ep93xx_dma_engine; 111struct ep93xx_dma_engine;
112static int ep93xx_dma_slave_config_write(struct dma_chan *chan,
113 enum dma_transfer_direction dir,
114 struct dma_slave_config *config);
112 115
113/** 116/**
114 * struct ep93xx_dma_desc - EP93xx specific transaction descriptor 117 * struct ep93xx_dma_desc - EP93xx specific transaction descriptor
@@ -180,6 +183,7 @@ struct ep93xx_dma_chan {
180 struct list_head free_list; 183 struct list_head free_list;
181 u32 runtime_addr; 184 u32 runtime_addr;
182 u32 runtime_ctrl; 185 u32 runtime_ctrl;
186 struct dma_slave_config slave_config;
183}; 187};
184 188
185/** 189/**
@@ -1051,6 +1055,8 @@ ep93xx_dma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
1051 return NULL; 1055 return NULL;
1052 } 1056 }
1053 1057
1058 ep93xx_dma_slave_config_write(chan, dir, &edmac->slave_config);
1059
1054 first = NULL; 1060 first = NULL;
1055 for_each_sg(sgl, sg, sg_len, i) { 1061 for_each_sg(sgl, sg, sg_len, i) {
1056 size_t len = sg_dma_len(sg); 1062 size_t len = sg_dma_len(sg);
@@ -1136,6 +1142,8 @@ ep93xx_dma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t dma_addr,
1136 return NULL; 1142 return NULL;
1137 } 1143 }
1138 1144
1145 ep93xx_dma_slave_config_write(chan, dir, &edmac->slave_config);
1146
1139 /* Split the buffer into period size chunks */ 1147 /* Split the buffer into period size chunks */
1140 first = NULL; 1148 first = NULL;
1141 for (offset = 0; offset < buf_len; offset += period_len) { 1149 for (offset = 0; offset < buf_len; offset += period_len) {
@@ -1227,6 +1235,17 @@ static int ep93xx_dma_slave_config(struct dma_chan *chan,
1227 struct dma_slave_config *config) 1235 struct dma_slave_config *config)
1228{ 1236{
1229 struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan); 1237 struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
1238
1239 memcpy(&edmac->slave_config, config, sizeof(*config));
1240
1241 return 0;
1242}
1243
1244static int ep93xx_dma_slave_config_write(struct dma_chan *chan,
1245 enum dma_transfer_direction dir,
1246 struct dma_slave_config *config)
1247{
1248 struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
1230 enum dma_slave_buswidth width; 1249 enum dma_slave_buswidth width;
1231 unsigned long flags; 1250 unsigned long flags;
1232 u32 addr, ctrl; 1251 u32 addr, ctrl;
@@ -1234,7 +1253,7 @@ static int ep93xx_dma_slave_config(struct dma_chan *chan,
1234 if (!edmac->edma->m2m) 1253 if (!edmac->edma->m2m)
1235 return -EINVAL; 1254 return -EINVAL;
1236 1255
1237 switch (config->direction) { 1256 switch (dir) {
1238 case DMA_DEV_TO_MEM: 1257 case DMA_DEV_TO_MEM:
1239 width = config->src_addr_width; 1258 width = config->src_addr_width;
1240 addr = config->src_addr; 1259 addr = config->src_addr;
diff --git a/drivers/dma/hsu/hsu.c b/drivers/dma/hsu/hsu.c
index 202ffa9f7611..e06f20272fd7 100644
--- a/drivers/dma/hsu/hsu.c
+++ b/drivers/dma/hsu/hsu.c
@@ -348,10 +348,6 @@ static int hsu_dma_slave_config(struct dma_chan *chan,
348{ 348{
349 struct hsu_dma_chan *hsuc = to_hsu_dma_chan(chan); 349 struct hsu_dma_chan *hsuc = to_hsu_dma_chan(chan);
350 350
351 /* Check if chan will be configured for slave transfers */
352 if (!is_slave_direction(config->direction))
353 return -EINVAL;
354
355 memcpy(&hsuc->config, config, sizeof(hsuc->config)); 351 memcpy(&hsuc->config, config, sizeof(hsuc->config));
356 352
357 return 0; 353 return 0;
diff --git a/drivers/dma/idma64.c b/drivers/dma/idma64.c
index 1fbf9cb9b742..40dc5d2ddf3d 100644
--- a/drivers/dma/idma64.c
+++ b/drivers/dma/idma64.c
@@ -408,10 +408,6 @@ static int idma64_slave_config(struct dma_chan *chan,
408{ 408{
409 struct idma64_chan *idma64c = to_idma64_chan(chan); 409 struct idma64_chan *idma64c = to_idma64_chan(chan);
410 410
411 /* Check if chan will be configured for slave transfers */
412 if (!is_slave_direction(config->direction))
413 return -EINVAL;
414
415 memcpy(&idma64c->config, config, sizeof(idma64c->config)); 411 memcpy(&idma64c->config, config, sizeof(idma64c->config));
416 412
417 convert_burst(&idma64c->config.src_maxburst); 413 convert_burst(&idma64c->config.src_maxburst);
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index 75b6ff0415ee..c2fff3f6c9ca 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -162,6 +162,7 @@ struct imxdma_channel {
162 bool enabled_2d; 162 bool enabled_2d;
163 int slot_2d; 163 int slot_2d;
164 unsigned int irq; 164 unsigned int irq;
165 struct dma_slave_config config;
165}; 166};
166 167
167enum imx_dma_type { 168enum imx_dma_type {
@@ -675,14 +676,15 @@ static int imxdma_terminate_all(struct dma_chan *chan)
675 return 0; 676 return 0;
676} 677}
677 678
678static int imxdma_config(struct dma_chan *chan, 679static int imxdma_config_write(struct dma_chan *chan,
679 struct dma_slave_config *dmaengine_cfg) 680 struct dma_slave_config *dmaengine_cfg,
681 enum dma_transfer_direction direction)
680{ 682{
681 struct imxdma_channel *imxdmac = to_imxdma_chan(chan); 683 struct imxdma_channel *imxdmac = to_imxdma_chan(chan);
682 struct imxdma_engine *imxdma = imxdmac->imxdma; 684 struct imxdma_engine *imxdma = imxdmac->imxdma;
683 unsigned int mode = 0; 685 unsigned int mode = 0;
684 686
685 if (dmaengine_cfg->direction == DMA_DEV_TO_MEM) { 687 if (direction == DMA_DEV_TO_MEM) {
686 imxdmac->per_address = dmaengine_cfg->src_addr; 688 imxdmac->per_address = dmaengine_cfg->src_addr;
687 imxdmac->watermark_level = dmaengine_cfg->src_maxburst; 689 imxdmac->watermark_level = dmaengine_cfg->src_maxburst;
688 imxdmac->word_size = dmaengine_cfg->src_addr_width; 690 imxdmac->word_size = dmaengine_cfg->src_addr_width;
@@ -723,6 +725,16 @@ static int imxdma_config(struct dma_chan *chan,
723 return 0; 725 return 0;
724} 726}
725 727
728static int imxdma_config(struct dma_chan *chan,
729 struct dma_slave_config *dmaengine_cfg)
730{
731 struct imxdma_channel *imxdmac = to_imxdma_chan(chan);
732
733 memcpy(&imxdmac->config, dmaengine_cfg, sizeof(*dmaengine_cfg));
734
735 return 0;
736}
737
726static enum dma_status imxdma_tx_status(struct dma_chan *chan, 738static enum dma_status imxdma_tx_status(struct dma_chan *chan,
727 dma_cookie_t cookie, 739 dma_cookie_t cookie,
728 struct dma_tx_state *txstate) 740 struct dma_tx_state *txstate)
@@ -905,6 +917,8 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic(
905 desc->desc.callback = NULL; 917 desc->desc.callback = NULL;
906 desc->desc.callback_param = NULL; 918 desc->desc.callback_param = NULL;
907 919
920 imxdma_config_write(chan, &imxdmac->config, direction);
921
908 return &desc->desc; 922 return &desc->desc;
909} 923}
910 924
diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
index 6bfa217ed6d0..fdec2b6cfbb0 100644
--- a/drivers/dma/k3dma.c
+++ b/drivers/dma/k3dma.c
@@ -87,10 +87,10 @@ struct k3_dma_chan {
87 struct virt_dma_chan vc; 87 struct virt_dma_chan vc;
88 struct k3_dma_phy *phy; 88 struct k3_dma_phy *phy;
89 struct list_head node; 89 struct list_head node;
90 enum dma_transfer_direction dir;
91 dma_addr_t dev_addr; 90 dma_addr_t dev_addr;
92 enum dma_status status; 91 enum dma_status status;
93 bool cyclic; 92 bool cyclic;
93 struct dma_slave_config slave_config;
94}; 94};
95 95
96struct k3_dma_phy { 96struct k3_dma_phy {
@@ -118,6 +118,10 @@ struct k3_dma_dev {
118 118
119#define to_k3_dma(dmadev) container_of(dmadev, struct k3_dma_dev, slave) 119#define to_k3_dma(dmadev) container_of(dmadev, struct k3_dma_dev, slave)
120 120
121static int k3_dma_config_write(struct dma_chan *chan,
122 enum dma_transfer_direction dir,
123 struct dma_slave_config *cfg);
124
121static struct k3_dma_chan *to_k3_chan(struct dma_chan *chan) 125static struct k3_dma_chan *to_k3_chan(struct dma_chan *chan)
122{ 126{
123 return container_of(chan, struct k3_dma_chan, vc.chan); 127 return container_of(chan, struct k3_dma_chan, vc.chan);
@@ -501,14 +505,8 @@ static struct dma_async_tx_descriptor *k3_dma_prep_memcpy(
501 copy = min_t(size_t, len, DMA_MAX_SIZE); 505 copy = min_t(size_t, len, DMA_MAX_SIZE);
502 k3_dma_fill_desc(ds, dst, src, copy, num++, c->ccfg); 506 k3_dma_fill_desc(ds, dst, src, copy, num++, c->ccfg);
503 507
504 if (c->dir == DMA_MEM_TO_DEV) { 508 src += copy;
505 src += copy; 509 dst += copy;
506 } else if (c->dir == DMA_DEV_TO_MEM) {
507 dst += copy;
508 } else {
509 src += copy;
510 dst += copy;
511 }
512 len -= copy; 510 len -= copy;
513 } while (len); 511 } while (len);
514 512
@@ -542,6 +540,7 @@ static struct dma_async_tx_descriptor *k3_dma_prep_slave_sg(
542 if (!ds) 540 if (!ds)
543 return NULL; 541 return NULL;
544 num = 0; 542 num = 0;
543 k3_dma_config_write(chan, dir, &c->slave_config);
545 544
546 for_each_sg(sgl, sg, sglen, i) { 545 for_each_sg(sgl, sg, sglen, i) {
547 addr = sg_dma_address(sg); 546 addr = sg_dma_address(sg);
@@ -602,6 +601,7 @@ k3_dma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr,
602 avail = buf_len; 601 avail = buf_len;
603 total = avail; 602 total = avail;
604 num = 0; 603 num = 0;
604 k3_dma_config_write(chan, dir, &c->slave_config);
605 605
606 if (period_len < modulo) 606 if (period_len < modulo)
607 modulo = period_len; 607 modulo = period_len;
@@ -642,18 +642,26 @@ static int k3_dma_config(struct dma_chan *chan,
642 struct dma_slave_config *cfg) 642 struct dma_slave_config *cfg)
643{ 643{
644 struct k3_dma_chan *c = to_k3_chan(chan); 644 struct k3_dma_chan *c = to_k3_chan(chan);
645
646 memcpy(&c->slave_config, cfg, sizeof(*cfg));
647
648 return 0;
649}
650
651static int k3_dma_config_write(struct dma_chan *chan,
652 enum dma_transfer_direction dir,
653 struct dma_slave_config *cfg)
654{
655 struct k3_dma_chan *c = to_k3_chan(chan);
645 u32 maxburst = 0, val = 0; 656 u32 maxburst = 0, val = 0;
646 enum dma_slave_buswidth width = DMA_SLAVE_BUSWIDTH_UNDEFINED; 657 enum dma_slave_buswidth width = DMA_SLAVE_BUSWIDTH_UNDEFINED;
647 658
648 if (cfg == NULL) 659 if (dir == DMA_DEV_TO_MEM) {
649 return -EINVAL;
650 c->dir = cfg->direction;
651 if (c->dir == DMA_DEV_TO_MEM) {
652 c->ccfg = CX_CFG_DSTINCR; 660 c->ccfg = CX_CFG_DSTINCR;
653 c->dev_addr = cfg->src_addr; 661 c->dev_addr = cfg->src_addr;
654 maxburst = cfg->src_maxburst; 662 maxburst = cfg->src_maxburst;
655 width = cfg->src_addr_width; 663 width = cfg->src_addr_width;
656 } else if (c->dir == DMA_MEM_TO_DEV) { 664 } else if (dir == DMA_MEM_TO_DEV) {
657 c->ccfg = CX_CFG_SRCINCR; 665 c->ccfg = CX_CFG_SRCINCR;
658 c->dev_addr = cfg->dst_addr; 666 c->dev_addr = cfg->dst_addr;
659 maxburst = cfg->dst_maxburst; 667 maxburst = cfg->dst_maxburst;
diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index 13c68b6434ce..c14f8820a567 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -116,6 +116,7 @@ struct mmp_tdma_chan {
116 u32 burst_sz; 116 u32 burst_sz;
117 enum dma_slave_buswidth buswidth; 117 enum dma_slave_buswidth buswidth;
118 enum dma_status status; 118 enum dma_status status;
119 struct dma_slave_config slave_config;
119 120
120 int idx; 121 int idx;
121 enum mmp_tdma_type type; 122 enum mmp_tdma_type type;
@@ -139,6 +140,10 @@ struct mmp_tdma_device {
139 140
140#define to_mmp_tdma_chan(dchan) container_of(dchan, struct mmp_tdma_chan, chan) 141#define to_mmp_tdma_chan(dchan) container_of(dchan, struct mmp_tdma_chan, chan)
141 142
143static int mmp_tdma_config_write(struct dma_chan *chan,
144 enum dma_transfer_direction dir,
145 struct dma_slave_config *dmaengine_cfg);
146
142static void mmp_tdma_chan_set_desc(struct mmp_tdma_chan *tdmac, dma_addr_t phys) 147static void mmp_tdma_chan_set_desc(struct mmp_tdma_chan *tdmac, dma_addr_t phys)
143{ 148{
144 writel(phys, tdmac->reg_base + TDNDPR); 149 writel(phys, tdmac->reg_base + TDNDPR);
@@ -442,6 +447,8 @@ static struct dma_async_tx_descriptor *mmp_tdma_prep_dma_cyclic(
442 if (!desc) 447 if (!desc)
443 goto err_out; 448 goto err_out;
444 449
450 mmp_tdma_config_write(chan, direction, &tdmac->slave_config);
451
445 while (buf < buf_len) { 452 while (buf < buf_len) {
446 desc = &tdmac->desc_arr[i]; 453 desc = &tdmac->desc_arr[i];
447 454
@@ -495,7 +502,18 @@ static int mmp_tdma_config(struct dma_chan *chan,
495{ 502{
496 struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan); 503 struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
497 504
498 if (dmaengine_cfg->direction == DMA_DEV_TO_MEM) { 505 memcpy(&tdmac->slave_config, dmaengine_cfg, sizeof(*dmaengine_cfg));
506
507 return 0;
508}
509
510static int mmp_tdma_config_write(struct dma_chan *chan,
511 enum dma_transfer_direction dir,
512 struct dma_slave_config *dmaengine_cfg)
513{
514 struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
515
516 if (dir == DMA_DEV_TO_MEM) {
499 tdmac->dev_addr = dmaengine_cfg->src_addr; 517 tdmac->dev_addr = dmaengine_cfg->src_addr;
500 tdmac->burst_sz = dmaengine_cfg->src_maxburst; 518 tdmac->burst_sz = dmaengine_cfg->src_maxburst;
501 tdmac->buswidth = dmaengine_cfg->src_addr_width; 519 tdmac->buswidth = dmaengine_cfg->src_addr_width;
@@ -504,7 +522,7 @@ static int mmp_tdma_config(struct dma_chan *chan,
504 tdmac->burst_sz = dmaengine_cfg->dst_maxburst; 522 tdmac->burst_sz = dmaengine_cfg->dst_maxburst;
505 tdmac->buswidth = dmaengine_cfg->dst_addr_width; 523 tdmac->buswidth = dmaengine_cfg->dst_addr_width;
506 } 524 }
507 tdmac->dir = dmaengine_cfg->direction; 525 tdmac->dir = dir;
508 526
509 return mmp_tdma_config_chan(chan); 527 return mmp_tdma_config_chan(chan);
510} 528}