diff options
author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-12-21 06:02:32 -0500 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2018-01-04 14:08:42 -0500 |
commit | ec08d5966b57abc1e7da4832f0dc57d43eb031b8 (patch) | |
tree | 914bc667e5208637a879d9750e381f9590a4913d | |
parent | edea372bd205a30385d4ffbf51afdac62bba478b (diff) |
drm/sun4i: Create minimal multipliers and dividers
The various outputs the TCON can provide have different constraints on the
dotclock divider. Let's make them configurable by the various mode_set
functions.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Link: https://patchwork.freedesktop.org/patch/msgid/92ff5881c8f8674056d34458b2f264cd48d4e136.1513854122.git-series.maxime.ripard@free-electrons.com
-rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 |
3 files changed, 11 insertions, 3 deletions
diff --git a/drivers/gpu/drm/sun4i/sun4i_dotclock.c b/drivers/gpu/drm/sun4i/sun4i_dotclock.c index d401156490f3..023f39bda633 100644 --- a/drivers/gpu/drm/sun4i/sun4i_dotclock.c +++ b/drivers/gpu/drm/sun4i/sun4i_dotclock.c | |||
@@ -17,8 +17,9 @@ | |||
17 | #include "sun4i_dotclock.h" | 17 | #include "sun4i_dotclock.h" |
18 | 18 | ||
19 | struct sun4i_dclk { | 19 | struct sun4i_dclk { |
20 | struct clk_hw hw; | 20 | struct clk_hw hw; |
21 | struct regmap *regmap; | 21 | struct regmap *regmap; |
22 | struct sun4i_tcon *tcon; | ||
22 | }; | 23 | }; |
23 | 24 | ||
24 | static inline struct sun4i_dclk *hw_to_dclk(struct clk_hw *hw) | 25 | static inline struct sun4i_dclk *hw_to_dclk(struct clk_hw *hw) |
@@ -73,11 +74,13 @@ static unsigned long sun4i_dclk_recalc_rate(struct clk_hw *hw, | |||
73 | static long sun4i_dclk_round_rate(struct clk_hw *hw, unsigned long rate, | 74 | static long sun4i_dclk_round_rate(struct clk_hw *hw, unsigned long rate, |
74 | unsigned long *parent_rate) | 75 | unsigned long *parent_rate) |
75 | { | 76 | { |
77 | struct sun4i_dclk *dclk = hw_to_dclk(hw); | ||
78 | struct sun4i_tcon *tcon = dclk->tcon; | ||
76 | unsigned long best_parent = 0; | 79 | unsigned long best_parent = 0; |
77 | u8 best_div = 1; | 80 | u8 best_div = 1; |
78 | int i; | 81 | int i; |
79 | 82 | ||
80 | for (i = 6; i <= 127; i++) { | 83 | for (i = tcon->dclk_min_div; i <= tcon->dclk_max_div; i++) { |
81 | unsigned long ideal = rate * i; | 84 | unsigned long ideal = rate * i; |
82 | unsigned long rounded; | 85 | unsigned long rounded; |
83 | 86 | ||
@@ -167,6 +170,7 @@ int sun4i_dclk_create(struct device *dev, struct sun4i_tcon *tcon) | |||
167 | dclk = devm_kzalloc(dev, sizeof(*dclk), GFP_KERNEL); | 170 | dclk = devm_kzalloc(dev, sizeof(*dclk), GFP_KERNEL); |
168 | if (!dclk) | 171 | if (!dclk) |
169 | return -ENOMEM; | 172 | return -ENOMEM; |
173 | dclk->tcon = tcon; | ||
170 | 174 | ||
171 | init.name = clk_name; | 175 | init.name = clk_name; |
172 | init.ops = &sun4i_dclk_ops; | 176 | init.ops = &sun4i_dclk_ops; |
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index a1ed462c2430..41d325c0420f 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c | |||
@@ -177,6 +177,8 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, | |||
177 | u8 clk_delay; | 177 | u8 clk_delay; |
178 | u32 val = 0; | 178 | u32 val = 0; |
179 | 179 | ||
180 | tcon->dclk_min_div = 6; | ||
181 | tcon->dclk_max_div = 127; | ||
180 | sun4i_tcon0_mode_set_common(tcon, mode); | 182 | sun4i_tcon0_mode_set_common(tcon, mode); |
181 | 183 | ||
182 | /* Adjust clock delay */ | 184 | /* Adjust clock delay */ |
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index 839266a38505..bd3ad7684870 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h | |||
@@ -169,6 +169,8 @@ struct sun4i_tcon { | |||
169 | 169 | ||
170 | /* Pixel clock */ | 170 | /* Pixel clock */ |
171 | struct clk *dclk; | 171 | struct clk *dclk; |
172 | u8 dclk_max_div; | ||
173 | u8 dclk_min_div; | ||
172 | 174 | ||
173 | /* Reset control */ | 175 | /* Reset control */ |
174 | struct reset_control *lcd_rst; | 176 | struct reset_control *lcd_rst; |