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authorHimanshu Jha <himanshujha199640@gmail.com>2017-08-29 09:12:27 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-08-29 15:57:33 -0400
commitebe02de2c60caa3ee5a1b39c7c8b2a40e1fda2d8 (patch)
tree94d8b4f49f5f89d743de628568e20b3c178c5bff
parentc5927537dd5706b17affa8aeea28c7b19c8fbb42 (diff)
drm/amd/powerplay/hwmgr: Remove null check before kfree
kfree on NULL pointer is a no-op and therefore checking is redundant. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Himanshu Jha <himanshujha199640@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c6
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c96
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c44
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c12
4 files changed, 53 insertions, 105 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index bc839ff0bdd0..9f2c0378c059 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -1225,10 +1225,8 @@ static int cz_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
1225 phm_destroy_table(hwmgr, &(hwmgr->power_down_asic)); 1225 phm_destroy_table(hwmgr, &(hwmgr->power_down_asic));
1226 phm_destroy_table(hwmgr, &(hwmgr->setup_asic)); 1226 phm_destroy_table(hwmgr, &(hwmgr->setup_asic));
1227 1227
1228 if (NULL != hwmgr->dyn_state.vddc_dep_on_dal_pwrl) { 1228 kfree(hwmgr->dyn_state.vddc_dep_on_dal_pwrl);
1229 kfree(hwmgr->dyn_state.vddc_dep_on_dal_pwrl); 1229 hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL;
1230 hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL;
1231 }
1232 1230
1233 kfree(hwmgr->backend); 1231 kfree(hwmgr->backend);
1234 hwmgr->backend = NULL; 1232 hwmgr->backend = NULL;
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
index 0f61e670da32..485f7ebdc754 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
@@ -1652,85 +1652,53 @@ static int pp_tables_uninitialize(struct pp_hwmgr *hwmgr)
1652 if (hwmgr->chip_id == CHIP_RAVEN) 1652 if (hwmgr->chip_id == CHIP_RAVEN)
1653 return 0; 1653 return 0;
1654 1654
1655 if (NULL != hwmgr->dyn_state.vddc_dependency_on_sclk) { 1655 kfree(hwmgr->dyn_state.vddc_dependency_on_sclk);
1656 kfree(hwmgr->dyn_state.vddc_dependency_on_sclk); 1656 hwmgr->dyn_state.vddc_dependency_on_sclk = NULL;
1657 hwmgr->dyn_state.vddc_dependency_on_sclk = NULL;
1658 }
1659 1657
1660 if (NULL != hwmgr->dyn_state.vddci_dependency_on_mclk) { 1658 kfree(hwmgr->dyn_state.vddci_dependency_on_mclk);
1661 kfree(hwmgr->dyn_state.vddci_dependency_on_mclk); 1659 hwmgr->dyn_state.vddci_dependency_on_mclk = NULL;
1662 hwmgr->dyn_state.vddci_dependency_on_mclk = NULL;
1663 }
1664 1660
1665 if (NULL != hwmgr->dyn_state.vddc_dependency_on_mclk) { 1661 kfree(hwmgr->dyn_state.vddc_dependency_on_mclk);
1666 kfree(hwmgr->dyn_state.vddc_dependency_on_mclk); 1662 hwmgr->dyn_state.vddc_dependency_on_mclk = NULL;
1667 hwmgr->dyn_state.vddc_dependency_on_mclk = NULL;
1668 }
1669 1663
1670 if (NULL != hwmgr->dyn_state.mvdd_dependency_on_mclk) { 1664 kfree(hwmgr->dyn_state.mvdd_dependency_on_mclk);
1671 kfree(hwmgr->dyn_state.mvdd_dependency_on_mclk); 1665 hwmgr->dyn_state.mvdd_dependency_on_mclk = NULL;
1672 hwmgr->dyn_state.mvdd_dependency_on_mclk = NULL;
1673 }
1674 1666
1675 if (NULL != hwmgr->dyn_state.valid_mclk_values) { 1667 kfree(hwmgr->dyn_state.valid_mclk_values);
1676 kfree(hwmgr->dyn_state.valid_mclk_values); 1668 hwmgr->dyn_state.valid_mclk_values = NULL;
1677 hwmgr->dyn_state.valid_mclk_values = NULL;
1678 }
1679 1669
1680 if (NULL != hwmgr->dyn_state.valid_sclk_values) { 1670 kfree(hwmgr->dyn_state.valid_sclk_values);
1681 kfree(hwmgr->dyn_state.valid_sclk_values); 1671 hwmgr->dyn_state.valid_sclk_values = NULL;
1682 hwmgr->dyn_state.valid_sclk_values = NULL;
1683 }
1684 1672
1685 if (NULL != hwmgr->dyn_state.cac_leakage_table) { 1673 kfree(hwmgr->dyn_state.cac_leakage_table);
1686 kfree(hwmgr->dyn_state.cac_leakage_table); 1674 hwmgr->dyn_state.cac_leakage_table = NULL;
1687 hwmgr->dyn_state.cac_leakage_table = NULL;
1688 }
1689 1675
1690 if (NULL != hwmgr->dyn_state.vddc_phase_shed_limits_table) { 1676 kfree(hwmgr->dyn_state.vddc_phase_shed_limits_table);
1691 kfree(hwmgr->dyn_state.vddc_phase_shed_limits_table); 1677 hwmgr->dyn_state.vddc_phase_shed_limits_table = NULL;
1692 hwmgr->dyn_state.vddc_phase_shed_limits_table = NULL;
1693 }
1694 1678
1695 if (NULL != hwmgr->dyn_state.vce_clock_voltage_dependency_table) { 1679 kfree(hwmgr->dyn_state.vce_clock_voltage_dependency_table);
1696 kfree(hwmgr->dyn_state.vce_clock_voltage_dependency_table); 1680 hwmgr->dyn_state.vce_clock_voltage_dependency_table = NULL;
1697 hwmgr->dyn_state.vce_clock_voltage_dependency_table = NULL;
1698 }
1699 1681
1700 if (NULL != hwmgr->dyn_state.uvd_clock_voltage_dependency_table) { 1682 kfree(hwmgr->dyn_state.uvd_clock_voltage_dependency_table);
1701 kfree(hwmgr->dyn_state.uvd_clock_voltage_dependency_table); 1683 hwmgr->dyn_state.uvd_clock_voltage_dependency_table = NULL;
1702 hwmgr->dyn_state.uvd_clock_voltage_dependency_table = NULL;
1703 }
1704 1684
1705 if (NULL != hwmgr->dyn_state.samu_clock_voltage_dependency_table) { 1685 kfree(hwmgr->dyn_state.samu_clock_voltage_dependency_table);
1706 kfree(hwmgr->dyn_state.samu_clock_voltage_dependency_table); 1686 hwmgr->dyn_state.samu_clock_voltage_dependency_table = NULL;
1707 hwmgr->dyn_state.samu_clock_voltage_dependency_table = NULL;
1708 }
1709 1687
1710 if (NULL != hwmgr->dyn_state.acp_clock_voltage_dependency_table) { 1688 kfree(hwmgr->dyn_state.acp_clock_voltage_dependency_table);
1711 kfree(hwmgr->dyn_state.acp_clock_voltage_dependency_table); 1689 hwmgr->dyn_state.acp_clock_voltage_dependency_table = NULL;
1712 hwmgr->dyn_state.acp_clock_voltage_dependency_table = NULL;
1713 }
1714 1690
1715 if (NULL != hwmgr->dyn_state.cac_dtp_table) { 1691 kfree(hwmgr->dyn_state.cac_dtp_table);
1716 kfree(hwmgr->dyn_state.cac_dtp_table); 1692 hwmgr->dyn_state.cac_dtp_table = NULL;
1717 hwmgr->dyn_state.cac_dtp_table = NULL;
1718 }
1719 1693
1720 if (NULL != hwmgr->dyn_state.ppm_parameter_table) { 1694 kfree(hwmgr->dyn_state.ppm_parameter_table);
1721 kfree(hwmgr->dyn_state.ppm_parameter_table); 1695 hwmgr->dyn_state.ppm_parameter_table = NULL;
1722 hwmgr->dyn_state.ppm_parameter_table = NULL;
1723 }
1724 1696
1725 if (NULL != hwmgr->dyn_state.vdd_gfx_dependency_on_sclk) { 1697 kfree(hwmgr->dyn_state.vdd_gfx_dependency_on_sclk);
1726 kfree(hwmgr->dyn_state.vdd_gfx_dependency_on_sclk); 1698 hwmgr->dyn_state.vdd_gfx_dependency_on_sclk = NULL;
1727 hwmgr->dyn_state.vdd_gfx_dependency_on_sclk = NULL;
1728 }
1729 1699
1730 if (NULL != hwmgr->dyn_state.vq_budgeting_table) { 1700 kfree(hwmgr->dyn_state.vq_budgeting_table);
1731 kfree(hwmgr->dyn_state.vq_budgeting_table); 1701 hwmgr->dyn_state.vq_budgeting_table = NULL;
1732 hwmgr->dyn_state.vq_budgeting_table = NULL;
1733 }
1734 1702
1735 return 0; 1703 return 0;
1736} 1704}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
index 441a916ba3d6..d5a9c0792de0 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
@@ -552,35 +552,21 @@ static int rv_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
552 phm_destroy_table(hwmgr, &(hwmgr->power_down_asic)); 552 phm_destroy_table(hwmgr, &(hwmgr->power_down_asic));
553 phm_destroy_table(hwmgr, &(hwmgr->setup_asic)); 553 phm_destroy_table(hwmgr, &(hwmgr->setup_asic));
554 554
555 if (pinfo->vdd_dep_on_dcefclk) { 555 kfree(pinfo->vdd_dep_on_dcefclk);
556 kfree(pinfo->vdd_dep_on_dcefclk); 556 pinfo->vdd_dep_on_dcefclk = NULL;
557 pinfo->vdd_dep_on_dcefclk = NULL; 557 kfree(pinfo->vdd_dep_on_socclk);
558 } 558 pinfo->vdd_dep_on_socclk = NULL;
559 if (pinfo->vdd_dep_on_socclk) { 559 kfree(pinfo->vdd_dep_on_fclk);
560 kfree(pinfo->vdd_dep_on_socclk); 560 pinfo->vdd_dep_on_fclk = NULL;
561 pinfo->vdd_dep_on_socclk = NULL; 561 kfree(pinfo->vdd_dep_on_dispclk);
562 } 562 pinfo->vdd_dep_on_dispclk = NULL;
563 if (pinfo->vdd_dep_on_fclk) { 563 kfree(pinfo->vdd_dep_on_dppclk);
564 kfree(pinfo->vdd_dep_on_fclk); 564 pinfo->vdd_dep_on_dppclk = NULL;
565 pinfo->vdd_dep_on_fclk = NULL; 565 kfree(pinfo->vdd_dep_on_phyclk);
566 } 566 pinfo->vdd_dep_on_phyclk = NULL;
567 if (pinfo->vdd_dep_on_dispclk) { 567
568 kfree(pinfo->vdd_dep_on_dispclk); 568 kfree(hwmgr->dyn_state.vddc_dep_on_dal_pwrl);
569 pinfo->vdd_dep_on_dispclk = NULL; 569 hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL;
570 }
571 if (pinfo->vdd_dep_on_dppclk) {
572 kfree(pinfo->vdd_dep_on_dppclk);
573 pinfo->vdd_dep_on_dppclk = NULL;
574 }
575 if (pinfo->vdd_dep_on_phyclk) {
576 kfree(pinfo->vdd_dep_on_phyclk);
577 pinfo->vdd_dep_on_phyclk = NULL;
578 }
579
580 if (NULL != hwmgr->dyn_state.vddc_dep_on_dal_pwrl) {
581 kfree(hwmgr->dyn_state.vddc_dep_on_dal_pwrl);
582 hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL;
583 }
584 570
585 kfree(hwmgr->backend); 571 kfree(hwmgr->backend);
586 hwmgr->backend = NULL; 572 hwmgr->backend = NULL;
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index c2743233ba10..eb8a3ff70cf7 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -2282,15 +2282,11 @@ static int smu7_set_private_data_based_on_pptable_v0(struct pp_hwmgr *hwmgr)
2282 2282
2283static int smu7_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) 2283static int smu7_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
2284{ 2284{
2285 if (NULL != hwmgr->dyn_state.vddc_dep_on_dal_pwrl) { 2285 kfree(hwmgr->dyn_state.vddc_dep_on_dal_pwrl);
2286 kfree(hwmgr->dyn_state.vddc_dep_on_dal_pwrl); 2286 hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL;
2287 hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL;
2288 }
2289 pp_smu7_thermal_fini(hwmgr); 2287 pp_smu7_thermal_fini(hwmgr);
2290 if (NULL != hwmgr->backend) { 2288 kfree(hwmgr->backend);
2291 kfree(hwmgr->backend); 2289 hwmgr->backend = NULL;
2292 hwmgr->backend = NULL;
2293 }
2294 2290
2295 return 0; 2291 return 0;
2296} 2292}