diff options
author | Paul Burton <paul.burton@mips.com> | 2018-09-26 16:56:51 -0400 |
---|---|---|
committer | Paul Burton <paul.burton@mips.com> | 2018-09-26 16:56:51 -0400 |
commit | eb75ecb113f5804a83967b943f29c1024a157087 (patch) | |
tree | 06ef353bbc9f75614cdfbba36d75d512b85ac043 | |
parent | 932afdeec18b137b1f9c940bf18ca90338cb3f96 (diff) |
MIPS: MT: Remove unused MT single-threaded cache flush code
Commit ac41f9c46282 ("MIPS: Remove a temporary hack for debugging cache
flushes in SMTC configuration") removed an ugly hack that allowed cache
flushing to be performed single-threaded, something which should not be
necessary outside of debug sessions performed long ago.
Whilst the hack was removed from the cache flush code itself, the
mt_protdflush & mt_protiflush variables were left behind along with code
providing the protdflush & protiflush command line arguments. The
mt_cflush_lockdown() & mt_cflush_release() functions were also left
behind but are now entirely unused.
Remove all the unused code to complete the removal of the MT ASE
single-threaded cache flush hack.
Signed-off-by: Paul Burton <paul.burton@mips.com>
-rw-r--r-- | arch/mips/kernel/mips-mt.c | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c index efaa2527657d..f74f6f505b15 100644 --- a/arch/mips/kernel/mips-mt.c +++ b/arch/mips/kernel/mips-mt.c | |||
@@ -155,25 +155,9 @@ static int __init config7_set(char *str) | |||
155 | __setup("config7=", config7_set); | 155 | __setup("config7=", config7_set); |
156 | 156 | ||
157 | /* Experimental cache flush control parameters that should go away some day */ | 157 | /* Experimental cache flush control parameters that should go away some day */ |
158 | int mt_protiflush; | ||
159 | int mt_protdflush; | ||
160 | int mt_n_iflushes = 1; | 158 | int mt_n_iflushes = 1; |
161 | int mt_n_dflushes = 1; | 159 | int mt_n_dflushes = 1; |
162 | 160 | ||
163 | static int __init set_protiflush(char *s) | ||
164 | { | ||
165 | mt_protiflush = 1; | ||
166 | return 1; | ||
167 | } | ||
168 | __setup("protiflush", set_protiflush); | ||
169 | |||
170 | static int __init set_protdflush(char *s) | ||
171 | { | ||
172 | mt_protdflush = 1; | ||
173 | return 1; | ||
174 | } | ||
175 | __setup("protdflush", set_protdflush); | ||
176 | |||
177 | static int __init niflush(char *s) | 161 | static int __init niflush(char *s) |
178 | { | 162 | { |
179 | get_option(&s, &mt_n_iflushes); | 163 | get_option(&s, &mt_n_iflushes); |
@@ -233,10 +217,6 @@ void mips_mt_set_cpuoptions(void) | |||
233 | } | 217 | } |
234 | 218 | ||
235 | /* Report Cache management debug options */ | 219 | /* Report Cache management debug options */ |
236 | if (mt_protiflush) | ||
237 | printk("I-cache flushes single-threaded\n"); | ||
238 | if (mt_protdflush) | ||
239 | printk("D-cache flushes single-threaded\n"); | ||
240 | if (mt_n_iflushes != 1) | 220 | if (mt_n_iflushes != 1) |
241 | printk("I-Cache Flushes Repeated %d times\n", mt_n_iflushes); | 221 | printk("I-Cache Flushes Repeated %d times\n", mt_n_iflushes); |
242 | if (mt_n_dflushes != 1) | 222 | if (mt_n_dflushes != 1) |